FDS4080N3 [FAIRCHILD]
40V N-Channel FLMP PowerTrench MOSFET; 40V N沟道FLMP的PowerTrench MOSFET
| 型号： | FDS4080N3 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 40V N-Channel FLMP PowerTrench MOSFET |
| 文件： | 总7页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 2003
FDS4080N3
40V N-Channel FLMP PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an
extremely low RDS(ON) in a small package.
• 13 A, 40 V
RDS(ON) = 10.5 mΩ @ VGS = 10 V
• High performance trench technology for extremely
low RDS(ON)
• High power and current handling capability
• Fast switching (Qg = 30 nC )
Applications
•
Synchronous rectifier
DC/DC converter
•
• FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size
Bottom-side
Drain Contact
5
6
7
8
4
3
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
40
± 20
V
V
A
VGSS
Gate-Source Voltage
ID
Drain Current – Continuous
– Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1a)
13
60
3.9
PD
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1a)
40
0.5
RθJA
RθJC
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
12mm
Quantity
2500 units
FDS4080N3
FDS4080N3
13’’
FDS4080N3 Rev C1 (W)
2003 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings (Note 2)
EAS
IAS
Drain-Source Avalanche Energy
Drain-Source Avalanche Current
Single Pulse, VDD = 10V, ID=13A
200
13
mJ
A
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
40
V
VGS = 0 V, ID = 250 µA
∆BVDSS
Breakdown Voltage Temperature
44
ID = 250 µA, Referenced to 25°C
mV/°C
Coefficient
∆TJ
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = 32 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
VGS = –20 V ,VDS = 0 V
1
µA
nA
nA
100
–100
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
2
3.9
–8
5
V
VDS = VGS, ID = 250 µA
ID = 250 µA, Referenced to 25°C
∆VGS(th)
Gate Threshold Voltage
mV/°C
mΩ
Temperature Coefficient
Static Drain–Source
On–Resistance
∆TJ
RDS(on)
VGS = 10 V, ID = 13 A
8.5
10.5
22
12.5
VGS = 10 V, ID = 13 A, TJ=125°C
ID(on)
gFS
On–State Drain Current
Forward Transconductance
VGS = 10 V, VDS = 5 V
30
A
S
VDS = 5 V,
ID = 13 A
41
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
1750
357
138
pF
pF
pF
V
DS = 20 V, V GS = 0 V,
Output Capacitance
Reverse Transfer Capacitance
f = 1.0 MHz
Switching Characteristics (Note 2)
VDD = 20 V, ID = 1 A,
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
12
8
29
14
30
9
21
17
46
25
40
ns
ns
ns
VGS = 10 V, RGEN = 6 Ω
ns
VDS = 20 V, ID = 13 A,
VGS = 10 V
Qg
Qgs
Qgd
nC
nC
nC
10
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
3.2
1.2
A
V
VSD
VGS = 0 V,
IS = 3.2 A (Note 2)
0.7
Voltage
FDS4080N3 Rev C1 (W)
Electrical Characteristics
Notes:
TA = 25°C unless otherwise noted
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
49°C/W when
b)
85°C/W when mounted on
a minimum pad of 2 oz
copper
mounted on a 1in2 pad
of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4080N3 Rev C1 (W)
Typical Characteristics
60
2.2
2
VGS = 10V
7.0V
6.0V
VGS = 5.5V
45
1.8
1.6
1.4
1.2
1
5.5V
6.0V
30
15
0
5.0V
7.0V
30
8.0V
10V
0.8
0
15
45
60
0
0.5
1
1.5
2
2.5
ID, DRAIN CURRENT (A)
V
DS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2.2
1.9
1.6
1.3
1
0.03
ID = 7A
ID = 13A
VGS = 10V
0.025
0.02
TA = 125oC
0.015
0.01
TA = 25oC
0.7
0.4
0.005
-50
-25
0
25
50
75
100
125
150
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
V
GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
80
60
40
20
0
100
25oC
125oC
VGS = 0V
10
TA =-55oC
VDS = 5V
TA = 125oC
1
0.1
0.01
25oC
-55oC
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
2.5
3.5
4.5
5.5
6.5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4080N3 Rev C1 (W)
Typical Characteristics
2500
2000
1500
1000
500
10
f = 1MHz
VGS = 0 V
ID = 13 A
VDS = 10V
20V
8
6
4
2
0
CISS
30V
COSS
CRSS
0
0
10
20
30
40
0
5
10
15
20
25
30
35
V
DS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
50
100
10
100µs
1ms
SINGLE PULSE
R
θJA = 85°C/W
40
30
20
10
0
TA = 25°C
RDS(ON) LIMIT
10ms
100ms
1s
1
10s
DC
VGS = 10V
SINGLE PULSE
0.1
0.01
R
θJA = 85oC/W
TA = 25oC
0.1
1
10
100
0.01
0.1
1
10
100
1000
t1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θJA(t) = r(t) * RθJA
θJA = 85 °C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDS4080N3 Rev C1 (W)
Dimensional Outline and Pad Layout
Bottom View
Top View
Minimum Recommended Landing Pattern
Notes: Unless otherwise Specified
a) All dimensions in mm
b) Standard lead finish:
20 – 80 µ inches nickel /
6 µ inches palladium
c) Chip Size Dimensional Table
Chip Size
X2
0.75
Y2
0.67
X1
Y1
2.36
2.36
FDS4080N3 Rev C1 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarksꢀ
ACEx
PACMAN
POP
Power247
PowerTrench
QFET
QS
SPM
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
ImpliedDisconnect
ISOPLANAR
LittleFET
MicroFET
MicroPak
MICROWIRE
MSX
FACT
ActiveArray
Bottomless
CoolFET
CROSSVOLT
DOME
EcoSPARK
E2CMOSTM
EnSignaTM
FACT Quiet Series
â
FAST
â
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC
I2C
SyncFET
â
QT Optoelectronics TinyLogic
Quiet Series
RapidConfigure
RapidConnect
TruTranslation
UHC
UltraFET
MSXPro
OCX
â
OCXPro
OPTOLOGIC
Across the boardꢀAround the worldꢀ
The Power Franchise
ProgrammableActive Droop
â
â
SILENT SWITCHER VCX
SMARTSTART
OPTOPLANAR
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DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERSꢀ
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATIONꢀ
As used herein:
1ꢀ Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
userꢀ
2ꢀ A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectivenessꢀ
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product developmentꢀ Specifications may change in
any manner without noticeꢀ
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later dateꢀ
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
designꢀ
No Identification Needed
Obsolete
Full Production
This datasheet contains final specificationsꢀ Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve designꢀ
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductorꢀ
The datasheet is printed for reference information onlyꢀ
Revꢀ I2
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