FDS4070N3 [FAIRCHILD]
40V N-Channel PowerTrench MOSFET; 40V N沟道PowerTrench MOSFET的型号: | FDS4070N3 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 40V N-Channel PowerTrench MOSFET |
文件: | 总7页 (文件大小:194K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
May 2003
FDS4070N3
40V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an
extremely low RDS(ON) in a small package.
• 15.3 A, 40 V. RDS(ON) = 7.5 mΩ @ VGS = 10 V
• High performance trench technology for extremely
low RDS(ON)
• High power and current handling capability
• Fast switching, low gate charge
Applications
• Synchronous rectifier
• DC/DC converter
• FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size
Bottom-side
Drain Contact
5
6
7
8
4
3
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
40
± 20
V
V
A
VGSS
ID
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
(Note 1a)
15.3
60
3.0
Maximum Power Dissipation
PD
W
TJ, TSTG
Operating and Storage Junction Temperature Range
–55 to +150
°C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
40
0.5
RθJA
RθJC
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
12mm
Quantity
2500 units
FDS4070N3
FDS4070N3
13’’
FDS4070N3 Rev B1 (W)
2002 Fairchild Semiconductor Corporation
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain-Source Avalanche Ratings (Note 2)
EAS
IAS
Drain-Source Avalanche Energy
Drain-Source Avalanche Current
Single Pulse, VDD=40V, ID=15.3A
310
15.3
mJ
A
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
40
V
VGS = 0 V,
ID = 250 µA
∆BVDSS
Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C
mV/°C
42
Coefficient
∆TJ
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
VDS = 32 V, VGS = 0 V
1
µA
nA
nA
VGS
=
20 V, VDS = 0 V
100
–100
VGS = –20 V, VDS = 0 V
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
2
3.9
–8
5
V
VDS = VGS
ID = 250 µA, Referenced to 25 °C
,
ID = 250 µA
∆VGS(th)
Gate Threshold Voltage
mV/°C
Temperature Coefficient
Static Drain–Source
On–Resistance
∆TJ
RDS(on)
VGS = 10 V, ID = 15.3 A
5.5
8
7.5
12
mΩ
VGS = 10 V, ID=15.3A, TJ =125°C
ID(on)
gFS
On–State Drain Current
Forward Transconductance
VGS = 10 V, VDS = 5 V
VDS = 10 V, ID = 15.3 A
30
A
S
52
Dynamic Characteristics
VDS = 20 V, V GS = 0 V,
f = 1.0 MHz
Ciss
Coss
Crss
Input Capacitance
2819
600
291
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics (Note 2)
VDD = 20 V,
ID = 1 A,
td(on)
tr
td(off)
tf
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
16
12
41
29
47
15
14
29
22
66
46
67
ns
ns
ns
VGS = 10 V, RGEN = 6 Ω
ns
VDS = 20 V, ID = 15.3 A,
VGS = 10 V
Qg
Qgs
Qgd
nC
nC
nC
FDS4070N3 Rev B1 (W)
Electrical Characteristics
TA = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
2.5
1.2
A
V
VSD
VGS = 0 V,
IS = 2.5 A (Note 2)
0.7
Voltage
trr
Diode Reverse Recovery Time
IF = 15.3 A,
diF/dt = 100 A/µs
32
39
nS
nC
Qrr
Diode Reverse Recovery Charge
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
40°C/W when
b)
85°C/W when mounted on
a minimum pad of 2 oz
copper
mounted on a 1in2 pad
of 2 oz copper
Scale 1 : 1 on letter size pape
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0
FDS4070N3 Rev B1 (W)
Typical Characteristics
60
3
2.6
2.2
1.8
1.4
1
VGS = 10V
7.0V
6.0V
5.5V
VGS = 5.0V
50
40
30
20
10
0
5.0V
5.5V
6.0V
7.0V
4.5V
10V
0.6
0
10
20
30
40
50
60
0
0.25
0.5
0.75
1
1.25
1.5
150
6
ID, DRAIN CURRENT (A)
V
DS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.015
1.8
1.6
1.4
1.2
1
ID = 7.7A
ID = 15.3A
GS = 10V
0.013
0.011
0.009
0.007
0.005
0.003
V
TA = 125oC
TA = 25oC
0.8
0.6
-50
-25
0
25
50
75
100
125
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
60
50
40
30
20
10
0
VGS = 0V
VDS = 5V
10
1
TA = 125oC
25oC
0.1
-55oC
TA =125oC
25oC
0.01
0.001
0.0001
-55oC
0
0.2
0.4
0.6
0.8
1
1.2
2.5
3
3.5
4
4.5
5
5.5
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4070N3 Rev B1 (W)
Typical Characteristics
4000
3000
2000
1000
0
10
f = 1MHz
VGS = 0 V
ID = 15.3
VDS = 10V
CISS
20V
8
6
4
2
0
30V
COSS
CRSS
0
10
20
30
40
0
10
20
30
40
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
1000
100
10
50
SINGLE PULSE
θJA = 85°C/W
= 25°C
R
40
30
20
10
0
100µs
T
A
RDS(ON) LIMIT
1ms
10ms
100ms
1s
10s
DC
1
VGS = 10V
SINGLE PULSE
R
θJA = 85oC/W
TA = 25oC
0.1
0.01
0.01
0.1
1
10
100
0.01
0.1
1
10
100
1000
VDS, DRAIN-SOURCE VOLTAGE (V)
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
RθJA = 85 °C/W
0.2
0.1
0.1
0.05
P(pk)
t1
t2
0.02
0.01
0.01
T
J - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDS4070N3 Rev B1 (W)
Dimensional Outline and Pad Layout
FDS4070N3 Rev B1 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
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â
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DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
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LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
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As used herein:
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systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
userꢀ
2ꢀ A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectivenessꢀ
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product developmentꢀ Specifications may change in
any manner without noticeꢀ
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later dateꢀ
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
designꢀ
No Identification Needed
Obsolete
Full Production
This datasheet contains final specificationsꢀ Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve designꢀ
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductorꢀ
The datasheet is printed for reference information onlyꢀ
Revꢀ I2
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