74LVX86MTCX [FAIRCHILD]
Low Voltage Quad 2-Input Exclusive-OR Gate; 低电压四2输入异或门
| 型号： | 74LVX86MTCX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Voltage Quad 2-Input Exclusive-OR Gate |
| 文件： | 总6页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1993
Revised February 2005
74LVX86
Low Voltage Quad 2-Input Exclusive-OR Gate
General Description
The LVX86 contains four 2-input exclusive-OR gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
Features
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
Package
Number
M14A
Package Description
74LVX86M
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX86SJ
74LVX86MTC
M14D
MTC14
MTC14
74LVX86MTCX_NL
(Note 1)
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A0–A3
Description
Inputs
B0–B3
Inputs
O0–O3
Outputs
© 2005 Fairchild Semiconductor Corporation
DS011605
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Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
DC Input Diode Current (IIK
VI 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK
VO 0.5V
)
0.5V to 7.0V
)
Supply Voltage (VCC
)
2.0V to 3.6V
0V to 5.5V
20 mA
Input Voltage (VI)
0.5V to 7V
Output Voltage (VO)
0V to VCC
)
Operating Temperature (TA)
40 C to 85 C
0 ns/V to 100 ns/V
20 mA
20 mA
Input Rise and Fall Time ( t/ V)
VO VCC 0.5V
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
DC Output Voltage (VO)
DC Output Source
0.5V to VCC 0.5V
or Sink Current (IO)
25 mA
DC VCC or Ground Current
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
(I CC or IGND
)
50 mA
65 C to 150 C
180 mW
Storage Temperature (TSTG
Power Dissipation
)
DC Electrical Characteristics
T
25 C
Typ
T
40 C to 85 C
A
A
V
Symbol
Parameter
Units
Conditions
CC
Min
1.5
2.0
2.4
Max
Min
Max
V
HIGH Level
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
1.5
2.0
2.4
IH
Input Voltage
V
V
V
V
LOW Level
0.5
0.8
0.8
0.5
0.8
0.8
IL
Input Voltage
V
V
V
HIGH Level
1.9
2.9
2.0
3.0
1.9
2.9
V
V
V
V
or V
or V
I
I
I
I
I
I
50
50
A
A
OH
OL
IN
IL
IH
OH
OH
OH
OL
OL
OL
Output Voltage
2.58
2.48
4 mA
LOW Level
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.1
50
50
A
A
IN
IL
IH
Output Voltage
0.44
1.0
4 mA
I
I
Input Leakage Current
A
A
V
V
5.5V or GND
V or GND
CC
IN
CC
IN
Quiescent Supply Current
2.0
20.0
IN
Noise Characteristics (Note 4)
V
T
25 C
Limit
CC
A
C
(pF)
Symbol
Parameter
Units
L
(V)
3.3
3.3
3.3
3.3
Typ
V
V
V
V
Quiet Output Maximum Dynamic V
0.3
0.3
0.5
0.5
2.0
0.8
V
V
V
V
50
OLP
OLV
IHD
ILD
OL
Quiet Output Minimum Dynamic V
50
50
50
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Note 4: Input t
t
3ns
r
f
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2
AC Electrical Characteristics
V
T
25 C
Typ
T
A
40 C to 85 C
CC
A
C
(pF)
Symbol
Parameter
Units
ns
L
(V)
Min
Max
14.5
18.0
9.3
Min
Max
17.5
21.0
11.0
14.5
1.5
t
t
Propagation
Delay Time
7.5
10.0
5.8
1.0
1.0
1.0
1.0
15
PLH
PHL
2.7
50
15
50
50
3.3 0.3
8.3
12.8
1.5
t
t
Output to Output
Skew (Note 5)
2.7
3.3
OSLH
OSHL
ns
1.5
1.5
Note 5: Parameter guaranteed by design. t
|t
t
|, t
|t
t
|
PHLn
OSLH
PLHm
PLHn OSHL
PHLm
Capacitance
T
25 C
Typ
T
40 C to 85 C
A
A
Symbol
Parameter
Units
Min
Max
Min
Max
C
C
Input Capacitance
Power Dissipation Capacitance (Note 6)
4
10
10
pF
pF
IN
18
PD
Note 6: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
相关型号：
74LVX86MX_NL
XOR Gate, LV/LV-A/LVX/H Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-120, SOIC-14
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