XRK32398IL-1_技术文档

PRELIMINARY

XRK32308

3.3V ZERO DELAY BUFFER

FEBRUARY 2007

REV.P1.0.3

The XRK32308–1H is the high-drive version of the –

1. Rise and fall times on this device are faster.

GENERAL DESCRIPTION

FUNCTIONAL DESCRIPTION

The XRK32308–2 allows the user to obtain 1X, and

XRK32308 is a 3.3V Zero Delay Buffer designed to 2X or X/2 depending on which Bank sources the FB

distribute high-speed clocks in PC, workstation, signal.

datacom, telecom, and other high-performance

applications.

The XRK32308–3 allows the user to obtain 4X and

2X frequencies or 1X and 2X.

The part has an on-chip PLL which locks to an input

The XRK32308–4 enables the user to obtain 2X

clock presented on the REF pin. The PLL feedback is

clocks on all outputs.

required to be driven into the FB pin, and can be

The XRK32308–5H is a high-drive version with REF/

2 on both banks.

obtained from one of the outputs. The input-to-output

skew is guaranteed to be less than 350 ps, and

output-to-output skew is guaranteed to be less than

200 ps.

FEATURES

• Zero input-output propagation delay, adjustable by

XRK32308 has two banks of four outputs each.

These can be controlled by the Select inputs as

shown in Table 2, “Select Input Decoding,” on page 2.

If all output clocks are not required, Bank B can be

three-stated. The select inputs also allow the input

clock to be directly applied to the output for chip and

system testing purposes.

capacitive load on FB input

• Multiple configurations, see “Available XRK32308

Configurations” table

• Multiple low-skew outputs

• Two banks of four outputs, three-stateable by two

select inputs

Multiple XRK32308 devices can accept the same

input clock and distribute it in a system. In this case,

the skew between the outputs of two devices is

guaranteed to be less than 700 ps.

• 10-MHz to 120-MHz operating range

• 75ps typical cycle-to-cycle jitter (15pF, 66MHz)

• Space-saving 16-pin 150-mil SOIC package, 16-pin

TSSOP or 16-pin QFN

XRK32308 devices are available in five different

configurations, as shown in Table 3, “Available

XRK32308 Configurations,” on page 3.

• 3.3V operation

• Industrial and commercial temperature available

The XRK32308–1 is the base part, where the output

frequencies equal the reference if there is no counter

in the feedback path.

FIGURE 1. BLOCK DIAGRAM AND PIN CONFIGURATION OF THE XRK32308

QA0 REF FB QA3

/2

FB

REF

QA0

QA1

V_DD

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

FB

PLL

MUX

REF

QA0

QA1

QA2

QA3

/2

QA3

QA2

V_DD

GND

QB3

QB2

S1

16

15

14

13

QA1

VDD

GND

QB0

1

2

3

4

12

11

10

QA2

VDD

GND

QB3

Extra Divider (-3, -4)

Extra Divider (-5H)

GND

QB0

QB1

S2

Select Input

Decoding

9

S1

/2

5

6

7

8

QB0

QB1

QB2

QB3

QB1 S2 S1 QB2

Extra Divider (-2, -3)

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

TABLE 1: PIN DESCRIPTION

SIGNAL

DESCRIPTION

SOIC/TSSOP

QFN

[1]

1

15

Input reference frequency

Clock output, Bank A

3.3V supply

REF

[2]

2

3

4

16

1

QA0

[2]

QA1

2

V

DD

5

6

3

4

GND

Ground

[2]

Clock output, Bank B

QB0

[2]

7

8

5

6

7

8

9

Clock output, Bank B

Select input, bit 2

QB1

[3]

S2

S1

[3]

9

Select input, bit 1

[2]

10

11

Clock output, Bank B

QB2

QB3

12

13

10

11

GND

Ground

V

3.3V supply

DD

[2]

14

15

16

12

13

14

Clock output, Bank A

PLL feedback input

QA2

QA3

FB

TABLE 2: SELECT INPUT DECODING

S2

0

S1

0

QA0-QA3

Three-State

Driven

QB0-QB3

Three-State

OUTPUT SOURCE

PLL

0

1

Three-State

[4]

1

0

Reference

Driven

1

Driven

PLL

NOTES:

1. Weak pull-down.

2. Weak pull-down on all outputs.

3. Weak pull-ups on these inputs.

4. Outputs inverted on XRK32308–2 and XRK32308–3 in bypass mode, S2 = 1 and S1 = 0.

2

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

TABLE 3: AVAILABLE XRK32308 CONFIGURATIONS

DEVICE

FEEDBACK FROM

BANK A FREQUENCY

BANK B FREQUENCY

Reference

XRK32308-1

XRK32308-1H

XRK32308-2

XRK32308-3

Bank A or Bank B

Reference

Bank A or Bank B

Bank A

Reference

Reference/2

Bank B

2 X Reference

Reference

[5]

Bank A

Reference or Reference

XRK32308-3

XRK32308-4

XRK32308-5H

Bank B

4 X Reference

2 X Reference

Reference/2

2 X Reference

Reference/2

Bank A or Bank B

NOTES:

5. Output phase is indeterminant (0° or 180° from input clock). If phase integrity is required, use the XRK32308–2.

ZERO DELAY AND SKEW CONTROL

FIGURE 2. REF INPUT TO QAX/QBX DELAY VS DIFFERENCE IN LOADING BETWEEN FB AND QAX/QBX PINS

1500

1000

500

0

-30

-25

-20

-15

-10

-5

0

5

10

15

20

25

30

-500

-1000

-1500

Output Load Difference: FB Load - QAx/QBx Load (pF)

Note: Target only, actual characterization curve may be slightly different.

To close the feedback loop of the XRK32308, the FB pin can be driven from any of the eight available output

pins. The output driving the FB pin will be driving a total load of 7 pF plus any additional load that it drives. The

relative loading of this output (with respect to the remaining outputs) can adjust the input-output delay. This is

shown in the graph above.

For applications requiring zero input-output delay, all outputs including the one providing feedback should be

equally loaded. If input-output delay adjustments are required, use the above graph to calculate loading

differences between the feedback output and remaining outputs.

For zero output-output skew, be sure to load outputs equally.

3

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

TABLE 4: ABSOLUTE MAXIMUM RATINGS

Supply Voltage to Ground Potential

-0.5V to +7.0V

DC Input Voltage (Except Ref)

-0.5V to V +0.5V

DD

DC Input Voltage REF

-0.5 to 7V

-65°C to +150°C

150°C

Storage Temperature

Junction Temperature

Static Discharge Voltage (per MIL-STD-883, Method 3015)

>2000V

TABLE 5: OPERATING CONDITIONS FOR XRK32308 COMMERCIAL TEMPERATURE DEVICES

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

V

Supply Voltage

3.0

3.6

V

DD

T

Operating Temperature (Ambient Temperature)

0

70

°C

A

Load Capacitance, below 100MHz

-

30

15

7

pF

C

L

Load Capacitance, from 100MHz to 120MHz

[6]

C

IN

Input Capacitance

t

Power-up time for all V s to reach minimum

0.05

50

ms

PU

DD

specified voltage (power ramps must be monotonic)

NOTES:

6. Applies to both Ref Clock and FB.

TABLE 6: ELECTRICAL CHARACTERISTICS FOR XRK32308 COMMERCIAL TEMPERATURE DEVICES

PARAMETER

DESCRIPTION

TEST CONDITIONS

MIN

MAX

UNIT

V

Input Low Voltage

-

0.8

V

IL

IH

Input High Voltage

Input Low Current

Input High Current

2.0

-

V

µA

V

I

V =0V

-

50.0

100.0

0.4

IL

IH

IN

V =V

IN

DD

[7]

V

I

= 8mA (-1, -2, -3, -4)

= 12mA (-1H, -5H)

OL

Output Low Voltage

OL

V

I

= -8mA (-1, -2, -3, -4)

= -12mA (-1H, -5H)

2.4

-

V

OH

Output High Voltage

OH

4

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

TABLE 6: ELECTRICAL CHARACTERISTICS FOR XRK32308 COMMERCIAL TEMPERATURE DEVICES

PARAMETER

DESCRIPTION

TEST CONDITIONS

MIN

MAX

UNIT

mA

Unloaded outputs, 100-MHz REF,

-

45.0

Select inputs at V or GND

DD

70

mA

(-1H, -5H)

I

Supply Current

DD

Unloaded outputs, 66-MHz REF

(-1, -2, -3, -4)

-

32.0

mA

Unloaded outputs, 33-MHz REF

(-1, -2, -3, -4)

18.0

NOTES:

7. Parameter is guaranteed by design and characterization. Not 100% tested in production.

[8]

TABLE 7: SWITCHING CHARACTERISTICS FOR XRK32308 COMMERCIAL TEMPERATURE DEVICES

PARAMETER

NAME

TEST CONDITIONS

MIN

10

TYP

MAX

100

120

UNIT

MHz

30-pF load, All devices

-

[9]

10

t

Output Frequency

20-pF load, -1H, -5H devices

1

15-pF load, -1, -2, -3, -4 devices

10

-

120

MHz

%

Measured at 1.4V, F

30-pF load

=66.66MHz

40.0

50.0

60.0

OUT

[7]

Duty Cycle = t ÷ t

2

1

DC

(-1, -2, -3, -4, -1H, -5H)

Measured at 1.4V, F

15-pF load

<50.0MHz

45.0

50.0

55.0

%

OUT

Measured between 0.8V and 2.0V,

30-pF load

-

2.20

1.50

ns

[7]

Rise Time

(-1, -2, -3, -4)

Measured between 0.8V and 2.0V,

15-pF load

t

3

[7]

Measured between 0.8V and 2.0V,

30-pF load

Rise Time

(-1H, -5H)

Measured between 0.8V and 2.0V,

30-pF load

-

2.20

1.50

1.25

ns

[7]

Fall Time

(-1, -2, -3, -4)

Measured between 0.8V and 2.0V,

15-pF load

t

4

[7]

Measured between 0.8V and 2.0V,

30-pF load

Fall Time

(-1H, -5H)

5

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

[8]

TABLE 7: SWITCHING CHARACTERISTICS FOR XRK32308 COMMERCIAL TEMPERATURE DEVICES

PARAMETER

NAME

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output to Output Skew on All outputs equally loaded

same Bank

-

200

ps

[7]

(-1, -2, -3, -4)

Output to Output Skew

All outputs equally loaded

-

200

ps

[7]

(-1H, -5H)

t

5

Output Bank A to Output All outputs equally loaded

Bank B Skew

(-1, -4, -5H)

Output Bank A to Output All outputs equally loaded

-

400

ps

Bank B Skew

(-2, -3)

t

Delay, REF Rising Edge to Measured at V /2

-

0

+250

700

ps

6

7

8

DD

[7]

FB Rising Edge

[7]

Measured at V /2 on the FB pins of

Device to Device Skew

DD

devices

[7]

Measured between 0.8V and 2.0V on

-1H, -5H device using Test Circuit #2

1

-

75

-

V/ns

ps

Output Slew Rate

Measured at 66.67MHz, loaded outputs,

15-pF load

200

100

400

1.0

[7]

Measured at 66.67MHz, loaded outputs,

30-pF load

ps

Cycle to Cycle Jitter

(-1, -1H, -4, -5H)

Measured at 120MHz, loaded outputs,

15-pF load

-

ps

t

J

Measured at 66.67MHz, loaded outputs,

30-pF load

-

ps

[7]

Cycle to Cycle Jitter

(-2, -3)

Measured at 66.67MHz, loaded outputs,

15-pF load

-

ps

[7]

t

Stable power suppy, valid clock

presented on REF and FB pins

-

ms

LOCK

PLL Lock Time

NOTES:

8. All parameters are specified with loaded outputs.

9. XRK32308 has maximum input frequency of 120MHz and maximum output of 66.67MHz.

6

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

TABLE 8: OPERATING CONDITIONS FOR XRK32308 INDUSTRIAL TEMPERATURE DEVICES

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

V

Supply Voltage

3.0

3.6

V

DD

T

Operating Temperature (Ambient Temperature)

-40

85

°C

A

Load Capacitance, below 100MHz

-

30

15

7

pF

C

L

Load Capacitance, from 100MHz to 120MHz

[6]

C

IN

Input Capacitance

t

Power-up time for all V s to reach minimum

0.05

50

ms

PU

DD

specified voltage (power ramps must be monotonic)

TABLE 9: ELECTRICAL CHARACTERISTICS FOR XRK32308 INDUSTRIAL TEMPERATURE DEVICES

PARAMETER

DESCRIPTION

TEST CONDITIONS

MIN

MAX

UNIT

V

Input Low Voltage

-

0.8

V

IL

IH

Input High Voltage

Input Low Current

Input High Current

2.0

-

I

V =0V

-

50.0

100.0

0.4

µA

V

IL

IH

IN

V =V

IN

DD

[7]

V

I

= 8mA (-1, -2, -3, -4)

= 12mA (-1H, -5H)

OL

Output Low Voltage

OL

V

I

= -8mA (-1, -2, -3, -4)

= -12mA (-1H, -5H)

2.4

-

V

OH

Output High Voltage

OH

Unloaded outputs, 100 MHz REF,

-

45.0

mA

Select inputs at V or GND

DD

70

(-1H, -5H)

I

Supply Current

DD

Unloaded outputs, 66-MHz REF

(-1, -2, -3, -4)

-

35.0

mA

Unloaded outputs, 33-MHz REF

(-1, -2, -3, -4)

20.0

7

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

[8]

TABLE 10: SWITCHING CHARACTERISTICS FOR XRK32308 INDUSTRIAL TEMPERATURE DEVICES

PARAMETER

NAME

TEST CONDITIONS

MIN

10

TYP

MAX

UNIT

MHz

30-pF load, All devices

-

100

120

[9]

10

t

Output Frequency

20-pF load, -1H, -5H devices

1

15-pF load, 01, 02, 03, 04 devices

10

-

120

MHz

%

Measured at 1.4V, F

30-pF load

=66.66MHz

40.0

50.0

60.0

OUT

[7]

Duty Cycle = t ÷ t

2

1

DC

(-1, -2, -3, -4, -1H, -5H)

Measured at 1.4V, F

15-pF load

<50.0MHz

45.0

50.0

55.0

%

OUT

Measured between 0.8V and 2.0V,

30-pF load

-

2.5

ns

[7]

Rise Time

(-1, -2, -3, -4)

Measured between 0.8V and 2.0V,

15-pF load

1.50

t

3

[7]

Measured between 0.8V and 2.0V,

30-pF load

Rise Time

(-1H, -5H)

Measured between 0.8V and 2.0V,

30-pF load

-

2.50

1.50

1.25

ns

[7]

Fall Time

(-1, -2, -3, -4)

Measured between 0.8V and 2.0V,

15-pF load

t

4

[7]

Measured between 0.8V and 2.0V,

30-pF load

Fall Time

(-1H, -5H)

Output to Output Skew on All outputs equally loaded

same Bank

-

200

ps

[7]

(-1, -2, -3, -4)

Output to Output Skew

(-1H, -5H)

All outputs equally loaded

-

200

ps

t

5

Output Bank A to Output All outputs equally loaded

Bank B Skew

(-1, -4, -5H)

Output Bank A to Output All outputs equally loaded

-

400

ps

Bank B Skew

(-2, -3)

t

Delay, REF Rising Edge to Measured at V /2

-

0

-

+250

700

ps

6

7

8

DD

[7]

FB Rising Edge

[7]

Measured at V /2 on the FB pins of

DD

Device to Device Skew

devices

[7]

Measured between 0.8V and 2.0V on

-1H, -5H device using Test Circuit #2

1

V/ns

Output Slew Rate

8

PRELIMINARY

XRK32308

3.3V ZERO DELAY BUFFER

[8]

REV. P1.0.3

TABLE 10: SWITCHING CHARACTERISTICS FOR XRK32308 INDUSTRIAL TEMPERATURE DEVICES

PARAMETER

NAME

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Measured at 66.67MHz, loaded outputs,

15-pF load

-

75

200

ps

[7]

Measured at 66.67MHz, loaded outputs,

30-pF load

-

200

100

400

1.0

ps

ms

Cycle to Cycle Jitter

(-1, -1H, -4, -5H)

Measured at 120MHz, loaded outputs,

15-pF load

t

J

Measured at 66.67MHz, loaded outputs,

30-pF load

[7]

Cycle to Cycle Jitter

(-2, -3)

Measured at 66.67MHz, loaded outputs,

15 pF load

[7]

t

Stable power suppy, valid clocks

presented on REF and FB pins

LOCK

PLL Lock Time

FIGURE 3. SWITCHING WAVEFORMS

Duty Cycle Timing

All Outputs Rise/Fall Time

t₁

3.3V

0V

t₂

1.4V

OUTPUT 2.0V

0.8V

2.0V

0.8V

1.4V

t₃

t₄

Output-Output Skew

Input-Output Skew

1.4V

V_DD/2

OUTPUT

INPUT

FB

1.4V

V_DD/2

OUTPUT

t₅

t₆

Device-Device Skew

V_DD/2

FB, Device 1

FB, Device 2

V_DD/2

t₇

9

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

FIGURE 4. TEST CIRCUIT

Test Circuit #1

V_DD

Test Circuit #2

V_DD

1KΩ

QAx/QBx

10pF

QAx/QBx

C_LOAD

0.1µF

Outputs

0.1µF

Outputs

V_DD

GND GND

Test Circuit for all parameters except t

.

Test Circuit for t ₈. Output slew rate on -1H, -5 device.

8

10

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

TABLE 11: ORDERING INFORMATION

PART ORDERING NUMBER

PACKAGE TYPE

16 Pin SOIC

16 Pin QFN

16 Pin SOIC

16 Pin TSSOP

16 Pin QFN

16 Pin SOIC

16 Pin QFN

16 Pin SOIC

16 Pin QFN

16 Pin SOIC

OPERATING TEMPERATURE RANGE

XRK32308CD-1

XRK32308CDTR-1

XRK32308ID-1

0° to +70°

-40° to +85°

0° to +70°

XRK32308IDTR-1

XRK32308CL-1

XRK32398IL-1

-40° to +85°

0° to +70°

XRK32308CD-1H

XRK32308CDTR-1H

XRK32308ID-1H

XRK32308IDTR-1H

XRK32308CG-1H

XRK32308CGTR-1H

XRK32308IG-1H

XRK32308IGTR-1H

XRK32308CL-1H

XRK32308IL-1H

XRK32308CD-2

XRK32308CDTR-2

XRK32308ID-2

0° to +70°

-40° to +85°

0° to +70°

-40° to +85°

0° to +70°

-40° to +85°

0° to +70°

-40° to +85°

0° to +70°

XRK32308IDTR-2

XRK32308CL-2

XRK32308IL-2

-40° to +85°

0° to +70°

XRK32308CD-3

XRK32308CDTR-3

XRK32308ID-3

0° to +70°

-40° to +85°

0° to +70°

XRK32308IDTR-3

XRK32308CL-3

XRK32308IL-3

-40° to +85°

0° to +70°

XRK32308CD-4

XRK32308CDTR-4

XRK32308ID-4

0° to +70°

-40° to +85°

XRK32308IDTR-4

11

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

TABLE 11: ORDERING INFORMATION

PART ORDERING NUMBER

XRK32308CL-4

PACKAGE TYPE

16 Pin QFN

16 Pin SOIC

16 Pin QFN

OPERATING TEMPERATURE RANGE

0° to +70°

-40° to +85°

0° to +70°

-40° to +85°

XRK32308IL-4

XRK32308CD-5H

XRK32308CDTR-5H

XRK32308CL-5H

XRK32308IL-5H

12

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

PACKAGE DRAWINGS AND DIMENSIONS

16 LEAD SMALL OUTLINE

(150 MIL JEDEC SOIC)

rev. 1.00

D

16

9

E

H

1

8

C

A

Seating

Plane

α

e

B

A₁

L

Note: The control dimension is the millimeter column

INCHES MILLIMETERS

MAX

SYMBOL

MIN

1.35

0.10

0.33

0.19

9.80

3.80

MAX

A

0.053

0.004

0.013

0.007

0.386

0.150

0.069

0.010

0.020

0.010

0.394

0.157

1.75

0.25

0.51

0.25

10.00

4.00

A

1

B

C

D

E

e

0.050 BSC

1.27 BSC

H

L

0.228

0.016

0°

0.244

0.050

8°

5.80

0.40

0°

6.20

1.27

8°

α

13

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

16 LEAD TSSOP THIN SHRINK SMALL OUTLINE

(4.4mm TSSOP)

Rev. 1.0

INCHES

MILLIMETERS

SYMBOL

MIN

MAX

MIN

MAX

A

A1

A2

B

C

D

E

E1

e

0.031

0.002

0.031

0.007

0.004

0.193

0.248

0.169

0.043

0.006

0.037

0.012

0.008

0.201

0.260

0.177

0.80

0.05

0.80

0.19

0.09

4.90

6.30

4.30

1.10

0.15

0.95

0.30

0.20

5.10

6.60

4.50

0.0256 BSC

0.65 BSC

L

0.018

0°

0.030

8°

0.45

0°

0.75

8°

α

14

PRELIMINARY

XRK32308

REV. P1.0.3

3.3V ZERO DELAY BUFFER

16 LEAD QUAD FLAT NO LEAD

(4 mm x 4 mm x 0.9mm, 0.65 pitch QFN)

Rev. 1.02

Note: the actual center pad

is metallic and the size (D2)

is device-dependent w/ a

typical tolerance of 0.3mm

Note: The control dimension is in millimeter.

INCHES MILLIMETERS

SYMBOL

MIN

MAX

MIN

MAX

1.00

A

A1

A3

D

0.031

0.039

0.80

0.00

3.90

2.20

0.25

0.000

0.154

0.087

0.010

0.002

0.008

0.161

0.102

0.014

0.05

0.20

4.10

2.60

0.35

D2

b

e

0.0256 BSC

0.018 0.026

0.65 BSC

0.65

L

0.45

15

XRK32308

PRELIMINARY

3.3V ZERO DELAY BUFFER

REV.P1.0.3

REVISIONS

REV. #

P1.0.0

P1.0.1

P1.0.2

P1.0.3

DATE

DESCRIPTION OF CHANGES

04/05/06

04/21/06

05/12/06

02/01/07

Initial release.

Ordering information edit: Added "H" to last two product numbers.

Operating range changed to 10MHz to 120MHz - edit all references of this.

Add QFN package.

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to

improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any

circuits described herein, conveys no license under any patent or other right, and makes no representation that

the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration

purposes and may vary depending upon a user’s specific application. While the information in this publication

has been carefully checked; no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the

failure or malfunction of the product can reasonably be expected to cause failure of the life support system or

to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless

EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has

been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately

protected under the circumstances.

Datasheet February 2007.

Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

16


型号：	XRK32398IL-1
厂家：	EXAR CORPORATION
描述：	3.3V ZERO DELAY BUFFER 3.3V零延迟缓冲器
文件：	总16页 (文件大小：374K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

XRK32398IL-1 [EXAR]

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