SP312AET-L [EXAR]

Enhanced RS-232 Line Drivers/Receivers; 增强型RS - 232线路驱动器/接收器


型号：	SP312AET-L
厂家：	EXAR CORPORATION
描述：	Enhanced RS-232 Line Drivers/Receivers 增强型RS - 232线路驱动器/接收器驱动器接口集成电路光电二极管信息通信管理
文件：	总13页 (文件大小：656K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SP233A,SP310A and SP312A

Enhanced RS-232 Line Drivers/Receivers

FEATURES

• Operates from a Single +5V Power Supply

• Meets all RS-232F and ITU V.28 Speciﬁcations

• Operates with 0.ꢀμF Ceramic Capacitors

• No External Capacitors required (SP233A)

• Low Power Shutdown (SP3ꢀ0A, SP3ꢀ2A)

• High Data Rate - ꢀ20kbps under load

• Low power CMOS Operation

• +/-2kV Human Body Model ESD Protection

• Lead Free packaging available

DESCRIPTION

The SP233A / SP3ꢀ0A / SP3ꢀ2A devices are a family of line driver and receiver pairs that meets

the speciﬁcations of RS-232 and V.28 serial protocols. The devices are pin-to-pin compatible with

popular industry standard pinouts. The SP233A / SP3ꢀ0A / SP3ꢀ2A offer ꢀ20kbps data rate under

load, small ceramic type 0.ꢀμF charge pump capacitors and overall ruggedness for comercial appli-

cations. Features include Exar's BiCMOS design allowing for low power operation without sacriﬁcing

performance. These devices are available in plastic DIP and SOIC Wide packages operating over

the commercial and industrial temperature ranges.

SELECTION TABLE

Model

Number of RS-232

Drivers Receivers

No. of RX

active in

Shutdown

No. of External

0.ꢀμF Capacitors

Shutdown

WakeUp TTL Tri-State

SP233A

SP3ꢀ0A

SP3ꢀ2A

N/A

Yes

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A ꢀ00_05ꢀ308

ꢀ

AbSoLUTE MAxꢀMUM RATꢀꢁgS

These are stress ratings only and functional opera-

tion of the device at these ratings or any other above

those indicated in the operation sections of the speci-

ﬁcations below are not implied. Exposure to absolute

maximum ratings conditions for extended periods of

time may affect reliability.

Short Circuit duration

Tout.....................................................Continuous

Package Power Dissipation:

Plastic DIP...............................................375mW

(derate 7mW/°C above +70°C)

Supply Voltage (VCC)....................................................+ 6V

V+........................................................................... (Vcc-0.3V)to+ꢀꢀ.0V

V- .............................................................................-ꢀꢀ.0V

Input Voltages

Small Outline...........................................375mW

(derate 7mW/°C above +70°C)

Storage Temperature..................-65°C to +ꢀ50°C

Lead Temperature (soldering, ꢀ0s).......... +300°C

Tin.....................................................-0.3V to (Vcc + 0.3V)

Rin............................................................................+/-30V

Output Voltages

Tout...............................................(V+, +0.3V) to (V-, -0.3V

Rout...................................................-0.3V to (Vcc + 0.3V)

ELECTRꢀCAL CHARACTERꢀSTꢀCS

Vcc=5V ±ꢀ0%, 0.ꢀμF charge pump capacitors, Tmin to Tmax, unless otherwise noted, Typical values are Vcc=5V

and Ta=25°C

PARAMETER

TEST CoꢁDꢀTꢀoꢁS

Mꢀꢁ

TYP

MAx

UꢁꢀT

TTL ꢀꢁPUT

Logic Threshold LOW

Logic Threshold HIGH

Logic Pull-Up Current

TTL oUTPUT

Tin, En, SD, On/OFF

Tin = 0V

0.8

Volts

μA

2.0

ꢀ5

200

0.4

Output Voltge LOW

Output Voltage HIGH

iOuT = 3.2ma: Vcc = +5V

iOuT = -1.0ma

Volts

3.5

En = Vcc, 0V ≤ VOuT ≤ Vcc

SP3ꢀ0A and SP3ꢀ2A only

0.05

+/-ꢀ0

μA

Leakage Current; Ta=25°C

RS-232 oUTPUT

all Transmitter outputs loaded

with 3k ohms to GND

Output Voltage Swing

+/-5.0

300

+/-9V

Volts

Output Resistance

Output Short Circuit Current

Maximum Data Rate

RS-232 ꢀꢁPUT

Vcc = 0V, Vout = +/-2V

Inﬁnite Duration

Ohms

+/-ꢀ8

240

CL = 2500pF, RL = 3kΩ

ꢀ20

kbps

Voltage Range

-25

0.8

+25

Volts

kΩ

Voltage Threshold LOW

Voltage Threshold HIGH

Hysteresis

ꢀ.2

ꢀ.7

0.5

Vcc = 5V, Ta=25°C

2.4

ꢀ.0

Vcc = 5V, Ta=25°C

0.2

Vcc = 5V, Ta=25°C

Resistance

Ta=25°C, -25V ≤ Vin ≤ +25V

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A_ꢀ00_05ꢀ308

ELECTRꢀCAL CHARACTERꢀSTꢀCS

Vcc=5V ±ꢀ0%, 0.ꢀμF charge pump capacitors, Tmin to Tmax, unless otherwise noted, Typical values are Vcc=5V

and Ta=25°C

Parameter

TEST CONDITIONS

MIN

TYP

MAX

Unit

DYꢁAMꢀC CHARACTERꢀSTꢀCS

Driver Propagation Delay

Receiver Propagation Delay

Instantaneous Slew Rate

TTL to RS_232; CL = 50pF

RS-232 to TTL,

ꢀ.5

0.ꢀ

3.0

ꢀ.0

μs

CL = 10pF, RL = 3-7kΩ

V/ μs

CL = 2500pF, RL = 3kΩ;

Measured from +3V to -3V or

-3V to +3V

Transition Region Slew Rate

ꢀ0

V/ μs

Output Enable Time

SP3ꢀ0A and SP3ꢀ2A only

400

250

Output Disable Time

PoWER REQUꢀREMEꢁTS

Vcc Power Supply Current

No Load, Vcc = 5V, Ta=25°C

ꢀ0

ꢀ5

ꢀ0

All Transmitters RL = 3kΩ,

T^a=25°C

Vcc Power Supply Current, Loaded

Shutdown Supply Current

SP3ꢀ0A and SP3ꢀ2A only

Vcc = 5V, Ta=25°C

ꢀ

μA

Pꢀꢁ ASSꢀgꢁMEꢁTS

20 pin PDIP

20 pin WSOIC

ꢀ8 pin WSOIC

ꢀ8 pin PDIP / WSOIC

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A ꢀ00_05ꢀ308

DESCRꢀPTꢀoꢁ

DETAꢀLED DESCRꢀPTꢀoꢁ

Receivers

The SP233A, SP3ꢀ0A and SP3ꢀ2A devices

are a family of line driver and receiver pairs that

meet the EIA/TIA-232 and V.28 serial commu-

nication protocols. These devices are pin-to-pin

compatible with popular industry standards. The

SP233A, SP3ꢀ0A and SP3ꢀ2A devices offer a

ꢀ20kbps data rate, ꢀ0V/μs slew rate and an on-

board charge pump that operates from a single

5V supply using 0.ꢀμF ceramic capacitors. The

ESD tolerance has been improved on these de-

vices to +/-2kV Human Body Model.

The receivers convert EIA/TIA-232 signal levels

to TTL or CMOS logic output levels. Since the

input is usually from a transmission line, where

long cable length and system interference can

degrade the signal, the inputs have a typical

hysteresis margin of 500mV. This ensures that

the receiver is virtually immune to noisy trans-

mission lines. Should an input be left uncon-

nected, an internal 5kohm pull-down resistor to

ground will commit the output of the receiver to

a HIGH state.

The SP233A device provides internal charge

pump capacitors. The SP3ꢀ0A provides an ON/

OFF input that simultaneously disables the in-

ternal charge pump circuit and puts all transmit-

ter and receiver outputs into a high impedance

state. The SP3ꢀ2A is identical to the SP3ꢀ0 but

with seperate tri-state and shutdown inputs

Charꢃe pump

The charge pump is a patented design and

uses a unique approach compared to older

less efﬁciant designs. The charge pump re-

quires 4 external capacitors and uses a four

phase voltage shifting technique. The internal

power supply consists of a dual charge pump

that provides a driver output voltage swing of

+/-9V. The internal oscillator controls the four

phases of the voltage shifting. A description of

each phase follows:

Theꢂry of operatiꢂn

The SP233A, SP3ꢀ0A and SP3ꢀ2A devices are

made up of three basic circuit blocks: ꢀ. Drivers,

2. Receivers, and 3. charge pump.

Phase 1

Drivers

Vss charge store and double: The positive ter-

minals of capacitors Cꢀ and C2 are charged

from Vcc with their negative terminals initially

connected to ground. Cꢀ+ is then connected

to ground and the stored charge from Cꢀ- is

superimposed onto C2-. Since C2+ is still con-

nected to Vcc the voltage potential across C2

is now 2 x Vcc.

The drivers are inverting level transmitters that

convert TTL or CMOS logic levels to EIA/TIA-

232 levels with an inverted sense relative to the

input logic levels. Typically, the driver output

voltage swing is +/-9V. Even under worst case

loading conditions of 3kOhms and 2500pF, the

driver output is guaranteed to be +/-5.0V mini-

mum, thus satisfying the RS-232 speciﬁcation.

The driver outputs are protected against inﬁnite

short-circuits to ground without degradation in

reliability.

Phase 2

Vss transfer and invert: Phase two connects

the negative terminal of C2 to the Vss storage

capacitor and the positive terminal of C2 to

ground. This transfers the doubled and inverted

(V-) voltage onto C4. Meanwhile, capacitor Cꢀ

is charged from Vcc to prepare it for its next

phase.

The drivers can guarantee output data rates of

ꢀ20kbps under worst case loading of 3k ohms

and 2500pF.

The Slew rate of the driver output is internally

limited to 30V/ μs in order to meet the EIA stan-

dards (EIA-232F). Additionally, the driver out-

puts LOW to HIGH transition meets the mon-

tonic output requirements of the standard.

Phase 3

Vdd charge store and double: Phase three is

identical to the ﬁrst phase. The positive termi-

nals of Cꢀ and C2 are charged from Vcc with

their negative terminals initially connected to

ground. Cꢀ+ is then connected to ground and

the stored charge from Cꢀ- is superimposed

onto C2-. Since C2+ is still connected to Vcc

the voltage potential across capacitor C2 is

now 2 x Vcc.

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DESCRꢀPTꢀoꢁ

Phase 4

After the ring indicator has propagated

Vdd transfer: The fourth phase connects the

negative terminal of C2 to ground and the posi-

tive terminal of C2 to the Vdd storage capacitor.

This transfers the doubled (V+) voltage onto C3.

Meanwhile, capacitor Cꢀ is charged from Vcc to

prepare it for its next phase.

through the SP3ꢀ2A receiver, it can be used

to trigger the power management circuitry of

the computer to power up the microproces-

sor, and bring the SD pin of the SP3ꢀ2A to a

logic high, taking it out of the shutdown mode.

The receiver propagation delay is typically

ꢀus. The enable time for V+ and V- is typi-

cally 2ms. After V+ and V- have settled to their

ﬁnal values, a signal can be sent back to the

modem on the data terminal ready (DTR) pin

signifying that the computer is ready to accept

the transmit data.

The clock rate for the charge pump typically op-

erates at greater than ꢀ5kHz allowing the pump

to run efﬁciently with small 0.1uF capacitors. Ef-

ﬁcient operation depends on rapid charging and

discharging of Cꢀ and C2, therefore capacitors

should be mounted as close as possible to the

IC and have low ESR (equivalent series resis-

tance). Inexpensive surface mount, ceramic ca-

pacitors are ideal for using on charge pump. If

polarized capacitors are used the positive and

negative terminals should be connected as

shown in the typical operating circuit. A diagram

of the individual phases are shown in Figure ꢀ.

Power

Receiver

SD EN Up/Down outputs

ꢀ

Down

Enabled

Tri-state

Enabled

Tri-state

Shutdꢂwn (SD) and Enaꢄle (Eꢁ) features fꢂr

the SP310A and SP312A

Table ꢀ. Wake-up Function truth table

Both the SP3ꢀ0A and SP3ꢀ2A have a shutdown

/ standby mode to conserve power in battery-

powered applications. To activate the shutdown

mode, which stops the operation of the charge

pump, a logic "0" is applied to the appropriate

control line. For the SP3ꢀ0A, this control line is

the ON/OFF (pin ꢀ8) input. Activating the shut-

down mode puts the SP3ꢀ0A transmitter and re-

ceiver ouptuts into a high impedance condition.

For the SP3ꢀ2A, this control line is the SHUT-

DOWN (pinꢀ8) input; this also puts the transmit-

ter outputs in a tri-state mode. The receiver out-

puts can be tri-stated seperately during normal

operation or shutdown by applying a logic "ꢀ" on

the EN line (pin ꢀ).

Pin Strappinꢃ fꢂr the SP233ACT/ACP

The SP233A packaged in a 20 pin SOICW

package (SP233ACT) has a slightly different

pinout than the SP233A in PDIP packaging

(SP233ACP). To operate properly, the fol-

lowing pairs of pins must be externally wired

together as noted in table 2:

Pins Wired

Together

SOICW

ꢀ0 & ꢀ7

PDIP

Two V- pins

ꢀ2 & ꢀ7

ꢀꢀ & ꢀ5

ꢀ0 & ꢀ6

Two C2+ pins ꢀ2 & ꢀ5

Two C- pins ꢀꢀ & ꢀ6

Wake-Up Feature fꢂr the SP312A

The SP3ꢀ2A has a wake-up feature that keeps

the receivers active when the device is placed

into shutdown. Table 1 deﬁnes the truth table for

the Wake-Up function. When only the receivers

are activated, the SP3ꢀ2A typically draws less

than 5uA supply current. In the case of when

a modem is interfaced to a computer in power

down mode, the Ring Indicator (RI) signal from

the modem would be used to "wake-up" the

computer, allowing it to accept data transmis-

sion.

No Connections for

Pins 8, ꢀ3 and ꢀ4

Connect Pins 6 and 9

to GND

Table 2. Pin Strapping table for SP233A

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Phase 2 – Vss transfer from C2 to C4.

Meanwhile C1 is charged to Vcc

V+

Phases 1 and 3: Store/Double.

Double charge from C1 onto C2.

C2 is now charged to -2xVcc

Vss

V+

Patented 5,306,954

V-

Phase 4 VDD

transfer from C2 to C3.

Meanwhile C1 is charged to Vcc

V+

V-

Figure ꢀ. Charge pump phases

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TYPꢀCAL PERFoRMAꢁCE CHARACTERꢀSTꢀCS

Figure 5, Charge pump outputs at

start up (ꢀ = Vcc, 2 = V+, 3 = V-).

Figure 2, SP233A Charge pump waveforms-

no load (ꢀ = Cꢀ+, 2 = C2+, 3 = V+, 4 = V-).

Figure 3, SP233A Charge pump waveforms

when fully loaded with 3Kohms (ꢀ = Cꢀ+, 2

= C2+, 3 = V+, 4 = V-).

Figure 4, Loopback results at 60KHZ and

2500pF load (ꢀ = TXin, 2 = TXout/RXin, 3 =

RXout).

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A ꢀ00_05ꢀ308

Figure 6, SP233ACP Typical Application

circuit

Figure 8, SP233ACT Typical Application

circuit

Figure 7, SP3ꢀ0A Typical Application

circuit

Figure 9, SP3ꢀ2A Typical Application

circuit

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A_ꢀ00_05ꢀ308

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A ꢀ00_05ꢀ308

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A_ꢀ00_05ꢀ308

ꢀ0

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A ꢀ00_05ꢀ308

ꢀꢀ

Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (5ꢀ0)668-7000 • Fax (5ꢀ0)668-70ꢀ7 • www.exar.com SP233A,3ꢀ0A,3ꢀ2A_ꢀ00_05ꢀ308

ꢀ2

ORDERING INFORMATION

Part numꢄer LEAD FREE Tape & Reel Temperature ranꢃe

Packaꢃe Type

SP233ACP

SP233AEP

SP233ACT

SP233AET

SP3ꢀ0ACP

SP3ꢀ0ACT

SP3ꢀ0AET

SP3ꢀ2ACT

SP3ꢀ2AET

-L

From 0 to +70⁰C

From -40 to +85⁰C

From 0 to +70⁰C

From -40 to +85⁰C

From 0 to +70⁰C

From -40 to +85⁰C

From 0 to +70⁰C

From -40 to +85⁰C

20 pin PDIP

/TR

20 pin SOICW

ꢀ8 pin PDIP

/TR

ꢀ8 pin SOICW

All packages are available as lead free (RoHS compliant). To order add “-L” sufﬁx to part number.

For Tape and Reel add “/TR”. Reel quantity is ꢀ,500 for SOICW.

Example: SP233ACT-L/TR = lead free and Tape and Reel. SP233ACT/TR = standard with Tape

and Reel.

Notice

EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliabil-

ity. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for

illustration purposes and may vary depending upon a user's speciﬁc application. While the information in this publication has been carefully checked;

no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can

reasonably be expected to cause failure of the life support system or to signiﬁcantly affect its safety or effectiveness. Products are not authorized for

use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been

minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.

Datasheet May 2008

Send your Interface technical inquiry with technical details to: customersupport@exar.com

Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

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ꢀ3

SP312AET-L [EXAR]

相关型号：

SP312AET-L/TR

SP312AET-L/TR

SP312AET/TR

SP312AMD

SP312E

SP312E

SP312ECA

SP312ECA-L

SP312ECA/TR

SP312ECP

SP312ECT

SP312ECT-L