SP312AET/TR [SIPEX]

Enhanced RS-232 Line Drivers/Receivers; 增强型RS - 232线路驱动器/接收器
SP312AET/TR
型号: SP312AET/TR
厂家: SIPEX CORPORATION    SIPEX CORPORATION
描述:

Enhanced RS-232 Line Drivers/Receivers
增强型RS - 232线路驱动器/接收器

线路驱动器或接收器 驱动程序和接口 接口集成电路 光电二极管 信息通信管理
文件: 总16页 (文件大小:914K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Solved by  
SP232A/233A/310A/312A  
Enhanced RS-232 Line Drivers/Receivers  
TM  
FEATURES  
C
1
+
1
2
3
4
5
16  
15  
14  
13  
12  
V
CC  
Operates from Single +5V Power Supply  
V+  
GND  
OUT  
Meets All RS-232F and ITU V.28  
C -  
1
T1  
Specifications  
C2+  
R
1
IN  
Operates with 0.1µF to 1µF Capacitors  
High Data Rate – 120Kbps Under Load  
Low Power CMOS – 3mA Operation (SP232A)  
No External Capacitors Required (SP233A)  
Low Power Shutdown (SP310A,SP312A)  
Enhanced ESD Protection (2kV Human  
Body Model)  
C -  
2
R
1
OUT  
Available in Lkaging  
V-  
6
7
8
11  
10  
9
T1  
IN  
IN  
T
2
OUT  
T2  
R2IN  
R OUT  
2
Now Available in Lead Free Packaging  
DESCRIPTION  
TheSP232A/233A/310A/312Adevicesareafamilyoflinedriverandreceiverpairsthatmeetthe  
specificationsofRS-232andV.28serialprotocols. Thesedevicesarepin-to-pincompatiblewith  
popular industry standards. As with the initial versions, the SP232A/233A/310A/312A devices  
feature at least 120Kbps data rate under load, 0.1µF charge pump capacitors, and overall  
ruggedness for commercial applications. This family also features Sipex's BiCMOS design  
allowing low power operation without sacrificing performance. The series is available in plastic  
DIP and SOIC packages operating over the commercial and industrial temperature ranges.  
SELECTION TABLE  
SP232A  
SP233A  
SP310A  
SP312A  
2
2
2
2
2
2
2
2
N//A  
N/A  
0
4
0
4
4
No  
No  
Yes  
Yes  
No  
No  
No  
No  
No  
Yes  
Yes  
2
Yes  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ABSOLUTE MAXIMUM RATINGS  
This is a stress rating only and functional operation of the device at  
these or any other conditions above those indicated in the operation  
sections of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods of time may affect  
reliability.  
Output Voltages  
TOUT .................................................................................................... (V+, +0.3V) to (V-, -0.3V)  
ROUT ................................................................................................................ -0.3V to (Vcc +0.3V)  
Short Circuit Duration  
Vcc ................................................................................................................................................................. +6V  
V+ .................................................................................................................... (Vcc-0.3V) to +11.0V  
V- ............................................................................................................................................................ -11.0V  
Input Voltages  
T
......................................................................................................................................... Continuous  
POlaUsT tic DIP .......................................................................... 375mW  
(derate 7mW/°C above +70°C)  
Small Outline ...................................................................... 375mW  
(derate 7mW/°C above +70°C)  
TIN ......................................................................................................................... -0.3 to (Vcc +0.3V)  
RIN ............................................................................................................................................................ ±30V  
ELECTRICAL CHARACTERISTICS  
VCC=+5V±10%; 0.1µF charge pump capacitors; TMINto T MAX unless otherwise noted.  
TTL INPUT  
Logic Threshold  
LOW  
TIN; EN, SD  
0.8  
Volts  
Volts  
µA  
HIGH  
2.0  
TIN; EN, SD  
Logic Pull-Up Current  
15  
200  
TIN= ZeroV  
TTL OUTPUT  
TTL/CMOS Output  
Voltage, Low  
IOUT= 3.2mA; Vcc = +5V  
IOUT= -1.0mA  
0.4  
Volts  
Volts  
µA  
Voltage, High  
3.5  
= V  
,
ZeroV)VOUT )VCC  
EN  
Leakage Current; TA= +25 °  
0.05  
±10  
SP31C0CA and SP312A only  
RS-232 OUTPUT  
Output Voltage Swing  
±5  
±6  
Volts  
All transmitter outputs loaded  
with 3k1to Ground  
VCC  
=
Output Resistance  
300  
Ohms  
mA  
ZeroV; V OUT  
= ±2V  
Output Short Circuit Current  
±18  
Infinite duration  
CL= 2500pF, R L= 3k1  
Maximum Data Rate  
120  
240  
Kbps  
RS-232 INPUT  
Voltage Range  
Voltage Threshold  
LOW  
-30  
0.8  
+30  
Volts  
1.2  
1.7  
0.5  
5
Volts  
Volts  
Volts  
k1  
V = 5V, T = +25 °C  
HIGH  
2.4  
1.0  
7
VCC= 5V, T A= +25 °C  
Hysteresis  
0.2  
3
VCC= 5V, T A= +25 °C  
Resistance  
TAC=C +25 °C,A-15V )V IN )+15V  
DYNAMIC CHARACTERISTICS  
Driver Propagation Delay  
1.5  
0.1  
3.0  
1.0  
30  
µs  
µs  
TTL to RS-232; CL= 50pF  
RS-232 to TTL  
Receiver Propagation Delay  
Instantaneous Slew Rate  
V/µs  
C = 10pF, R = 3-7k1;  
LT =+25 °CL  
Transition Region Slew Rate  
10  
V/µs  
CL=A2500pF, R L= 3k1;  
measured from +3V to -3V  
or -3V to +3V  
Output Enable Time  
Output Disable Time  
400  
250  
ns  
ns  
SP310A and SP312A only  
SP310A and SP312A only  
POWER REQUIREMENTS  
VCCPower Supply Current  
No load, T = +25°C; VCC= 5V  
3
5
mA  
mA  
No load, TAA= +25°C; V = 5V  
SP232A  
SP233A, SP310A, SP312A  
10  
15  
CC  
VCCSupply Current,Loaded  
SP232A  
15  
25  
mA  
mA  
All transmitters RL= 3k 1;  
T
A = +25 °C  
SP233A, SP310A, SP312A  
All transmitters RL= 3k 1;  
TA = +25 °C  
Shutdown Supply Current  
SP310A,SP312A  
1
10  
µA  
VCC= 5V, T A= +25 °C  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
2
PERFORMANCE CURVES  
Not 100% tested.  
-11  
-10  
-9  
12  
10  
8
30  
25  
9.0  
8.5  
V
= 6V  
CC  
= 5V  
8.0  
7.5  
V
CC  
V
= 6V  
CC  
V
= 6V  
-8  
-7  
-6  
-5  
-4  
CC  
20  
V
= 4V  
CC  
V
= 5V  
CC  
6
7.0  
15  
Load current = 0mA  
V
= 5V  
CC  
T
= 25 °C  
A
6.5  
6.0  
4
2
0
V
= 4V  
CC  
10  
5
V
= 4V  
CC  
5.5  
5.0  
V
= 3V  
CC  
-3  
0
2
4
6
8
10 12 14  
0
0
5
10 15 20 25 30 35 40  
Load Current (mA)  
4.5  
4.75  
5.0  
5.25  
5.5  
-55 -40  
0
25  
70  
85  
125  
Load Current (mA)  
V
CC  
(Volts)  
Temperature (°C)  
PINOUTS  
R
2
OUT  
IN  
1
2
20  
T
2
1
IN  
IN  
C
1
+
1
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
R
2
19  
18  
17  
16  
15  
14  
13  
12  
11  
T
V+  
2
3
4
5
6
7
8
GND  
OUT  
T2OUT  
3
R
1
OUT  
IN  
OUT  
C -  
1
T
1
Conn to 10  
Conn to 11  
Conn to 12  
4
R1  
C +  
2
R
R
1
IN  
5
T
1
C -  
2
1
OUT  
6
GND  
V-  
7
C
C
1
-
DNC  
V
CC  
T
T
1
IN  
1
+ DNC  
8
V+ DNC  
GND  
T2  
OUT  
2
IN  
Conn to 15  
Conn to 16  
9
R2IN  
R OUT  
2
10  
Conn to 17  
20-PIN SOIC  
See Figure 2 for  
Pin Connections  
18  
18  
1
2
3
4
5
6
7
8
9
1
T IN  
2
1
20  
19  
R
R
OUT  
IN  
ON/OFF  
SHUTDOWN  
NC  
*
+
EN  
*
+
2
2
17  
16  
15  
14  
13  
12  
11  
10  
17  
16  
15  
14  
13  
12  
11  
10  
2
3
4
5
6
7
8
9
T IN  
1
2
3
V
CC  
VCC  
C1  
C
1
R
OUT  
IN  
18 T OUT  
2
GND  
OUT  
GND  
OUT  
V+  
V+  
1
R
4
17 V-  
T
1
T1  
C1-  
C1-  
1
T OUT  
1
5
16  
15  
C
-
R1IN  
R1  
IN  
C2+  
C2+  
2
GND  
6
C
+
R1OUT  
R1  
OUT  
C2-  
C2-  
2
V
7
14 V+  
13  
12 V-  
11  
T1IN  
T
1
IN  
IN  
V-  
V-  
CC  
C
+
8
C
1
-
T2IN  
T2  
T
2
OUT  
T
2
OUT  
1
GND  
9
R2OUT  
R2OUT  
R2IN  
R2IN  
C
-
10  
C
+
2
2
20-PIN PLASTIC DIP  
*
N.C. for SP310E_A, EN for SP312E_A  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
3
FEATURES…  
The SP232A/233A/310A/312A devices are a  
family of line driver and receiver pairs that meet  
the specifications of RS-232 and V.28 serial  
protocols. The ESD tolerance has been im-  
proved on these devices to over ±2KV for the  
Human Body Model. These devices are pin-to-  
pin compatible with popular industry standards.  
The SP232A/233A/310A/312A devices  
feature10V/µs slew rate, 120Kbps data rate un-  
derload, 0.1µFchargepumpcapacitors, overall  
ruggedness for commercial applications, and  
increased drive current for longer and more  
flexible cable configurations. This family also  
features Sipex's BiCMOS design allowing low  
power operation without sacrificing perfor-  
mance.  
The SP310A provides identical features as the  
SP232A with the addition of a single control  
line which simultaneously shuts down the inter-  
nal DC/DC converter and puts all transmitter  
and receiver outputs into a high impedance  
state. The SP312A is identical to the SP310A  
with separate tri-state and shutdown control  
lines.  
THEORY OF OPERATION  
The SP232A, SP233A, SP310A and SP312A  
devices are made up of three basic circuit blocks –  
1)adriver/transmitter,2)areceiverand3)acharge  
pump. Each block is described below.  
Driver/Transmitter  
The drivers are inverting transmitters, which ac-  
cept TTL or CMOS inputs and output the RS-232  
signals with an inverted sense relative to the input  
logic levels. Typically the RS-232output voltage  
swing is ±6V. Even under worst case loading  
conditions of 3kOhms and 2500pF, the output is  
guaranteedtobe±5V, whichisconsistentwiththe  
RS-232 standard specifications. The transmitter  
outputsareprotectedagainstinfiniteshort-circuits  
to ground without degradation in reliability.  
The SP232A/233A/310A/312A devices have  
internal charge pump voltage converters which  
allow them to operate from a single +5V supply.  
Thechargepumpswilloperatewithpolarizedor  
non-polarized capacitors ranging from 0.1 toµ1F  
and will generate the ±6V needed for the RS-  
232 output levels. Both meet all EIA RS-232F  
and ITU V.28 specifications.  
+5V INPUT  
10 F 6.3V  
µ
+
16  
1
0.1 F 6.3V  
µ
V
C
C
C
C
+
-
CC  
+
+
1
1
2
6
+
0.1  
F
µ
V+  
V-  
*
6.3V  
3
4
Charge Pump  
+
-
2
2
+
0.1  
F
µ
0.1  
F
µ
10V  
10V  
5
400k  
1
11  
14  
T
T
IN  
T
OUT  
T
1
1
1
400k  
1
10  
12  
7
IN  
T
OUT  
IN  
T
2
2
2
1
13  
R
R
OUT  
OUT  
R
R
1
1
2
5k  
1
9
8
R
IN  
R
2
2
5k  
1
SP232A  
GND 15  
*The negative terminal of the V+ storage capacitor can be tied  
to either VCCor GND. Connecting the capacitor to V CC(+5V)  
is recommended.  
Figure 1. Typical Circuit using the SP232A.  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
+5V INPUT  
7
+5V INPUT  
7
V
V
CC  
CC  
400k  
1
1
5
2
400k  
1
1
5
2
T
IN  
IN  
T
OUT  
T
T
IN  
IN  
T
OUT  
T
1
1
1
1
1
1
400k  
1
3
18  
4
400k  
1
3
18  
4
T
T
OUT  
IN  
T
T
T
OUT  
IN  
T
2
2
1
2
2
2
1
2
R
R
OUT  
R
R
R
R
OUT  
R
R
1
1
1
1
5k  
5k  
1
1
5k  
5k  
1
1
20  
19  
20  
19  
OUT  
R
IN  
R
OUT  
R
IN  
R
2
2
2
2
2
2
8
13  
14  
C
C
+
-
C
C
+
-
Do not make  
connection to  
these pins  
1
1
Do not make  
connection to  
these pins  
1
1
13  
11  
12  
C
C
C
C
+
+
-
C
C
C
C
+
+
-
2
2
Connect on PCB  
Connect on PCB  
2
2
14  
15  
10  
16  
8
15  
11  
16  
Pin 11 to Pin 15  
Pin 12 to Pin 15  
V+  
V-  
V+  
V-  
Pin 10 to Pin 16  
Pin 11 to Pin 16  
Pin 12 to Pin 17  
Pin 10 to Pin 17  
10  
17  
12  
17  
2
2
Both Pins 6 and 9 to GND  
Both Pins 6 and 9 to GND  
2
2
SP233ACP  
SP233ACT  
GND GND  
-
V-  
GND  
6
GND  
9
-
V-  
6
9
Figure 2. Typical Circuits using the SP233ACP and SP233ACT  
The instantaneous slew rate of the transmitter  
output is internally limited to a maximum of 30V/  
µsinordertomeetthestandards[EIARS-232-F].  
The transition region slew rate of these enhanced  
products is typically 10V/µs. The smooth transi-  
tion of the loaded output from VOL to VOH clearly  
meets the monotonicity requirements of the stan-  
dard [EIA RS-232-F].  
inputshaveatypicalhysteresismarginof500mV.  
This ensures that the receiver is virtually immune  
to noisy transmission lines.  
The input thresholds are 0.8V minimum and 2.4V  
maximum, again well within the ±3V RS-232  
requirements. The receiver inputs are also pro-  
tected against voltages up to ±25V. Should an  
input be left unconnected, a 5K1 pulldown resis-  
tortogroundwillcommittheoutputofthereceiver  
to a high state.  
Receivers  
The receivers convert RS-232 input signals to  
inverted TTL signals. Since the input is usually  
fromatransmissionline, wherelongcablelengths  
andsysteminterferencecandegradethesignal,the  
+5V INPUT  
+5V INPUT  
10 F 6.3V  
µ
10 F 6.3V  
µ
+
+
17  
17  
0.1  
F
µ
2
0.1 µF  
10V  
+
2
V
10V  
C
C
C
C
+
-
V
CC  
+
+
C
C
C
C
+
-
1
1
3
7
CC  
0.1  
F
+
µ
+
+
1
1
3
7
V+  
V-  
0.1  
F
µ
*
V+  
V-  
6.3V  
*
4
5
6.3V  
4
5
Charge Pump  
Charge Pump  
+
-
2
2
+
0.1  
F
µ
+
-
0.1  
µ
F
2
2
+
0.1  
F
µ
10V  
16V  
0.1 µF  
10V  
6
16V  
6
400k  
1
1
400k  
1
12  
15  
8
T
T
IN  
T
T
OUT  
OUT  
T
1
1
2
1
12  
15  
T
T
IN  
T
OUT  
T
1
1
1
400k  
400k  
1
11  
13  
IN  
T
2
2
11  
13  
8
IN  
T
OUT  
IN  
T
2
2
2
1
14  
14  
R
R
OUT  
OUT  
R
R
1
1
2
R
R
OUT  
R
R
IN  
IN  
R
1
2
1
2
1
5k  
1
5k  
5k  
1
1
10  
9
9
10  
1
R
IN  
R
OUT  
EN  
R
2
2
2
5k  
1
18  
18  
ON/OFF  
SHUTDOWN  
SP312A  
GND 16  
SP310A  
GND 16  
*The negative terminal of the V+ storage capacitor can be tied  
to either VCCor GND. Connecting the capacitor to V CC(+5V)  
is recommended.  
*The negative terminal of the V+ storage capacitor can be tied  
to either VCCor GND. Connecting the capacitor to V CC(+5V)  
is recommended.  
Figure 3. Typical Circuits using the SP310A and SP312A  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
V
= +5V  
CC  
C
+Vcc  
4
+
V
V
Storage Capacitor (V+)  
DD  
+
+
C
C
2
1
+
Storage Capacitor (V-)  
SS  
C
–Vcc  
3
–Vcc  
Figure 4. Charge Pump — Phase 1  
In actual system applications, it is quite possible  
for signals to be applied to the receiver inputs  
before power is applied to the receiver circuitry.  
Thisoccurs,forexample,whenaPCuserattempts  
toprint,onlytorealizetheprinterwasn’tturnedon.  
In this case an RS-232 signal from the PC will  
appear on the receiver input at the printer. When  
the printer power is turned on, the receiver will  
operate normally. All of these enhanced devices  
are fully protected.  
Phase 2  
— VSStransfer — Phase two of the clock con-  
nects the negative terminal of C2 to the VSS  
storage capacitor and the positive terminal of C2  
to ground, and transfers the generated –l0V to  
C3. Simultaneously, the positive side of capaci-  
tor C 1 is switched to +5V and the negative side  
is connected to ground.  
Phase 3  
— VDD charge storage — The third phase of the  
clock is identical to the first phase — the charge  
transferred in C1produces –5V in the negative  
terminal of C1, which is applied to the negative  
Charge Pump  
The charge pump is a Sipex–patented design  
(5,306,954) and uses a unique approach com-  
paredtoolderless–efficientdesigns.Thecharge  
pump still requires four external capacitors, but  
uses a four–phase voltage shifting technique to  
attain symmetrical power supplies. There is a  
free–running oscillator that controls the four  
phases of the voltage shifting. A description of  
each phase follows.  
+
side of capacitor C2. Since C2 is at +5V, the  
voltage potential across C2 is a maximum of l0V.  
Phase 4  
— VDD transfer — The fourth phase of the clock  
connects the negative terminal of C2 to ground,  
and transfers the generated l0V across C2 to C4,  
theVDD storagecapacitor.Again,simultaneously  
with this, the positive side of capacitor C1 is  
switched to +5V and the negative side is con-  
nected to ground, and the cycle begins again.  
Phase 1  
— VSS charge storage —During this phase of  
the clock cycle, the positive side of capacitors  
C1 and C2 are initially charged to +5V. Cl+ is  
Since both V+ and Vare separately generated  
from VCC; in a no–load condition V+ and Vwill  
besymmetrical. Olderchargepumpapproaches  
then switched to ground and the charge in C1 is  
+
transferred to C2 . Since C2 is connected to  
+5V, the voltage potential across capacitor C2 is  
now 10V.  
V
= +5V  
CC  
C
4
+
V
V
Storage Capacitor  
DD  
+
+
C
C
2
1
+
Storage Capacitor  
SS  
C
3
Vss  
Figure 5. Charge Pump — Phase 2  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
V
DD  
a) C2+  
GND  
GND  
b) C2–  
Vss  
Figure 6. Charge Pump Waveforms  
Shutdown (SD) and Enable (EN) for the  
SP310A and SP312A  
that generate Vfrom V+ will show a decrease in  
the magnitude of Vcompared to V+ due to the  
inherent inefficiencies in the design.  
Both the SP310A and SP312A have a shutdown/  
standby mode to conserve power in battery-pow-  
ered systems. To activate the shutdown mode,  
which stops the operation of the charge pump, a  
logic “0” is applied to the appropriate control line.  
For the SP310A, this control line is ON/OFF (pin  
18). Activating the shutdown mode also puts the  
The clock rate for the charge pump typically  
operates at greater than 15kHz. The external  
capacitors can be as low as 0.1µF with a 10V  
breakdown voltage rating.  
V
= +5V  
CC  
C
4
+
+5V  
+
V
V
Storage Capacitor  
DD  
+
+
C
C
2
1
Storage Capacitor  
SS  
C
–5V  
–5V  
3
Figure 7. Charge Pump — Phase 3  
Vcc = +5V  
C
V
DD  
4
+
V
V
Storage Capacitor  
DD  
+
+
C
C
2
1
+
Storage Capacitor  
SS  
C
3
Figure 8. Charge Pump — Phase 4  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
7
SP310Atransmitterandreceiveroutputsinahigh  
impedance condition (tri-stated). The shutdown  
mode is controlled on the SP312A by a logic “0”  
ontheSHUTDOWNcontrolline(pin18);thisalso  
puts the transmitter outputs in a tri–state mode.  
The receiver outputs can be tri–stated separately  
during normal operation or shutdown by a logic  
“1” on the ENABLE line (pin 1).  
Pin Strapping for the SP233ACT/ACP  
The SP233A packaged in the 20–pin SOIC pack-  
age (SP233ACT) has a slightly different pinout  
thanthe SP233AinPDIPpackaging(SP233ACP).  
To operate properly, the following pairs of pins  
must be externally wired together:  
PinsWired  
Wake–Up Feature for the SP312A  
Together  
TwoV-Pins  
TwoC2+Pins  
TwoC2-Pins  
SOIC  
10&17  
12&15  
11&16  
PDIP  
12&17  
11&15  
10&16  
The SP312A has a wake–up feature that keeps  
all the receivers in an enabled state when the  
device is in the shutdown mode. Table 1 defines  
the truth table for the wake–up function.  
NoConnectionsfor  
Pins8,13,and14  
With only the receivers activated, the SP312A  
typically draws less than 5µA supply current.  
In the case of a modem interfaced to a computer  
in power down mode, the Ring Indicator (RI)  
signal from the modem would be used to "wake  
up" the computer, allowing it to accept data  
transmission.  
Connect Pins6and9  
toGND  
After the ring indicator signal has propagated  
through the SP312A receiver, it can be used to  
trigger the power management circuitry of the  
computer to power up the microprocessor, and  
bring the SD pin of the SP312A to a logic high,  
takingitoutoftheshutdownmode. Thereceiver  
propagation delay is typically 1µs. The enable  
timeforV+ andVistypically2ms. AfterV+ and  
Vhave settled to their final values, a signal can  
be sent back to the modem on the data terminal  
ready (DTR) pin signifying that the computer is  
ready to accept and transmit data.  
Down  
Down  
Up  
Enable  
Tri–state  
Enable  
0
0
0
1
1
0
1
1
Up  
Tri–state  
Table 1. Wake-up Function Truth Table.  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
PAꢀkAgE: 16 Pꢁꢂ ꢂSoꢁꢀ  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
PAꢀkAgE: 16 Pꢁꢂ WSoꢁꢀ  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀ0  
PAꢀkAgE: 18 Pꢁꢂ WSoꢁꢀ  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀꢀ  
PAꢀkAgE: 20 Pꢁꢂ WSoꢁꢀ  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀ2  
PAꢀkAgE: 16 Pꢁꢂ PDꢁP  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀ3  
PAꢀkAgE: 18 Pꢁꢂ PDꢁP  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀꢁ  
PAꢀkAgE: 20 Pꢁꢂ PDꢁP  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀꢂ  
ORDERING INFORMATION  
Part Number  
Temperature Range  
Topmark  
Package  
SP232ACN.............................0°C to +70°C................................SP232ACN..........................................................................16–pin NSOIC  
SP232ACN/TR.......................0°C to +70°C................................SP232ACN..........................................................................16–pin NSOIC  
SP232ACP.............................0°C to +70°C.................................SP232ACP.........................................................................16–pin PDIP  
SP232ACT.............................0°C to +70°C.................................SP232ACT..........................................................................16–pin WSOIC  
SP232ACT/TR.......................0°C to +70°C.................................SP232ACT..........................................................................16–pin WSOIC  
SP232AEN..........................–40°C to +85°C................................SP232AEN..........................................................................16–pin NSOIC  
SP232AEN/TR....................–40°C to +85°C................................SP232AEN..........................................................................16–pin NSOIC  
SP232AEP..........................–40°C to +85°C................................SP232AEP..........................................................................16–pin PDIP  
SP232AET..........................–40°C to +85°C................................SP232AET...........................................................................16–pin WSOIC  
SP232AET/TR.....................–40°C to +85°C................................SP232AET...........................................................................16–pin WSOIC  
SP233ACP.............................0°C to +70°C.................................SP232ACP.........................................................................20–pin PDIP  
SP233ACT............................0°C to +70°C.................................SP233ACT...........................................................................20–pin WSOIC  
SP233ACT/TR......................0°C to +70°C.................................SP233ACT...........................................................................20–pin WSOIC  
SP233AEP..........................–40°C to +85°C................................SP232AEP..........................................................................20–pin PDIP  
SP233AET..........................–40°C to +85°C................................SP233AET...........................................................................20–pin WSOIC  
SP233AET/TR.....................–40°C to +85°C................................SP233AET...........................................................................20–pin WSOIC  
SP310ACP............................0°C to +70°C.................................SP310ACP.........................................................................18–pin PDIP  
SP310ACT............................0°C to +70°C.................................SP310ACT..........................................................................18–pin WSOIC  
SP310ACT/TR......................0°C to +70°C.................................SP310ACT..........................................................................18–pin WSOIC  
SP310AEP..........................–40°C to +85°C................................SP310AEP..........................................................................18–pin PDIP  
SP310AET..........................–40°C to +85°C................................SP310AET...........................................................................18–pin WSOIC  
SP310AET/TR.....................–40°C to +85°C................................SP310AET...........................................................................18–pin WSOIC  
SP312ACP............................0°C to +70°C.................................SP312ACP..........................................................................18–pin PDIP  
SP312ACT............................0°C to +70°C.................................SP312ACT...........................................................................18–pin WSOIC  
SP312ACT/TR......................0°C to +70°C.................................SP312ACT...........................................................................18–pin WSOIC  
SP312AEP..........................–40°C to +85°C................................SP312AEP...........................................................................18–pin PDIP  
SP312AET..........................–40°C to +85°C................................SP312AET............................................................................18–pin WSOIC  
SP312AET/TR.....................–40°C to +85°C................................SP312AET............................................................................18–pin WSOIC  
Available in lead free packaging. To order add "-L" suffix to part number.  
Example: SP312AEA/TR = standard; SP312AEA-L/TR = lead free.  
/TR = Tape and Reel  
Pack quantity is 1,500 for WSOIC and 2,500 for NSOIC.  
Solved by  
Sipex ꢀꢃrpꢃratiꢃn  
Headquarters and  
TM  
Sales Office  
233 South Hillview Drive  
Solved by Sipex  
tm  
Milpitas, CA ꢅꢂ03ꢂ  
TEL: (ꢁ0ꢄ) ꢅ3ꢁ-7ꢂ00  
FAX: (ꢁ0ꢄ) ꢅ3ꢂ-7ꢃ00  
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume  
any liability arising out of the application or use of any product or circuit described herein; neither does it convey  
any license under its patent rights nor the rights of others.  
Jan 3ꢀ-07 Rev B  
SP232A/233A/3ꢀ0A/3ꢀ2A  
© 2007 Sipex Corporation  
ꢀꢃ  

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