SP312ECA-L [EXAR]
Line Driver/Receiver, 2 Driver, PDSO20,;
| 型号： | SP312ECA-L |
| 厂家： | 
EXAR CORPORATION |
| 描述： | Line Driver/Receiver, 2 Driver, PDSO20, 驱动 光电二极管 驱动器 |
| 文件： | 总15页 (文件大小：123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP202E/232E/233E/310E/312E
High-Performance RS-232
Line Drivers/Receivers
■ Operates from Single +5V Power Supply
C
1
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
■ Meets All RS-232D and ITU V.28
Specifications
V+
GND
T1OUT
C1-
■ Operates with 0.1µF to 10µF Capacitors
■ High Data Rate – 120Kbps Under Load
■ Low Power Shutdown ≤1µA (Typical)
■ 3-State TTL/CMOS Receiver Outputs
■ Low Power CMOS – 3mA Operation
■ Improved ESD Specifications:
C2+
R
1
IN
C2-
R
1
OUT
V-
T1
IN
T2
OUT
T
2
IN
R2IN
R2OUT
±15kV Human Body Model
Now Available in Lead Free Packaging
±15kV IEC1000-4-2 Air Discharge
±8kV IEC1000-4-2 Contact Discharge
DESCRIPTION
The SP202E/232E/233E/310E/312E devices are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28 serial protocols with enhanced ESD performance.
The ESD tolerance has been improved on these devices to over ±15KV for both Human Body
Model and IEC1000-4-2 Air Discharge Method. These devices are pin-to-pin compatible with
Sipex's SP232A/233A/310A/312A devices as well as popular industry standards. As with the
initial versions, the SP202E/232E/233E/310E/312E devices feature at least 120Kbps data rate
underload, 0.1µFchargepumpcapacitors, andoverallruggednessforcommercialapplications.
This family also features Sipex's BiCMOS design allowing low power operation without
sacrificingperformance. TheseriesisavailableinplasticDIPandSOICpackagesoperatingover
the commercial and industrial temperature ranges.
SELECTION TABLE
Number of RS232
No. of Receivers
No. of External
Model Drivers
Receivers
Active in Shutdown 0.1µF Capacitors Shutdown WakeUp TTL Tri–State
SP202E
SP232E
SP233E
SP310E
SP312E
2
2
2
2
2
2
2
2
2
2
0
0
0
0
2
4
4
0
4
4
No
No
No
No
No
No
No
No
No
Yes
Yes
No
Yes
Yes
Yes
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
Vcc ................................................................................................................................................................. +6V
V+ .................................................................................................................... (Vcc-0.3V) to +11.0V
V- ............................................................................................................................................................ -11.0V
Input Voltages
TIN ......................................................................................................................... -0.3 to (Vcc +0.3V)
RIN ............................................................................................................................................................ ±15V
Output Voltages
Plastic DIP .......................................................................... 375mW
(derate 7mW/°C above +70°C)
Small Outline ...................................................................... 375mW
(derate 7mW/°C above +70°C)
TOUT .................................................................................................... (V+, +0.3V) to (V-, -0.3V)
ROUT ................................................................................................................ -0.3V to (Vcc +0.3V)
Short Circuit Duration
TOUT ......................................................................................................................................... Continuous
ELECTRICAL CHARACTERISTICS
VCC=+5V±10%; 0.1µF charge pump capacitors; TMIN to TMAX unless otherwise noted.
PARAMETERS
MIN.
TYP.
MAX.
UNITS
CONDITIONS
TTL INPUT
Logic Threshold
LOW
HIGH
Logic Pull-Up Current
0.8
Volts
Volts
µA
TIN ; EN, SD
TIN ; EN, SD
TIN = 0V
2.0
15
200
TTL OUTPUT
TTL/CMOS Output
Voltage, Low
Voltage, High
Leakage Current **; TA = +25°
0.4
Volts
Volts
µA
IOUT = 3.2mA; Vcc = +5V
IOUT = -1.0mA
EN = VCC, 0V≤VOUT ≤VCC
3.5
0.05
±10
RS-232 OUTPUT
Output Voltage Swing
±5
±6
Volts
All transmitter outputs loaded
with 3kΩ to Ground
Output Resistance
Output Short Circuit Current
Maximum Data Rate
300
120
Ohms
mA
Kbps
VCC = 0V; VOUT = ±2V
Infinite duration
CL = 2500pF, RL= 3kΩ
±18
240
RS-232 INPUT
Voltage Range
Voltage Threshold
LOW
HIGH
Hysteresis
Resistance
-15
0.8
+15
Volts
1.2
1.7
0.5
5
Volts
Volts
Volts
kΩ
VCC = 5V, TA = +25°C
VCC = 5V, TA = +25°C
VCC = 5V, TA = +25°C
TA = +25°C, -15V ≤ VIN ≤ +15V
2.8
1.0
7
0.2
3
DYNAMIC CHARACTERISTICS
Driver Propagation Delay
Receiver Propagation Delay
Instantaneous Slew Rate
1.5
0.1
3.0
1.0
30
µs
µs
V/µs
TTL to RS-232; CL = 50pF
RS-232 to TTL
CL = 10pF, RL= 3-7kΩ;
TA =+25°C
Transition Region Slew Rate
10
V/µs
CL = 2500pF, RL= 3kΩ;
measured from +3V to -3V
or -3V to +3V
Output Enable Time **
Output Disable Time **
400
250
ns
ns
SP310E and SP312E only
SP310E and SP312E only
POWER REQUIREMENTS
VCC Power Supply Current
3
15
5
5
mA
mA
No load, TA= +25°C; VCC = 5V
All transmitters RL = 3kΩ;
TA = +25°C
Shutdown Supply Current **
1
µA
VCC = 5V, TA = +25°C
**SP310E and SP312E only
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
2
PERFORMANCE CURVES
-11
-10
-9
12
10
8
30
25
20
15
10
5
9.0
8.5
V
= 6V
CC
8.0
7.5
V
= 5V
CC
V
= 6V
CC
V
= 6V
-8
CC
V
= 4V
CC
V
= 5V
CC
-7
6
7.0
Load current = 0mA
-6
V
CC
= 5V
= 4V
T
A
= 25°C
6.5
6.0
4
V
= 4V
CC
-5
V
CC
2
-4
5.5
5.0
V
= 3V
CC
-3
0
0
2
4
6
8
10 12 14
0
0
5
10 15 20 25 30 35 40
Load Current (mA)
4.5
4.75
5.0
(Volts)
5.25
5.5
-55 -40
0
25
70
85
125
Load Current (mA)
V
CC
Temperature (°C)
PINOUTS
C
1
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
C
1
+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
V+
GND
OUT
V+
GND
OUT
C1-
T
1
C1-
T1
C2+
R
1
IN
C2+
R
R
1IN
C2-
R
1
OUT
C2-
1OUT
V-
T1
IN
V-
T
T
1
IN
IN
T2
OUT
T
2
IN
T
2
OUT
2
R2IN
R2OUT
R2IN
R2OUT
1
20
R
2
2
OUT
IN
T
2
1
IN
IN
N.C./EN
C1+
1
2
20
SHDN
2
3
19
18
R
T
19
18
17
16
15
14
13
12
11
VCC
T2OUT
R
T
1
1
OUT
IN
V+
3
GND
4
17 V-
R
1
C1-
4
T1OUT
R1IN
R1OUT
N.C.
5
16
15
14
13
12
11
C
C
C
C
C
C
2
-
OUT
GND
C2+
5
6
2
1
1
2
2
+
–
+
+
–
C2-
6
7
V
CC
V-
7
8
V+
GND
V–
T2OUT
R2IN
R2OUT
8
T1IN
9
9
T2IN
10
10
N.C.
20-PIN SOIC
20-PIN SSOP
18
17
16
15
14
13
12
11
10
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
ON/OFF
1
2
3
4
5
6
7
8
9
SHUTDOWN
NC
*
EN
*
VCC
VCC
C
1
+
C1
+
GND
OUT
GND
OUT
V+
V+
T1
T
1
C1-
C1-
R1IN
R1IN
C2+
C2+
R1OUT
C2-
R1OUT
C2-
T
1
IN
IN
V-
T1IN
V-
T2
T
2
OUT
T2IN
T
2
OUT
R2OUT
R2IN
R2OUT
R2IN
* N.C. for SP310E_A, EN for SP312E_A
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
3
FEATURES…
The SP310E provides identical features as the
SP232E with a single control line which
simultaneously shuts down the internal DC/DC
converter and puts all transmitter and receiver
outputsintoahighimpedancestate.TheSP312E
is identical to the SP310E with separate tri-state
and shutdown control lines.
The SP202E/232E/233E/310E/312E devices
are a family of line driver and receiver pairs that
meet the specifications of RS-232 and V.28
serial protocols with enhanced ESD perfor-
mance. The ESD tolerance has been improved
on these devices to over±15KV for both Human
Body Model and IEC1000-4-2 Air Discharge
Method. These devices are pin-to-pin compat-
ible with Sipex's 232A/233A/310A/312A
devices as well as popular industry standards.
As with the initial versions, the SP202E/232E/
233E/310E/312E devices feature10V/µs slew
rate, 120Kbps data rate under load, 0.1µF
charge pump capacitors, overall ruggedness
forcommercialapplications,andincreaseddrive
current for longer and more flexible cable
configurations. ThisfamilyalsofeaturesSipex's
BiCMOS design allowing low power operation
without sacrificing performance.
THEORY OF OPERATION
The SP232E, SP233E, SP310E and SP312E
devices are made up of three basic circuit blocks –
1)adriver/transmitter,2)areceiverand3)acharge
pump. Each block is described below.
Driver/Transmitter
The drivers are inverting transmitters, which ac-
cept TTL or CMOS inputs and output the RS-232
signals with an inverted sense relative to the input
logic levels. Typically the RS-232output voltage
swing is ±6V. Even under worst case loading
conditions of 3kOhms and 2500pF, the output is
guaranteed to be ±5V, which is consistent with the
RS-232 standard specifications. The transmitter
outputsareprotectedagainstinfiniteshort-circuits
to ground without degradation in reliability.
The SP202E/232E/233E/310E/312E devices
have internal charge pump voltage converters
which allow them to operate from a single +5V
supply. The charge pumps will operate with
polarized or non-polarized capacitors ranging
from 0.1 to 10 µF and will generate the ±6V
needed to generate the RS-232 output levels.
Both meet all EIA RS-232 and ITU V.28
specifications.
+5V INPUT
+
10 F 6.3V
µ
16
1
0.1 F 6.3V
+
µ
V
C
C
C
C
+
-
CC
+
+
1
2
6
0.1
6.3V
F
µ
V+
V-
*
3
4
1
Charge Pump
+
-
2
+
0.1
16V
F
µ
0.1
16V
F
µ
5
2
400k
400k
Ω
Ω
11
14
T
T
IN
T
OUT
T
1
1
1
10
12
7
IN
T
OUT
IN
T
2
2
1
2
13
R
R
OUT
OUT
R
R
1
2
1
5k
5k
Ω
Ω
9
8
R
IN
R
2
2
SP202E
SP232E
GND 15
*The negative terminal of the V+ storage capacitor can be tied
to either VCC or GND. Connecting the capacitor to VCC (+5V)
is recommended.
Figure 1. Typical Circuit using the SP202E or SP232E.
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
4
+5V INPUT
7
V
CC
400k
Ω
Ω
2
5
T
IN
IN
T
OUT
T
1
1
1
400k
1
3
18
4
T
T
OUT
IN
T
2
2
1
2
R
R
OUT
R
R
1
1
5k
5k
Ω
Ω
20
19
OUT
R
IN
R
2
2
2
13
14
10
C
C
+
-
Do not make
connection to
these pins
1
12
C
C
C
C
+
+
-
1
2
2
15
11
16
Internal
-10V Power
Supply
V-
17
8
V-
2
2
SP233ECT
Internal
+10V Power
Supply
V+
-
GND
GND
6
9
Figure 2. Typical Circuits using the SP233ECP and SP233ECT
The instantaneous slew rate of the transmitter
output is internally limited to a maximum of 30V/
µs in order to meet the standards [EIA RS-232-D
2.1.7, Paragraph (5)]. However, the transition re-
gion slew rate of these enhanced products is typi-
cally 10V/µs. The smooth transition of the loaded
output from VOL to VOH clearly meets the mono-
tonicity requirements of the standard [EIA
RS-232-D 2.1.7, Paragraphs (1) & (2)].
andsysteminterferencecandegradethesignal,the
inputs have a typical hysteresis margin of 500mV.
This ensures that the receiver is virtually immune
to noisy transmission lines.
The input thresholds are 0.8V minimum and 2.4V
maximum, again well within the ±3V RS-232
requirements. The receiver inputs are also pro-
tected against voltages up to ±15V. Should an
input be left unconnected, a 5KOhm pulldown
resistor to ground will commit the output of the
receiver to a high state.
Receivers
The receivers convert RS-232 input signals to
inverted TTL signals. Since the input is usually
from a transmission line, where long cable lengths
+5V INPUT
+5V INPUT
10 F 6.3V
µ
10 F 6.3V
µ
+
+
17
0.1
16V
+
F
µ
2
17
0.1 µF
16V
+
V
2
C
C
C
C
+
-
CC
+
+
V
1
3
7
0.1 F
µ
C
C
C
C
+
-
CC
+
+
V+
V-
1
3
7
*
0.1
6.3V
F
µ
6.3V
V+
V-
4
5
*
1
4
5
1
Charge Pump
Charge Pump
+
-
2
+
0.1
16V
F
µ
0.1
F
µ
+
-
2
+
0.1
16V
F
µ
16V
0.1 µF
16V
6
2
6
2
400k
Ω
Ω
400k
400k
Ω
Ω
12
11
15
8
T
T
IN
T
T
OUT
OUT
T
12
15
1
1
2
1
T
T
IN
T
OUT
T
1
1
1
400k
IN
T
2
11
13
8
2
IN
T
OUT
IN
T
2
2
1
2
14
R
R
OUT
OUT
R
R
1
2
1
14
13
R
R
OUT
R
R
IN
IN
R
1
2
1
2
1
5k
5k
Ω
Ω
5k
5k
Ω
Ω
10
9
R
IN
R
2
9
2
10
1
OUT
EN
R
2
18
ON/OFF
18
SP310E
SHUTDOWN
SP312E
GND 16
GND 16
*The negative terminal of the V+ storage capacitor can be tied
to either VCC or GND. Connecting the capacitor to VCC (+5V)
is recommended.
*The negative terminal of the V+ storage capacitor can be tied
to either VCC or GND. Connecting the capacitor to VCC (+5V)
is recommended.
Figure 3. Typical Circuits using the SP310E and SP312E
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
5
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–5V
–5V
3
Figure 4. Charge Pump — Phase 1
In actual system applications, it is quite possible
for signals to be applied to the receiver inputs
before power is applied to the receiver circuitry.
Thisoccurs, forexample, whenaPCuserattempts
toprint,onlytorealizetheprinterwasn’tturnedon.
In this case an RS-232 signal from the PC will
appear on the receiver input at the printer. When
the printer power is turned on, the receiver will
operate normally. All of these enhanced devices
are fully protected.
Phase 2
— VSS transfer — Phase two of the clock con-
nects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to ground, and transfers the generated –l0V to
C3. Simultaneously, the positive side of capaci-
tor C 1 is switched to +5V and the negative side
is connected to ground.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –5V in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2 is at +5V, the
voltage potential across C2 is l0V.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
paredtoolderless–efficientdesigns.Thecharge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical power supplies. There is a
free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
+
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to ground,
and transfers the generated l0V across C2 to C4,
theVDD storagecapacitor.Again,simultaneously
with this, the positive side of capacitor C1 is
switched to +5V and the negative side is con-
nected to ground, and the cycle begins again.
Phase 1
— VSS charge storage —During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to +5V. Cl+ is
–
Since both V+ and V– are separately generated
from VCC; in a no–load condition V+ and V– will
then switched to ground and the charge in C1 is
–
+
transferred to C2 . Since C2 is connected to
+5V, the voltage potential across capacitor C2 is
now 10V.
V
= +5V
CC
C
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–10V
3
Figure 5. Charge Pump — Phase 2
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
6
+10V
a) C2+
GND
GND
b) C2–
–10V
Figure 6. Charge Pump Waveforms
besymmetrical. Olderchargepumpapproaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
Shutdown (SD) and Enable (EN) for the
SP310E and SP312E
Both the SP310E and SP312E have a shutdown/
standby mode to conserve power in battery-pow-
ered systems. To activate the shutdown mode,
which stops the operation of the charge pump, a
logic “0” is applied to the appropriate control line.
For the SP310E, this control line is ON/OFF (pin
18). Activating the shutdown mode also puts the
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
V
= +5V
CC
C
4
+5V
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–5V
–5V
3
Figure 7. Charge Pump — Phase 3
V
= +5V
CC
C
+10V
4
+
–
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
+
3
–
SS
C
Figure 8. Charge Pump — Phase 4
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
7
SP310E transmitter and receiver outputs in a high
impedance condition (tri-stated). The shutdown
mode is controlled on the SP312E by a logic “0”
ontheSHUTDOWNcontrolline(pin18);thisalso
puts the transmitter outputs in a tri–state mode.
The receiver outputs can be tri–stated separately
during normal operation or shutdown by a logic
“1” on the ENABLE line (pin 1).
Pin Strapping for the SP233ECT
The SP233E packaged in the 20–pin SOIC pack-
age (SP233ECT) has a slightly different pinout
than the SP233E in other package configurations.
To operate properly, the following pairs of pins
must be externally wired together:
the two V– pins (pins 10 and 17)
the two C2+ pins (pins 12 and 15)
the two C2– pins (pins 11 and 16)
Wake–Up Feature for the SP312E
The SP312E has a wake–up feature that keeps
all the receivers in an enabled state when the
device is in the shutdown mode. Table 1 defines
the truth table for the wake–up function.
All other connections, features, functions and
performance are identical to the SP233E as
specified elsewhere in this data sheet.
With only the receivers activated, the SP312E
typically draws less than 5µA supply current.
In the case of a modem interfaced to a computer
in power down mode, the Ring Indicator (RI)
signal from the modem would be used to "wake
up" the computer, allowing it to accept data
transmission.
ESD TOLERANCE
The SP202E/232E/233E/310E/312E devices
incorporates ruggedized ESD cells on all driver
output and receiver input pins. The ESD struc-
ture is improved over our previous family for
moreruggedapplicationsandenvironmentssen-
sitive to electro-static discharges and associated
transients. The improved ESD tolerance is at
least ±15KV without damage nor latch-up.
After the ring indicator signal has propagated
through the SP312E receiver, it can be used to
trigger the power management circuitry of the
computer to power up the microprocessor, and
bring the SD pin of the SP312E to a logic high,
takingitoutoftheshutdownmode. Thereceiver
propagation delay is typically 1µs. The enable
timeforV+ andV– istypically2ms. AfterV+ and
V– have settled to their final values, a signal can
be sent back to the modem on the data terminal
ready (DTR) pin signifying that the computer is
ready to accept and transmit data.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
acceptedESDtestingmethodforsemiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
showninFigure9. ThismethodwilltesttheIC’s
capability to withstand an ESD transient during
normal handling such as in manufacturing areas
where the ICs tend to be handled frequently.
Power
Up/Down
Receiver
Outputs
SD
0
EN
0
The IEC-1000-4-2, formerly IEC801-2, is
generallyusedfortestingESDonequipmentand
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
Down
Down
Up
Enable
Tri–state
Enable
0
1
1
0
1
1
Up
Tri–state
Table 1. Wake-up Function Truth Table.
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
8
R
R
S
S
R
R
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
Figure 9. ESD Test Circuit for Human Body Model
with IEC1000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipmentthatareaccessibletopersonnelduring
normal usage. The transceiver IC receives most
of the ESD current when the ESD source is
applied to the connector pins. The test circuit for
IEC1000-4-2 is shown on Figure 10. There are
two methods within IEC1000-4-2, the Air
Discharge method and the Contact Discharge
method.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
throughair. Thissimulatesanelectricallycharged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the system.
This energy, whether discharged directly or
through air, is predominantly a function of the
Contact-Discharge Module
Contact-Discharge Module
R
R
R
R
S
S
R
R
V
V
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
R
R
and R add up to 330Ω for IEC1000-4-2.
and R add up to 330Ω for IEC1000-4-2.
S
S
V
V
Figure 10. ESD Test Circuit for IEC1000-4-2
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
9
dischargedtotheequipmentfromapersonalready
holdingtheequipment. Thecurrentistransferred
ontothekeypadortheserialportoftheequipment
directly and then travels through the PCB and
finally to the IC.
30A
15A
0A
The circuit models in Figures 9 and 10 represent
the typical ESD testing circuit used for all three
methods. TheCS isinitiallychargedwiththeDC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch(SW2)isonwhileSW1switchesoff. The
voltage stored in the capacitor is then applied
throughRS, thecurrentlimitingresistor, ontothe
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
t=0ns
t=30ns
t ■
Figure 11. ESD Test Waveform for IEC1000-4-2
discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
FortheHumanBodyModel, thecurrentlimiting
resistor (R ) and the source capacitor (C ) are
1.5kΩ an 1S00pF, respectively. For IEC-10S00-4-
2,thecurrentlimitingresistor(RS)andthesource
capacitor (CS) are 330Ω an 150pF, respectively.
The higher C value and lower RS value in the
IEC1000-4-2Smodel are more stringent than the
HumanBodyModel. Thelargerstoragecapacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
handheldsystems,theESDchargecanbedirectly
SP202E
Family
HUMAN BODY
MODEL
IEC1000-4-2
Air Discharge Direct Contact
Level
Driver Outputs
Receiver Inputs
±15kV
±15kV
±15kV
±15kV
±8kV
±8kV
4
4
Table 2. Transceiver ESD Tolerance Levels
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
10
PACKAGE: 20 PIN SSOP
D
N
2 NX R R1
E
A
E1
Seaing Plane
L
Ø
A
L1
DETAIL A
1
2
INDEX AREA
D
2
E1
2
e
x
A2
A
Seating Plane
b
A1
20 PIN SSOP
JEDEC MO-150
(AE) Variation
Dimensions in (mm)
MIN NOM MAX
SEE DETAIL “A”
-
-
2.0
-
A
0.05
-
A1
A2
b
1.65 1.75
1.85
0.38
0.22
-
c
0.09
6.90
7.40
5.00
-
0.25
D
E
7.20
7.50
8.20
5.60
7.80
5.30
WITH LEAD FINISH
E1
L
0.55
0.75 0.95
L1
1.25 REF
c
0º
4º
8º
Ø
BASE METAL
(b)
Section A-A
20 PIN SSOP
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
11
PACKAGE: 16 PIN NSOIC
D
e
E/2
B
E1
E1/2
E
B
SEE VIEW C
1
b
INDEX AREA
(D/2 X E1/2)
Ø1
TOP VIEW
b
WITH PLATING
Gauge Plane
L2
Ø
Ø1
Seating Plane
L
c
L1
VIEW C
BASE METAL
SECTION B-B
16 Pin NSOIC
(JEDEC MS-012,
AC - VARIATION)
DIMENSIONS
in
(mm)
SYMBOL
MIN NOM MAX
1.75
0.25
1.65
0.51
A
1.35
-
-
-
-
-
A1
A2
b
0.10
1.25
0.31
A2
A
c
0.17
0.25
Seating Plane
A1
D
E
E1
e
9.90 BSC
SIDE VIEW
6.00 BSC
3.90 BSC
1.27 BSC
L
-
0.40
1.27
L1
L2
Ø
1.04 REF
0.25 BSC
-
8º
0º
5º
Ø1
-
15º
16 PIN NSOIC
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
12
PACKAGE: 16 PIN WSOIC
D
E/2
B
E1
E
B
SEE VIEW C
E1/2
1
3
2
b
INDEX AREA
(D/2 X E1/2)
e
Ø1
TOP VIEW
b
WITH PLATING
Gauge Plane
L2
Ø
Ø1
Seating Plane
L
c
L1
VIEW C
BASE METAL
SECTION B-B
16 Pin SOIC (WIDE)
(JEDEC MS-013,
AA - VARIATION)
DIMENSIONS IN
(mm)
SYMBOL
MIN NOM MAX
-
2.65
0.30
2.55
0.51
0.33
A
2.35
A1
A2
b
-
-
-
-
0.10
2.05
0.31
A2
A
c
0.20
Seating Plane
D
E
E1
e
A1
10.30 BSC
10.30 BSC
7.50 BSC
1.27 BSC
SIDE VIEW
L
0.40
-
1.27
L1
L2
1.40 REF
0.25 BSC
0º
5º
8º
-
-
Ø
Ø1
15º
16 PIN SOIC WIDE
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
13
PACKAGE: 18 PIN PDIP
A1
D
A
N
INDEX
AREA
A2
D1
L
E
E1
b2
b
e
b3
1
2
3
N/2
18 PIN PDIP
JEDEC MS-001
(AC) Variation
Dimensions in inches
MIN NOM MAX
E
A
-
-
.210
-
.015
-
A1
A2
.115
.130
.195
.022
b
.014 .018
b2
b3
.045
.030
.060 .070
.039 .045
c
eA
eB
.010
.900
-
.014
.920
-
c
D
.008
.880
.005
.300
D1
E
.325
.280
.310
E1
e
.240 .250
.100 BSC
eA
.300 BSC
-
-
eB
L
.430
b
.115
.130 .150
C
18 pin PDIP
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
14
ORDERING INFORMATION
Part Number
Temperature Range
Topmark
Package
SP202ECN.............................0°C to +70°C.................................SP202ECN........................................................................16–pin NSOIC
SP202ECN/TR.......................0°C to +70°C.................................SP202ECN........................................................................16–pin NSOIC
SP202ECP.............................0°C to +70°C.................................SP202ECP.........................................................................16–pin PDIP
SP202ECT.............................0°C to +70°C.................................SP202ECT.........................................................................16–pin WSOIC
SP202ECT/TR.......................0°C to +70°C.................................SP202ECT.........................................................................16–pin WSOIC
SP202EEN..........................–40°C to +85°C................................SP202EEN.........................................................................16–pin NSOIC
SP202EEN/TR....................–40°C to +85°C................................SP202EEN.........................................................................16–pin NSOIC
SP202EEP..........................–40°C to +85°C................................SP202EEP.........................................................................16–pin PDIP
SP202EET..........................–40°C to +85°C................................SP202EET..........................................................................16–pin WSOIC
SP202EET/TR.....................–40°C to +85°C................................SP202EET..........................................................................16–pin WSOIC
SP232ECN.............................0°C to +70°C................................SP232ECN..........................................................................16–pin NSOIC
SP232ECN/TR.......................0°C to +70°C................................SP232ECN..........................................................................16–pin NSOIC
SP232ECP.............................0°C to +70°C.................................SP232ECP.........................................................................16–pin PDIP
SP232ECT.............................0°C to +70°C.................................SP232ECT..........................................................................16–pin WSOIC
SP232ECT/TR.......................0°C to +70°C.................................SP232ECT..........................................................................16–pin WSOIC
SP232EEN..........................–40°C to +85°C................................SP232EEN..........................................................................16–pin NSOIC
SP232EEN/TR....................–40°C to +85°C................................SP232EEN..........................................................................16–pin NSOIC
SP232EEP..........................–40°C to +85°C................................SP232EEP..........................................................................16–pin PDIP
SP232EET..........................–40°C to +85°C................................SP232EET...........................................................................16–pin WSOIC
SP232EET/TR.....................–40°C to +85°C................................SP232EET...........................................................................16–pin WSOIC
SP233ECT............................0°C to +70°C.................................SP233ECT...........................................................................20–pin WSOIC
SP233ECT/TR......................0°C to +70°C.................................SP233ECT...........................................................................20–pin WSOIC
SP233EET..........................–40°C to +85°C................................SP233EET...........................................................................20–pin WSOIC
SP233EET/TR.....................–40°C to +85°C................................SP233EET...........................................................................20–pin WSOIC
SP310ECP............................0°C to +70°C.................................SP310ECP.........................................................................18–pin PDIP
SP310ECT............................0°C to +70°C.................................SP310ECT..........................................................................18–pin WSOIC
SP310ECT/TR......................0°C to +70°C.................................SP310ECT..........................................................................18–pin WSOIC
SP310ECA............................0°C to +70°C.................................SP310ECA..........................................................................20–pin SSOP
SP310ECA/TR......................0°C to +70°C.................................SP310ECA..........................................................................20–pin SSOP
SP310EEP..........................–40°C to +85°C................................SP310EEP..........................................................................18–pin PDIP
SP310EET..........................–40°C to +85°C................................SP310EET...........................................................................18–pin WSOIC
SP310EET/TR.....................–40°C to +85°C................................SP310EET...........................................................................18–pin WSOIC
SP310EEA..........................–40°C to +85°C................................SP310EEA...........................................................................20–pin SSOP
SP310EEA/TR.....................–40°C to +85°C................................SP310EEA...........................................................................20–pin SSOP
SP312ECP............................0°C to +70°C.................................SP312ECP..........................................................................18–pin PDIP
SP312ECT............................0°C to +70°C.................................SP312ECT...........................................................................18–pin WSOIC
SP312ECT/TR......................0°C to +70°C.................................SP312ECT...........................................................................18–pin WSOIC
SP312ECA............................0°C to +70°C.................................SP312ECA...........................................................................20–pin SSOP
SP312ECA/TR......................0°C to +70°C.................................SP312ECA...........................................................................20–pin SSOP
SP312EEP..........................–40°C to +85°C................................SP312EEP...........................................................................18–pin PDIP
SP312EET..........................–40°C to +85°C................................SP312EET............................................................................18–pin WSOIC
SP312EET/TR.....................–40°C to +85°C................................SP312EET............................................................................18–pin WSOIC
SP312EEA..........................–40°C to +85°C................................SP312EEA............................................................................20–pin SSOP
SP312EEA/TR.....................–40°C to +85°C................................SP312EEA............................................................................20–pin SSOP
Sipex Corporation
Available in lead free packaging. To order add "-L" suffix to part number.
Headquarters and
Sales Office
Example: SP312EEA/TR = standard; SP312EEA-L/TR = lead free
233 South Hillview Drive
/TR = Tape and Reel
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Pack quantity is 1,500 for SSOP or WSOIC and 2,500 for NSOIC.
REVISION HISTORY
DATE
6/2/04
7/19/04
REVISION
DESCRIPTION
A
A
Incorporated new package drawings with JEDEC reference.
Added typical output voltage swing value (±6V).
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Date: 7/19/04
SP202E Series High Performance RS232 Transceivers
© Copyright 2004 Sipex Corporation
15
相关型号：
SP312EEA-L/TR
Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, PDSO20, LEAD FREE, MS-150AE, SSOP-20
SIPEX
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