IRF1530N [ETC]
;
ETC 
PD -9.1353
IRFI530N
PRELIMINARY
HEXFET® Power MOSFET
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS …
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
VDSS = 100V
RDS(on) = 0.11W
ID = 11A
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design for which HEXFET Power MOSFETs are
well known, provides the designer with an extremely
efficient device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current ƒ•†
11
7.8
A
60
33
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.22
VGS
EAS
IAR
Gate-to-Source Voltage
±20
Single Pulse Avalanche Energy ‚†
Avalanche Current•†
150
mJ
A
9.0
EAR
dv/dt
TJ
Repetitive Avalanche Current•†
Peak Diode Recovery dv/dt Ġ
Operating Junction and
6.3
mJ
V/ns
5.2
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient
Min.
––––
––––
Typ.
––––
––––
Max.
4.5
Units
RqJC
RqJA
°C/W
65
IRFI530N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
DV(BR)DSS/DTJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA†
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 0.11
W
V
VGS = 10V, ID = 6.6A „
VDS = VGS, ID = 250µA
VDS = 50V, ID = 9.0A†
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 20V
2.0
6.4
––– 4.0
––– –––
Forward Transconductance
S
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 44
––– ––– 6.2
––– ––– 21
IDSS
IGSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -20V
Qg
ID = 9.0A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 80V
VGS = 10V, See Fig. 6 and 13 „†
–––
–––
–––
–––
6.4 –––
27 –––
37 –––
25 –––
VDD = 50V
ID = 9.0A
ns
nH
pF
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 12W
RD = 5.5W, See Fig. 10 „†
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
LD
Internal Drain Inductance
–––
–––
4.5
–––
–––
–––
–––
LS
Internal Source Inductance
7.5
Ciss
Coss
Crss
C
Input Capacitance
––– 640 –––
––– 160 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
88 –––
12 –––
ƒ = 1.0MHz, See Fig. 5†
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
––– ––– 11
showing the
A
ISM
Pulsed Source Current
(Body Diode) •†
integral reverse
––– ––– 60
p-n junction diode.
TJ = 25°C, IS = 6.6A, VGS = 0V „
TJ = 25°C, IF = 9.0A
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
––– ––– 1.3
––– 130 190
––– 650 970
V
ns
Qrr
nC di/dt = 100A/µs „†
Notes:
„ Pulse width £ 300µs; duty cycle £ 2%.
• Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ VDD = 15V, starting TJ = 25°C, L = 3.1mH
RG = 25W, IAS = 9.0A. (See Figure 12)
… t=60s, ƒ=60Hz
† Uses IRF530N data and test conditions
ƒ ISD £ 9.0A, di/dt £ 520A/µs, VDD £ V(BR)DSS
TJ £ 175°C
,
IRFI530N
100
10
1
100
10
1
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T
J
T
= 175°C
= 25°C
J
A
100
A
0.1
1
10
100
0.1
1
10
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics,
Fig 1. Typical Output Characteristics,
TJ = 175oC
TJ = 25oC
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
I
= 15A
D
T = 25°C
J
T = 175°C
J
V
= 50V
DS
V
= 10V
20µs PULSE WIDTH
GS
A
10A
4
5
6
7
8
9
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Junction Temperature (°C)
VGS , Gate-to-Source Voltage (V)
J
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRFI530N
1200
20
16
12
8
V
C
C
C
= 0V,
f = 1MHz
I
= 9.0A
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
gs
gd
ds
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
= C
gd
1000
800
600
400
200
0
= C + C
ds
gd
C
iss
C
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
1
10
100
0
5
10
15
20
25
30
35
40
45
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-SourceVoltage
Gate-to-SourceVoltage
100
10
1
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 175°C
J
10µs
T = 25°C
J
100µs
1ms
T
T
= 25°C
C
J
= 175°C
Single Pulse
V
= 0V
10ms
GS
A
1
A
1000
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRFI530N
RD
12
10
8
VDD
6
Fig 10a. Switching Time Test Circuit
4
2
A
175
0
25
50
75
100
125
150
T , Case Temperature (°C)
C
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
1
0.20
0.10
0.05
P
D M
0.02
0.01
0.1
t
1
t
SINGLE PULSE
2
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t
/ t
2
1
2. Peak T = P
x Z
+ T
thJC
C
DM
J
A
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFI530N
350
300
250
200
150
100
50
I
D
TOP
3.7A
6.4A
BOTTOM 9.0A
10 V
Fig 12a. Unclamped Inductive Test Circuit
V
= 25V
50
DD
0
A
175
25
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRFI530N
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
Low Stray Inductance
· Ground Plane
D.U.T
·
ƒ
·
Low Leakage Inductance
Current Transformer
‚
„
•
RG
·
dv/dt controlled by RG
· Driver same type as D.U.T.
· ISD controlled by Duty Factor "D"
· D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRFI530N
Package Outline — TO-220 Full-Pak
Dimensions are shown in millimeters (inches)
10.60 (.417)
3.40 (.133)
4.80 (.189)
4.60 (.181)
ø
10.40 (.409)
3.10 (.123)
2.80 (.110)
2.60 (.102)
- A -
3.70 (.145)
3.20 (.126)
LEAD ASSIGNMENTS
1 - GATE
7.10 (.280)
6.70 (.263)
2 - DRAIN
3 - SOURCE
16.00 (.630)
15.80 (.622)
1.15 (.045)
MIN.
NOTES:
1
DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
1
2
3
2
CONTROLLING DIMENSION: INCH.
3.30 (.130)
3.10 (.122)
- B -
13.70 (.540)
13.50 (.530)
C
D
A
B
0.48 (.019)
0.44 (.017)
0.90 (.035)
3X
0.70 (.028)
3X
1.40 (.055)
1.05 (.042)
3X
2.85 (.112)
2.65 (.104)
0.25 (.010)
A
M
B
M
MINIMUM CREEPAGE
DISTANCE BETWEEN
A-B-C-D = 4.80 (.189)
2.54 (.100)
2X
Part Marking Information
EXAMPLE : THIS IS AN IRFI840G
WITH ASSEMBLY
A
LOT CODE E401
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
IRFI840G
E401 9245
ASSEMBLY
DATE CODE
(YYWW)
LOT CODE
YY = YEAR
WW = WEEK
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IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
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http://www.irf.com/
Data and specifications subject to change without notice.
4/96
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