DSP56855PB [ETC]
56855 Digital Signal Processor Product Brief ; 56855数字信号处理器产品简介\n
| 型号： | DSP56855PB |
| 厂家： | 
ETC |
| 描述： | 56855 Digital Signal Processor Product Brief
|
| 文件： | 总2页 (文件大小：249K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Freescale Semiconductor, Inc.
HYBRID MCU/DSP
56855
120 MIPS Hybrid Processor
TARGET APPLICATIONS
BENEFITS
• Internet audio decoding
• DTAD
• Voice recognition and command
• Embedded modem/data pump
• Voice processing
• Easy to program with flexible
application development tools
• Time of Day for applications requiring
clock display
• Supports multiple processor
connections
• Flexible 6-Channel Direct Memory
Access (DMA) allows both internal and
external memory transfers with almost
no CPU interruption
• General purpose devices
• Automotive hands-free
• 16-bit quad timer module (with one
external pin) that allows
capture/compare functionality,
and can be cascaded
• External memory expansion up to 2M
words program memory or up to 8M
words data memory increases
capabilities of device for larger
algorithms
• Quad timer module can also be used for
simple digital-to-analog conversion
functionality
• Enhanced synchronous serial interface
with enhanced network and audio modes
The 56855 offers 48 KB of on-chip program SRAM
and 48 KB data SRAM in a 100-pin LQFP package.
The serial peripheral interface (SPI) and the 8-bit
host interface have been removed to provide
flexibility with fewer features to meet customer
price/performance expectations. This device is ideal
for systems that require a DSP with greater on-chip
memory in a smaller package, but do not require an
extensive peripheral set. The 56855 includes a quad
timer module with a signal external output.
56855 16-BIT DIGITAL SIGNAL PROCESSORS
• 120 MIPS at 120MHz
• 48 KB Program SRAM
• 48 KB Data SRAM
• 2 KB Boot ROM
• Two Serial Communication Interfaces
(SCI)
• General purpose 16-bit Quad Timer
• JTAG/Enhanced On-Chip Emulation
(OnCE™) for unobtrusive, real-time
debugging
• Access up to 4 MB of program memory
or up to 16 MB of data memory
• Computer Operating Properly
(COP)/Watchdog Timer
• Chip Select Logic for glueless interface
to ROM and SRAM
• Time of Day (TOD)
• 100-pin LQFP package
• Up to 18 GPIO
• Six independent channels of DMA
• Enhanced Synchronous Serial Interface
(ESSI)
ENERGY INFORMATION
Program Memory
COP/Watchdog
Ext Memory I/F
6-channel DMA
Prog Chip Selects
Up to 18 GPIO
• Fabricated in high-density CMOS with
3.3V, TTL-compatible digital inputs
• Wait and Stop modes available
48 KB SRAM
2 KB Boot ROM
(2) SCI
ESSI
56800E Core
16- Bit Quad Timer
Time of Day
120 MIPS
Data Memory
PLL
48 KB SRAM
JTAG/EOnCE
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
56800E CORE FEATURES
HYBRID MCU/DSP
The 56800E core is based on a Harvard-style architecture consisting of three execution
56855
units operating in parallel, allowing as many as six operations per instruction cycle. The
microprocessor-style programming model and optimized instruction set allow
straightforward generation of efficient, compact code for both DSP and MCU applications.
The instruction set is also highly efficient for C compilers, enabling rapid development of
optimized control applications. Features of the 56800E core include:
PRODUCT DOCUMENTATION
DSP56800E
Reference Manual
Detailed description of the 56800E
architecture, 16-bit DSP core processor
and the instruction set
• Efficient 16-bit hybrid controller engine
with dual Harvard architecture
• Four internal data buses and one
external data bus
• 120 Million Instructions Per Second
(MIPS) at 120MHz core frequency
• Instruction set supports both DSP and
controller functions
Order Number: DSP56800ERM/D
DSP5685x
Detailed description of memory,
peripherals, and interfaces of the
56853, 56854, 56855, 56857, and 56858
• Single-cycle 16 x 16-bit parallel
Multiplier-Accumulator (MAC)
• Four hardware interrupt levels
• Five software interrupt levels
User’s Manual
• Four 36-bit accumulators, including
extension bits
• Controller-style addressing modes and
instructions for compact code
Order Number: DSP5685xUM/D
DSP56855
Technical Data
Sheet
Electrical and timing specifications,
pin descriptions, and package
descriptions
• 16-bit bidirectional shifter
• Efficient C compiler and local variable
support
• Parallel instruction set with unique
addressing modes
• Software subroutine and interrupt stack
with depth limited only by memory
Order Number: DSP56855/D
• Hardware DO and REP loops
DSP56855
Product Brief
Summary description and block diagram
of the core, memory, peripherals
and interfaces
• Three internal address buses and one
external address bus
• JTAG/Enhanced OnCE debug
programming interface
Order Number: DSP56855PB/D
56855 MEMORY FEATURES
• Harvard architecture permits up to three • Off-Chip Memory Expansion (EMI)
simultaneous accesses to program and
data memory
– Access up to 4 MB of program
memory or up to 16 MB of data
AWARD-WINNING
• On-chip Memory
– 48 KB Program SRAM
– 48 KB Data SRAM
– 2 KB Boot ROM
memory (using chip selects)
DEVELOPMENT ENVIRONMENT
– Chip Select Logic for glueless
interface to ROM and SRAM
• Processor Expert™ (PE) technology provides a rapid
application design (RAD) tool that combines easy-to-use
component-based software application creation with an
expert knowledge system.
56855 PERIPHERAL CIRCUIT FEATURES
• The CodeWarrior™ Integrated Development Environment
(IDE) is a sophisticated tool for code navigation, compiling
and debugging. A comprehensive set of evaluation modules
(EVMs) and development system cards will support
concurrent engineering. Together, PE, the CodeWarrior tool
suite and EVMs create a comprehensive, scalable tools
solution for easy, fast and efficient development.
• General Purpose 16-bit Quad Timer with
one external pin*
• Six independent channels of DMA
• Time of Day
• Two Serial Communication Interfaces
(SCI)*
• Up to 18 GPIO
* Each peripheral I/O can be used
alternately as a General Purpose I/O
• Enhanced Synchronous Serial Interface
(ESSI) module*
• Computer Operating Properly
(COP)/Watchdog Timer
• JTAG/Enhanced On-Chip Emulation
(OnCE) for unobtrusive, real-time
debugging
ORDERING INFORMATION
PACKAGE TYPE PIN COUNT
PART
SUPPLY
VOLTAGE
FREQUENCY
(MHz)
ORDER NUMBER
DSP56855
DSP56855
1.8V, 3.3V
1.8V, 3.3V
Low-Profile Quad Flat Pack (LQFP)
Low-Profile Quad Flat Pack (LQFP)
100
100
120
120
DSP56855BU120
SPAK56855BU120
Motorola and the stylized M Logo are registered in the U.S. Patent and Trademark Office. This
product incorporates SuperFlash® technology licensed from SST. All other product or service
names are the property of their respective owners. © Motorola, Inc. 2003
DSP56855PB/D
For More InformRaEtVio3 n On This Product,
Go to: www.freescale.com
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