BCP53-10T1 [ETC]

TRANSISTOR | BJT | PNP | 80V V(BR)CEO | 1.5A I(C) | SOT-223 ; 晶体管| BJT | PNP | 80V V( BR ) CEO | 1.5AI ( C) | SOT- 223\n
BCP53-10T1
型号: BCP53-10T1
厂家: ETC    ETC
描述:

TRANSISTOR | BJT | PNP | 80V V(BR)CEO | 1.5A I(C) | SOT-223
晶体管| BJT | PNP | 80V V( BR ) CEO | 1.5AI ( C) | SOT- 223\n

晶体 晶体管
文件: 总4页 (文件大小:52K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BCP53T1 Series  
Preferred Devices  
PNP Silicon  
Epitaxial Transistors  
This PNP Silicon Epitaxial transistor is designed for use in audio  
amplifier applications. The device is housed in the SOT-223 package  
which is designed for medium power surface mount applications.  
http://onsemi.com  
High Current: 1.5 Amps  
NPN Complement is BCP56  
MEDIUM POWER  
HIGH CURRENT  
SURFACE MOUNT  
PNP TRANSISTORS  
The SOT-223 Package can be soldered using wave or reflow. The  
formed leads absorb thermal stress during soldering, eliminating the  
possibility of damage to the die  
Available in 12 mm Tape and Reel  
Use BCP53T1 to order the 7 inch/1000 unit reel.  
Use BCP53T3 to order the 13 inch/4000 unit reel.  
COLLECTOR 2,4  
Device Marking:  
BCP53T1 = AH  
BCP53–10T1 = AH–10  
BCP53–16T1 = AH–16  
BASE  
1
EMITTER 3  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Collector-Emitter Voltage  
Collector-Base Voltage  
Emitter-Base Voltage  
Collector Current  
Symbol  
Value  
–80  
Unit  
Vdc  
Vdc  
Vdc  
Adc  
V
CEO  
V
CBO  
V
EBO  
MARKING DIAGRAM  
4
–100  
–5.0  
1.5  
1
2
3
AHxxx  
I
C
SOT–223  
CASE 318E  
STYLE 1  
Total Power Dissipation  
P
D
@ T = 25°C (Note 1.)  
1.5  
12  
Watts  
mW/°C  
A
AHxxx = Device Code  
Derate above 25°C  
xxx  
= –10 or –16  
Operating and Storage  
Temperature Range  
T , T  
–65 to  
+150  
°C  
J
stg  
ORDERING INFORMATION  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
Device  
Package  
SOT–223  
SOT–223  
SOT–223  
Shipping  
Thermal Resistance,  
Junction to Ambient  
(surface mounted)  
R
83.3  
°C/W  
θJA  
BCP53T1  
1000/Tape & Reel  
1000/Tape & Reel  
1000/Tape & Reel  
BCP53–10T1  
BCP53–16T1  
Lead Temperature for Soldering,  
0.0625from case  
Time in Solder Bath  
T
L
260  
10  
°C  
Sec  
1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in.  
x 0.059 in.; mounting pad for the collector lead min. 0.93 sq. in.  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
November, 2000 – Rev. 2  
BCP53T1/D  
BCP53T1 Series  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Characteristics  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Collector-Base Breakdown Voltage (I = –100 µAdc, I = 0)  
V
V
–100  
–80  
–100  
–5.0  
Vdc  
Vdc  
C
E
(BR)CBO  
Collector-Emitter Breakdown Voltage (I = –1.0 mAdc, I = 0)  
C
B
(BR)CEO  
Collector-Emitter Breakdown Voltage (I = –100 µAdc, R  
= 1.0 kohm)  
V
Vdc  
C
BE  
(BR)CER  
(BR)EBO  
Emitter-Base Breakdown Voltage (I = –10 µAdc, I = 0)  
V
Vdc  
E
C
Collector-Base Cutoff Current (V  
CB  
= –30 Vdc, I = 0)  
I
–100  
–10  
nAdc  
µAdc  
E
CBO  
Emitter-Base Cutoff Current (V  
= –5.0 Vdc, I = 0)  
I
EBO  
EB  
C
ON CHARACTERISTICS  
DC Current Gain (I = –5.0 mAdc, V  
= –2.0 Vdc) All Part Types  
h
FE  
25  
40  
63  
100  
25  
C
CE  
= –2.0 Vdc)  
(I = –150 mAdc, V  
BCP53T1  
BCP53–10T1  
BCP53–16T1  
250  
160  
250  
C
CE  
(I = –500 mAdc, V  
= –2.0 Vdc) All Part Types  
C
CE  
Collector-Emitter Saturation Voltage (I = –500 mAdc, I = –50 mAdc)  
V
CE(sat)  
–0.5  
–1.0  
Vdc  
Vdc  
C
B
Base-Emitter On Voltage (I = –500 mAdc, V  
C
= –2.0 Vdc)  
V
BE(on)  
CE  
DYNAMIC CHARACTERISTICS  
Current-Gain – Bandwidth Product  
f
T
50  
MHz  
(I = –10 mAdc, V  
CE  
= –5.0 Vdc, f = 35 MHz)  
C
TYPICAL ELECTRICAL CHARACTERISTICS  
500  
500  
V
CE  
= 2 V  
300  
200  
100  
50  
V
CE  
= 2 V  
100  
50  
20  
20  
1
3
5
10  
30 50 100  
300 500 1000  
1
10  
100  
1000  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 1. DC Current Gain  
Figure 2. Current Gain Bandwidth Product  
1
0.8  
0.6  
0.4  
0.2  
0
120  
110  
100  
90  
V
@ I /I = 10  
C B  
(BE)sat  
80  
V
@ V = 2 V  
CE  
(BE)on  
C
ib  
70  
60  
50  
40  
30  
20  
10  
C
V
@ I /I = 10  
C B  
ob  
(CE)sat  
0
1
10  
100  
1000  
2
4
6
8
10 12  
14  
16  
18  
20  
0
I , COLLECTOR CURRENT (mA)  
C
V, VOLTAGE (VOLTS)  
Figure 3. Saturation and “ON” Voltages  
Figure 4. Capacitances  
http://onsemi.com  
2
BCP53T1 Series  
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.15  
3.8  
0.079  
2.0  
0.248  
6.3  
SOT–223  
0.091  
0.091  
2.3  
2.3  
0.079  
2.0  
mm  
inches  
0.059  
1.5  
0.059  
1.5  
0.059  
1.5  
SOT–223 POWER DISSIPATION  
The power dissipation of the SOT–223 is a function of  
the pad size. This can vary from the minimum pad size for  
soldering to the pad size given for maximum power dissipa-  
tion. Power dissipation for a surface mount device is deter-  
the equation for an ambient temperature T of 25°C, one  
can calculate the power dissipation of the device which in  
this case is 1.5 watts.  
A
150°C – 25°C  
83.3°C/W  
mined byT  
, the maximum rated junction temperature  
of the die, Rθ , the thermal resistance from the device  
J(max)  
P
=
= 1.50 watts  
D
JA  
junction to ambient; and the operating temperature, T . Us-  
ing the values provided on the data sheet for the SOT–223  
A
The 83.3°C/W assumes the use of the recommended  
footprint on a glass epoxy printed circuit board to achieve  
a power dissipation of 1.5 watts. Another alternative would  
be to use a ceramic substrate or an aluminum core board  
such as Thermal Clad . Using a board material such as  
Thermal Clad, a higher power dissipation of 1.6 watts can  
be achieved using the same footprint.  
package, P can be calculated as follows.  
D
T
– T  
A
J(max)  
P
=
D
R
θJA  
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values into  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
Always preheat the device.  
The delta temperature between the preheat and  
soldering should be 100°C or less.*  
The soldering temperature and time should not exceed  
260°C for more than 10 seconds.  
When shifting from preheating to soldering, the  
maximum temperature gradient should be 5°C or less.  
After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and  
result in latent failure due to mechanical stress.  
Mechanical stress or shock should not be applied dur-  
ing cooling  
* Soldering a device without preheating can cause exces-  
sive thermal shock and stress which can result in damage  
to the device.  
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering  
method, the difference should be a maximum of 10°C.  
http://onsemi.com  
3
BCP53T1 Series  
PACKAGE DIMENSIONS  
SOT–223  
CASE 318E–04  
ISSUE K  
A
F
NOTES:  
ąă1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
ąă2. CONTROLLING DIMENSION: INCH.  
4
2
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
B
MIN  
6.30  
3.30  
1.50  
0.60  
2.90  
2.20  
MAX  
6.70  
3.70  
1.75  
0.89  
3.20  
2.40  
0.100  
0.35  
2.00  
1.05  
10  
1
3
A
B
C
D
F
0.249  
0.130  
0.060  
0.024  
0.115  
0.087  
0.263  
0.145  
0.068  
0.035  
0.126  
0.094  
D
G
H
J
L
0.0008 0.0040 0.020  
G
0.009  
0.060  
0.033  
0
0.014  
0.078  
0.041  
10  
0.24  
1.50  
0.85  
0
J
K
L
C
M
S
_
_
_
_
0.08 (0003)  
0.264  
0.287  
6.70  
7.30  
M
H
K
STYLE 1:  
PIN 1. BASE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
Thermal Clad is a trademark of the Bergquist Company.  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or  
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold  
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable  
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031  
Phone: 81–3–5740–2700  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
Email: r14525@onsemi.com  
ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
BCP53T1/D  

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