AN-06 [ETC]
SY89429A Frequency Synthesis ; SY89429A频率合成
| 型号： | AN-06 |
| 厂家： | 
ETC |
| 描述： | SY89429A Frequency Synthesis
|
| 文件： | 总12页 (文件大小：192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SY89429A
FREQUENCY
SYNTHESIS
APPLICATION NOTE
AN-06
Introduction
Power Supply Requirements
Micrel-Synergy's SY89429A frequency synthesizer is
SY89429A is designed to operate with a single +5V
designed to be used in various clock subsystems. The supply. The FOUT and /FOUT (the differential PECL
Primary function of the product is to synthesize clock outputs) will interface to PECL inputs of any +5 volt
frequencies required for systems needing a high quality, system. However, SY89429A can also be used in split
low jitter clock source.
supply (+5V and +3.3V) systems as well as true ECL
The cost of other clock sources, either crystal or SAW systems. In a split supply application, the main VCC lines,
oscillators, increase dramatically as precision/frequency (VCC1, VCC_QUIET, and VCC_TTL) are connected to +5V.
requirements of digital systems push into the 100+ MHz The VCC_OUT can be connected to either +3.3V or +5.0V.
arena. Many low cost CMOS frequency synthesizers When applying +3.3V to VCC_OUT, the differential PECL
appeared in the market in the last few years. outputs will interface to PECL inputs of any +3.3V device.
Unfortunately, these products have relatively high jitter The GND and GND (TTL) pins are connected to the
and limited operating frequency range. Therefore, their system ground in both cases. For split supply system,
applications are limited to lower precision/lower please refer to the section titled “Split Supply Design.”
frequencies.
For the ECL system, please refer to the section titled
SY89429A, designed with Micrel-Synergy's high “True ECL Design.”
performance ASSET Bipolar technology and differential
Power Supply Filtering Techniques
ECL circuit technology throughout, is a perfect low cost
alternative to the expensive crystal or SAW oscillators.
Unlike other frequency synthesizers, SY89429A has
extremely low jitter and high supply noise rejection that
ECL is famous for.
Because the device is programmable between 25MHz
to 400MHz using a 16MHz crystal, different system
frequency requirements can all use the same device.
This may dramatically reduce inventory costs and
management of additional products otherwise required
to achieve these various frequencies. This
programmability also makes board/system speed grading
possible as part of the normal production flow without
multiple oscillators. This provides higher overall yield and
lower manufacturing cost.
As in any high speed integrated circuits, power supply
filtering is very important. A 0.1µF high frequency by-
pass capacitor should be used between all separate
power supply pins and ground. VCC1, VCC_QUIET,
VCC_TTL and VCC_OUT should be individually connected
to the power supply plane through vias, and a by-pass
capacitor should be used for each pin. To achieve
optimum jitter performance, better power supply isolation
is required. In this case a ferrite bead along with a 1µF
and a 0.01µF by-pass capacitor should be connected to
each power supply pin. Figure 4 shows the connections
of the power supply filtering using ferrite beads.
Termination For PECL Outputs
The differential PECL outputs, FOUT and /FOUT, are
open emitter outputs. Therefore, terminating resistors or
current sources must be used for functionality. These
outputs are designed to drive 50Ω transmission lines.
Matched impedance techniques should be used to
maximize operating frequency and minimize wave-form
distortion. There are a few simple termination schemes.
Figure 1 shows 3 simple termination circuits for a +5V
system.
In addition to cost savings, there are many other
benefits to using SY89429A. Normal system production
testing can incorporate frequency margining that is
unavailable to fixed frequency designs as in crystal or
SAW oscillators. This capability leads directly to higher
product quality and reliability. Furthermore, SY89429A
can be programmed in small steps (1MHz steps with a
16.000MHz crystal). Other precise frequencies can be
programmed as well. See section titled “Advance
Frequency Control Applications.” This ability to provide
any frequency eliminates the need for the high cost
custom oscillator alternatives.
Interface For Inputs
The SY89429A is designed to interface with TTL
compatible signals. All inputs except XTAL1 and XTAL2
are TTL compatible. These inputs have internal pull up
resistors. Therefore, any inputs can be left open—open
inputs are logical “1” state. Although inputs can be left
open, it is recommended that open inputs be connected
to a power supply line. These inputs can be connected
to a power supply line (VCC for a logical “1”) or a ground
line (VEE for a logical “0”) directly or through series
resistors. Alternatively, these inputs can also be driven
directly from any TTL compatible signals.
General Requirements
Operating the SY89429A is very simple. Very few low
cost external components are required. These low cost
external components provide the tuning capability needed
to optimize and minimize jitter characteristics in each
individual system application. To achieve the best
possible performance in jitter and power supply noise
rejection, basic high speed design guide lines should be
followed.
Rev.: G
Amendment:/0
Issue Date: August, 1999
1
APPLICATION NOTE
AN-06
Micrel
the total supply voltage. In the case of a +3.3V system, a –
2V supply is needed to provide the required +5V across
VCC and VEE terminals. Specifically, all VCC pins including
VCC_OUT are connected to +3.3V supply. All ground pins
are connected to –2V supply. This configuration eliminates
the need for a +5V supply if there is a –2V supply already
in the system. However, it also creates some interesting
interface problems.
Since the most positive power supply is +3.3V, the XTAL1,
XTAL2, FOUT and /FOUT interface to +3.3V PECL signal.
If TTL interface is required, SY100ELT22L may be used at
the XTAL1 and XTAL2 pins for translating the TTL signal to
a +3.3V PECL signal. The SY100ELT23L can be used at
FOUT and /FOUT pins for translating the +3.3V PECL signal
to a TTL signal. Both SY100ELT22L and SY100ELT23L
require only a single +3.3V power supply. Figure 5 shows a
split supply design with TTL interface for XTAL1, XTAL2,
FOUT and /FOUT.
Interfacing to all other inputs is trickier. As mentioned
before, these inputs have internal pull up resistors.
Therefore, any input can be left open and open inputs are
logical “1” state. Although inputs are allowed to be open, it
is recommended that open inputs be connected to a power
supply line. These inputs can be connected to VCC lines
(+3.3V for a logical “1”) or VEE lines (–2V for a logical “0”)
directly or through series resistors. These inputs can also
be driven by TTL or PECL signals with proper signal
translators. Figure 6 shows the translation for a normal TTL
signal. Figure 7 shows the translation for a +3.3V PECL
signal.
Input Reference Frequency And
On-Chip Crystal Oscillator
The SY89429A is designed based on input reference
frequency of 16MHz and phase detector frequency of
2MHz. A 16MHz differential PECL clock source can be
used to drive the XTAL1 and XTAL2 pins directly. An
alternative to a PECL clock source is to utilize the on-
chip crystal oscillator. This oscillator requires only an
off-chip 16MHz reference crystal connected between
XTAL1 and XTAL2 pins. A 5.6kΩ resistor connected in
parallel with the crystal is recommended. For using other
input reference frequencies, refer to section titled
“Advance Frequency Control Applications.” Using
16MHz reference frequency, the output frequency can
be programmed from 25MHz to 400MHz in 1MHz steps.
Due to variability of the device, the crystal and the printed
circuit board, connecting a fixed value capacitor in the 5-
20pF range in series with the crystal should provide
frequency control to 100ppm. Figure 3a shows the
recommended crystal oscillator circuit. A variable
capacitor can be used instead of the fixed capacitor to
achieve frequency control better than 100ppm with
manual adjustment. Varactors can also be included for
using SY89429A as a voltage controlled oscillator. For
more frequency control applications, please refer to the
sections titled “Advanced frequency control
applications” and “Voltage controlled crystal oscillator
applications.” For interfacing to TTL/CMOS clock
sources, SY100ELT22 may be used to translate a TTL/
CMOS signal to PECL signal.
True ECL Design
Filter Design
The filter for any Phase Locked Loop (PPL) based device
deserves special attention. SY89429A provides filter pins
for an external filter. A simple three-components passive
filter is recommended for achieving ultra low jitter. Figure
3b shows the recommended three-components passive
filter. Due to the differential design, the filter is connected
between LOOP_FILTER and LOOP_REF pins. With this
configuration, extremely high supply noise rejection is
achieved. It is important that the filter circuit and filter pins
be isolated from any non-common mode coupling and placed
in the VCC plane.
The SY89429A is designed for TTL/PECL systems. It
can be designed into a pure ECL environment easily.
Connect all VCC pins to ground and all GND pins to –4.5V
(or –5.2V) power supply line. With this operating condition,
XTAL1, XTAL2, FOUT and /FOUT interfaces directly with
normal 100K ECL signals. All other inputs have internal pull
up resistors. Therefore, any input can be left open and
open inputs are logical “1” state. Although inputs are allowed
to be open, it is recommended that open inputs be connected
to a power supply line. These inputs can be connected to
ground lines (0 volt for a logical “1”) or negative power
supply lines (–4.5V or –5.2V for a logical “0”) directly or
through series resistors. These inputs can interface to normal
ECL signals with SY100ELT23 for signal translation. Figure
8 shows the schematic with signal translations.
Generating High Speed TTL Clock Signals
A high speed PECL-to-TTL translator such as SY10/
100ELT23 or SY10/100ELT23L (for +3.3V) may be used to
generate high speed TTL compatible signals. High speed
PECL to TTL translating Clock Drivers such as SY10/
100841/842 or SY10/100641/646 may be added if multiple
copies of such clocks are desired. These translators are
capable of driving 50pF loads up to 160MHz.
Advanced Frequency Control Applications
The primary function of this product is to synthesize clock
frequencies from 25MHz to 400MHz in 1MHz steps with a
16.00MHz crystal. However, there are many other
applications that are not so obvious. Even though SY89429A
is said to be able to generate frequencies between 25MHz
to 400MHz in 1MHz steps with a 16MHz crystal, output
Split Supply Design
In systems where +5V are not available, a split supply
design may be the solution. Split supply generally refers to
using a positive supply and a negative supply to make up
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APPLICATION NOTE
AN-06
Micrel
frequency is programmed by properly configuring the internal
dividers and can be represented by this formula (See Table
1 for an application example):
Input Ref.
Frequency
Test
FOUT
M
N
VCO
(FOUT/4)
8.192MHz 405
19.44MHz 256
51.84MHz 96
51.84MHz 96
8
4
4
8
414.72MHz 51.84MHz 12.96MHz
622.08MHz 155.52MHz 38.88MHz
622.08MHz 155.52MHz 38.88MHz
622.08MHz 77.76MHz 19.44MHz
FXTAL
8
M
N
FOUT =
×
FXTAL
8
1
Step Size =
×
N
Table 1. M & N Combinations For Generating OC-3
and Related Frequencies
FXTAL
FVCO =
×M
8
In addition to using a single SY89429A, multiple
SY89429As in conjunction with dividers may be used to
achieve multiple required frequencies. There are many
companion divider products offered by Micrel-Synergy for
these applications. SY100EL32 is a divider by 2 and
SY100EL33 is a divider by 4. SY100S834 is a divider by 1,
2, 4 or 2, 4, 8 while SY100S838 is a divider by 1, 2/3 or 2,
4/6. Figure 9 and 10 show examples of using SY89429A in
conjuction with dividers to generate all OC-3 and related
frequencies using 19.44MHz and 16.384MHz clock,
respectively. The MR (Master Reset) pins are used to
synchronize all frequency outputs.
where
FXTAL is the crystal frequency or input reference frequency
M is the VCO frequency multiplier (from 2 to 511)
N is the post divider (2, 4, 8, or 16)
FVCO is the VCO frequency
Crystal oscillator frequency is designed to be less than
25MHz using a fundamental crystal. In many applications,
wider range of input reference frequency can be used. Input
frequencies at the low end is limited to above 6.26MHz due
to minimum VCO frequency of 400MHz. Input frequency at
the high end is limited by the speed of the phase detector
and should not exceed 200MHz.
Voltage Controlled Crystal Oscillator
Applications
SY89429A is a PLL (Phase Locked Loop) based
frequency synthesizer with on chip crystal oscillator. With a
16MHz crystal connected in series with varactors as shown
in Figure 11, the oscillator frequency can easily be pulled
by ±1000ppm. Since the output frequency is directly
proportional to the cyrstal oscillator frequency, the output
frequency is pulled by the same amount (in ppm) as the
crystal oscillator.
Frequency Multiplication Applications
As mentioned before, FOUT is a function of M and N.
Therefore, output frequency may be set to any multiplication
factor as long as the following is valid:
1) M is an integer between 2 to 511 inclusive
2) N is 2, 4, 8, or 16
3) Input reference frequency is more than 6.26MHz and
less than 200MHz
4) VCO frequency is more than 400MHz and less than
800MHz
Pulse Shaping Application
For applications where 50% duty cycle clock is important,
SY89429A may be the perfect solution. Many clock
Oscillators or signals from the back plane do not provide
the required 50% duty cycle. The problem may be corrected
by simply using the SY89429A as a 1X frequency multiplier.
The FOUT output will always maintain 50% duty cycle.
However, phase relationship between the input and output
may not be maintained. For frequencies between 25MHz
and 200MHz, use the SY89429A as a 1X multiplier. For
frequencies between 200MHz and 400MHz, use a divide by
2 stage as a prescaler and the SY89429A as a 2X frequency
multiplier as shown in Figure 12.
Using the FOUT equation, it is very easy to determine
what M and N values must be for a certain multiplication
factor.
One area of interest is communication. The frequencies
often encountered are 155.52MHz for OC-3 or STS-3 and
51.84MHz for OC-1 or STS-1 standard SONET rates. The
following table is a summary of how these frequencies may
be generated:
3
APPLICATION NOTE
AN-06
Micrel
+5V
+5V
Zo
PECL
SY89429A
Input
R=Zo
R=Zo
+5V
0.1µF
3V
3V Reg.
<<Zo
+5V
+5V
Zo
PECL
Input
SY89429A
+5V
R=Zo
0.1µF
R=Zo
R=2Zo
+5V
R=5/3Zo
R=5/3Z
+5V
+5V
Zo
PECL
Input
SY89429A
R=5/2Zo
R=5/2Zo
Figure 1. Matched Impedance Termination Schemes for 5V Systems
4
APPLICATION NOTE
AN-06
Micrel
VCC VCC_OUT
+5V +3.3V
+3.3V
Zo=100Ω
PECL
SY89429A
Inputs
100Ω
100Ω
VCC VCC_OUT
+5V +3.3V
+3.3V
Zo
PECL
Inputs
SY89429A
+5V
0.1µF
R=Zo
R=Zo
R=Zo
VCC VCC_OUT
+5V +3.3V
3.3V
+3.3V
Zo
R=5/2Zo
R=5/3Zo
R=5/2Zo
R=5/3Zo
PECL
SY89429A
Inputs
Figure 2. Matched Impedance Termination Schemes for Split 5V and 3.3V Systems
5
APPLICATION NOTE
AN-06
Micrel
XTAL2
XTAL1
optional, for fine
frequency tuning.
5-20pF
16MHz
4.7kΩ – 5.6KΩ
Figure 3a. Recommended External Components for Crystal Oscillator
LOOP_FILTER
LOOP_REF
3300pF
0.47µF
150Ω
Figure 3b. Recommended Passive Filter Circuit
6
APPLICATION NOTE
AN-06
Micrel
Figure 4. Power Supply Filtering
7
APPLICATION NOTE
AN-06
Micrel
+3V
SY89429A
OSC FOUT
PECL
PECL
3V
TTL
TTL
ELT22L
ELT23L
-2V
Figure 5. Split Supply Designs
+3V
OSC
PECL
FOUT
PECL
SY89429A
TTL
Input
TTL
ELT22L
ELT23
-2V
Figure 6. Interfacing to SY89429A TTL Inputs with
3V TTL Signals for Split Supply Designs
8
APPLICATION NOTE
AN-06
Micrel
+3V
VCC
OSC
PECL
FOUT
PECL
SY89429A
TTL
Input
PECL
ELT23
GND
-2V
Figure 7. Interfacing to SY89429A TTL Inputs with
3V PECL Signals for Split Supply Designs
VCC
ECL
ECL
OSC
FOUT
SY89429A
ECL
TTL
Input
ELT23
GND
-5.2V
Figure 8. Interfacing to SY89429A TTL Inputs with
ECL Signals for True ECL Designs
9
APPLICATION NOTE
AN-06
Micrel
S838
155.52MHz
155.52MHz
/1
51.48MHz
/3
SY89429A
19.44MHz
M=256
N=4
S834
77.76MHz
38.88MHz
19.44MHz
/2
/4
/8
MR
Figure 9. Generating OC-3 and Related Frequencies using 19.44MHz Reference
S838
155.52MHz
51.84MHz
8.192MHz
51.84MHz
155.52MHz
/1
/3
EL32
SY89429A
SY89429A
16.384MHz
M = 405
N = 8
M = 96
N = 4
/2
S834
77.76MHz
38.88MHz
19.44MHz
/2
/4
/8
MR
Figure 10. Generating OC-3 and Related Frequencies using 16.384MHz Reference
10
APPLICATION NOTE
AN-06
Micrel
XTAL1
XTAL2
SY89429A
5.6K
16MHz
FOUT
±1000PPM
16MHz
±1000PPM
10MΩ
10KΩ
0.1µF
VCC
VIN (Control
Voltage)
Figure 11. Voltage Controlled Crystal Oscillator Cicuit (VCXO)
11
APPLICATION NOTE
AN-06
Micrel
t
Input
<<50% Duty Cycle
50% Duty Cycle
Output
t/2
t/2
Undefined Phase
Relationship
SY89429A
1X
Input
OSC
FOUT
Output
For Frequencies Between 25MHz and 200MHz
SY89429A
2X
EL32
Input
OSC
FOUT
Output
/2
For Frequencies Between 25MHz and 200MHz
Figure 12. 50% Duty Cycle Pulse Shaping Circuits
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
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