CY7C1020-15VCT [CYPRESS]
Standard SRAM, 32KX16, 15ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, SOJ-44;
| 型号： | CY7C1020-15VCT |
| 厂家： | 
CYPRESS |
| 描述： | Standard SRAM, 32KX16, 15ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, SOJ-44 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总10页 (文件大小：186K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
020CY7C10
CY7C1020
32K x 16 Static RAM
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A14). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A14).
Features
• 5.0V operation (± 10%)
• High speed
— tAA = 10 ns
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O9 to I/O16. See the
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
• Low active power
— 825 mW (max., 10 ns, “L” version)
• Very Low standby power
— 550 µW (max., “L” version)
• Automatic power-down when deselected
• Independent Control of Upper and Lower bytes
• Available in 44-pin TSOP II and 400-mil SOJ
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
Functional Description
The CY7C1020 is a high-performance CMOS static RAM or-
ganized as 32,768 words by 16 bits. This device has an auto-
matic power-down feature that significantly reduces power
consumption when deselected.
The CY7C1020 is available in standard 44-pin TSOP type II
and 400-mil-wide SOJ packages.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Logic Block Diagram
Pin Configuration
SOJ / TSOP II
DATA IN DRIVERS
Top View
44
NC
1
A
0
43
42
41
40
39
38
A
A
14
13
12
2
3
4
5
6
1
A
A
2
A
A
A
OE
6
11
A
BHE
BLE
I/O
I/O
I/O
5
CE
I/O
I/O
I/O
A
A
A
4
3
2
1
32K x 16
RAM Array
I/O – I/O
1
8
7
1
16
37
36
35
34
33
8
2
3
15
14
13
I/O – I/O
9
9
16
A
A
10
11
12
13
I/O
V
I/O
4
0
V
SS
CC
V
V
SS
CC
32
I/O
I/O
I/O
5
6
7
8
12
11
I/O
I/O
I/O
31
30
29
28
14
15
16
I/O
I/O
10
9
COLUMN DECODER
WE 17
18
NC
27
26
25
A
A
10
3
BHE
19
20
21
22
A
4
A
9
8
7
WE
CE
OE
A
A
5
A
6
A
24
23
1020-2
NC
NC
BLE
1020-1
Selection Guide
7C1020-10
7C1020-12
7C1020-15
7C1020-20
Maximum Access Time (ns)
10
180
150
3
12
170
140
3
15
160
130
3
20
160
130
3
Maximum Operating Current (mA)
L
L
Maximum CMOS Standby Current (mA)
0.1
0.1
0.1
0.1
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05058 Rev. **
Revised August 31, 2001
CY7C1020
Current into Outputs (LOW) ........................................ 20 mA
Maximum Ratings
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Latch-Up Current..................................................... >200 mA
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Operating Range
Supply Voltage on VCC to Relative GND[1] .... –0.5V to +7.0V
Ambient
Range
Temperature[2]
VCC
DC Voltage Applied to Outputs
in High Z State[1].....................................–0.5V to VCC +0.5V
Commercial
0°C to +70°C
4.5V–5.5V
DC Input Voltage[1] .................................–0.5V to VCC +0.5V
Electrical Characteristics Over the Operating Range
7C1020-10
7C1020-12
7C1020-15
Parameter
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage[1]
Input Load Current
Test Conditions
VCC = Min., IOH = –4.0 mA
VCC = Min., IOL = 8.0 mA
Min. Max. Min. Max. Min. Max. Unit
VOH
VOL
VIH
VIL
2.4
2.4
2.4
V
V
0.4
6.0
0.8
+1
0.4
6.0
0.8
+1
0.4
6.0
0.8
+1
2.2
–0.5
–1
2.2
–0.5
–1
2.2
–0.5
–1
V
V
IIX
GND < VI < VCC
µA
µA
IOZ
Output Leakage
Current
GND < VI < VCC
,
–2
+2
–2
+2
–2
+2
Output Disabled
ICC
VCC Operating
Supply Current
VCC = Max.,
IOUT = 0 mA,
f = fMAX = 1/tRC
180
150
170
140
160
130
mA
mA
L
L
L
ISB1
Automatic CE
Power-Down Current
—TTL Inputs
Max. VCC, CE > VIH
VIN > VIH or
VIN < VIL, f = fMAX
20
10
20
10
20
10
ISB2
Automatic CE
Power-Down Current
—CMOS Inputs
Max. VCC
,
3
3
3
mA
CE > VCC – 0.3V,
VIN > VCC – 0.3V,
or VIN < 0.3V, f = 0
100
100
100
µA
Notes:
1. VIL (min.) = –2.0V for pulse durations of less than 20 ns.
2. A is the case temperature.
T
Document #: 38-05058 Rev. **
Page 2 of 10
CY7C1020
Electrical Characteristics Over the Operating Range (continued)
7C1020-20
Parameter
VOH
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage[1]
Input Load Current
Test Conditions
VCC = Min., IOH = –4.0 mA
VCC = Min., IOL = 8.0 mA
Min.
Max.
Unit
V
2.4
VOL
VIH
VIL
IIX
0.4
6.0
0.8
+1
V
2.2
–0.5
–1
V
V
GND < VI < VCC
µA
µA
mA
IOZ
ICC
Output Leakage Current
GND < VI < VCC, Output Disabled
–2
+2
VCC Operating
Supply Current
VCC = Max.,
IOUT = 0 mA,
f = fMAX = 1/tRC
160
130
L
ISB1
Automatic CE
Power-Down Current
—TTL Inputs
Max. VCC, CE > VIH
VIN > VIH or
VIN < VIL, f = fMAX
20
10
mA
L
L
ISB2
Automatic CE
Power-Down Current
—CMOS Inputs
Max. VCC
,
3
mA
CE > VCC – 0.3V,
VIN > VCC – 0.3V,
or VIN < 0.3V, f = 0
100
µA
Capacitance[3]
Parameter
Description
Input Capacitance
Output Capacitance
Test Conditions
Max.
Unit
pF
CIN
TA = 25°C, f = 1 MHz,
VCC = 5.0V
8
8
COUT
pF
Note:
3. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
R 481Ω
R 481Ω
ALL INPUT PULSES
90%
5V
5V
3.0V
GND
90%
10%
OUTPUT
OUTPUT
10%
R2
255Ω
R2
255Ω
30 pF
5 pF
INCLUDING
JIG AND
SCOPE
INCLUDING
JIG AND
SCOPE
<3 ns
<3 ns
(b)
1020-3
(a)
1020-4
167Ω
30 pF
1.73V
OUTPUT
Equivalent to:
THÉVENIN
EQUIVALENT
Document #: 38-05058 Rev. **
Page 3 of 10
CY7C1020
Switching Characteristics[4] Over the Operating Range
7C1020-10
7C1020-12
7C1020-15
7C1020-20
Parameter
Description
Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC
Read Cycle Time
Address to Data Valid
10
3
12
3
15
3
20
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
10
12
15
20
tOHA
tACE
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
tPU
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z[5, 6]
CE LOW to Low Z[6]
CE HIGH to High Z[5, 6]
CE LOW to Power-Up
CE HIGH to Power-Down
Byte enable to Data Valid
Byte enable to Low Z
Byte disable to High Z
10
5
12
5
15
7
20
9
0
3
0
0
3
0
0
3
0
0
3
0
5
5
6
6
7
7
8
8
tPD
12
5
12
6
15
7
20
9
tDBE
tLZBE
tHZBE
0
0
0
0
5
6
7
9
WRITE CYCLE[7]
tWC
tSCE
tAW
Write Cycle Time
10
8
12
9
15
10
10
0
12
12
12
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
7
8
tHA
0
0
tSA
0
0
0
0
tPWE
tSD
7
8
10
10
0
12
10
0
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z[6]
5
6
tHD
0
0
tLZWE
tHZWE
3
3
3
3
WE LOW to High Z[5, 6]
5
6
7
9
tBW
Byte enable to end of write
7
8
9
12
Notes:
4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
5.
tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write,
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Document #: 38-05058 Rev. **
Page 4 of 10
CY7C1020
Switching Waveforms
Read Cycle No. 1[8, 9]
t
RC
ADDRESS
t
AA
t
OHA
DATA OUT
PREVIOUS DATA VALID
DATA VALID
1020-5
Read Cycle No. 2(OEControlled) [9, 10]
ADDRESS
t
RC
CE
t
ACE
OE
t
HZOE
t
DOE
BHE, BLE
t
LZOE
t
HZCE
t
DBE
t
LZBE
t
HZBE
HIGH
IMPEDANCE
HIGH IMPEDANCE
DATA OUT
DATA VALID
t
LZCE
t
PD
I
t
CC
PU
V
CC
50%
50%
SUPPLY
CURRENT
I
SB
1020-6
Notes:
8. Device is continuously selected. OE, CE, BHE and/or BHE = VIL.
9. WE is HIGH for read cycle.
10. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05058 Rev. **
Page 5 of 10
CY7C1020
Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled) [11, 12]
t
WC
ADDRESS
t
SA
t
SCE
CE
t
AW
t
HA
t
PWE
WE
t
BW
BHE, BLE
t
t
SD
HD
DATAI/O
1020-7
Write Cycle No. 2 (BLEor BHE Controlled)
t
WC
ADDRESS
t
SA
t
BW
BHE, BLE
t
AW
t
HA
t
PWE
WE
CE
t
SCE
t
t
HD
SD
DATAI/O
1020-8
Notes:
11. Data I/O is high impedance if OE or BHE and/or BLE= VIH
.
12. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05058 Rev. **
Page 6 of 10
CY7C1020
Switching Waveforms (continued)
Write Cycle No.3
Controlled, OE LOW)
(WE
t
WC
ADDRESS
CE
t
SCE
t
AW
t
HA
t
SA
t
PWE
WE
t
BW
BHE, BLE
t
HZWE
t
t
SD
HD
DATA I/O
t
LZWE
1020-10
Truth Table
CE OE WE BLE BHE
I/O1–I/O8
High Z
I/O9–I/O16
Mode
Power
H
L
X
L
X
H
X
L
X
L
High Z
Power-Down
Read - All bits
Standby (ISB
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
)
Data Out
Data Out
High Z
Data Out
High Z
)
L
H
L
Read - Lower bits only
Read - Upper bits only
Write - All bits
)
H
L
Data Out
Data In
High Z
)
L
X
L
L
Data In
Data In
High Z
)
L
H
L
Write - Lower bits only
Write - Upper bits only
)
H
X
H
Data In
High Z
)
L
L
H
X
H
X
X
H
High Z
Selected, Outputs Disabled
Selected, Outputs Disabled
)
High Z
High Z
)
Document #: 38-05058 Rev. **
Page 7 of 10
CY7C1020
Ordering Information
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
Package Type
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
10
CY7C1020-10VC
CY7C1020L-10VC
CY7C1020-10ZC
CY7C1020L-10ZC
CY7C1020-12VC
CY7C1020L-12VC
CY7C1020-12ZC
CY7C1020L-12ZC
CY7C1020-15VC
CY7C1020L-15VC
CY7C1020-15ZC
CY7C1020L-15ZC
CY7C1020-20VC
CY7C1020L-20VC
CY7C1020-20ZC
CY7C1020L-20ZC
V34
V34
Z44
Z44
V34
V34
Z44
Z44
V34
V34
Z44
Z44
V34
V34
Z44
Z44
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
44-Lead TSOP Type II
12
15
20
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
44-Lead TSOP Type II
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
44-Lead TSOP Type II
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
44-Lead TSOP Type II
Package Diagrams
44-Lead (400-Mil) Molded SOJ V34
51-85082-B
Document #: 38-05058 Rev. **
Page 8 of 10
CY7C1020
Package Diagrams (continued)
44-Pin TSOP II Z44
51-85087-A
Document #: 38-05058 Rev. **
Page 9 of 10
© Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
CY7C1020
Document Title: CY7C1020 32K x 16 Static RAM
Document Number: 38-05058
Issue
Date
Orig. of
Change
REV.
ECN NO.
Description of Change
Change from Spec number: 38-00542 to 38-05058
**
107249
09/10/01
SZV
Document #: 38-05058 Rev. **
Page 10 of 10
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