CS8156 [CHERRY]
12V, 5V Low Dropout Dual Regulator with ENABLE; 12V ， 5V低压降稳压器双带使能
| 型号： | CS8156 |
| 厂家： | 
CHERRY SEMICONDUCTOR CORPORATION |
| 描述： | 12V, 5V Low Dropout Dual Regulator with ENABLE |
| 文件： | 总8页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CS8156
12V, 5V Low Dropout Dual Regulator
with ENABLE
Features
■ Two regulated outputs
Description
The CS8156 is a low dropout 12V/5V
The regulator is protected against over-
voltage conditions. Both outputs are
protected against short circuit and ther-
mal runaway conditions.
dual output linear regulator. The 12V
± 5% output sources 750mA and the 5V
±2.0% output sources 100mA.
12V ±5.0%; 750mA
5V ±2.0%; 100mA
The on board ENABLE function con-
The CS8156 is packaged in a 5 lead
trols the regulatorÕs two outputs. When TOÐ220 with copper tab. The copper
■ Very low SLEEP mode
the ENABLE lead is low, the regulator
is placed in SLEEP mode. Both outputs
are disabled and the regulator draws
only 200nA of quiescent current.
tab can be connected to a heat sink if
necessary.
current drain 200nA
■ Fault Protection
Reverse Battery
+60V, -50V Peak
Transient Voltage
Absolute Maximum Ratings
Short Circuit
Input Voltage
Operating Range.....................................................................-0.5V to 26V
Peak Transient Voltage (Load Dump = 46V) ....................................60V
Internal Power Dissipation..................................................Internally Limited
Operating Temperature Range................................................-40¡C to +125¡C
Junction Temperature Range...................................................-40¡C to +150¡C
Storage Temperature Range ....................................................-65¡C to +150¡C
Lead Temperature Soldering
Thermal Shutdown
■ CMOS Compatible
ENABLE
Wave Solder (through hole styles only)..........10 sec. max, 260¡C peak
Package Options
Block Diagram
5 Lead TO-220
Tab (Gnd)
VOUT , 5V
VIN
2
Anti-Saturation
and
Current Limit
+
-
ENABLE
+
-
Pre-Regulator
V
OUT , 12V
1
Over Voltage
Shutdown
Gnd
1
2
3
4
5
VIN
Anti-Saturation
and
Current Limit
Bandgap
VOUT1
Gnd
ENABLE
VOUT2
+
-
Reference
1
Thermal
Shutdown
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 2/19/98
1
A
¨
Company
Electrical Characteristics for VOUT: VIN = 14.5V, IOUT1 = 5mA, IOUT2 = 5mA, -40¡C ² TJ ² +150ûC, -40¡C ² TC ² +125ûC
unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
■ Output Stage(VOUT1
)
Output Voltage, VOUT1
Dropout Voltage
13V ² VIN ² 16V, IOUT1 ² 750mA
11.2
12.0
12.8
V
IOUT1 = 500mA
IOUT1 = 750mA
0.4
0.6
0.6
1.0
V
V
Line Regulation
Load Regulation
Quiescent Current
13V ² VIN ² 16V ,5mA ² IOUT < 100mA
5mA ² IOUT1 ² 500mA
15
15
80
80
mV
mV
IOUT1 ² 500mA, No Load on Standby
IOUT1 ² 750mA, No Load on Standby
45
100
125
250
mA
mA
Sleep Mode
ENABLE = Low
200
70
nA
dB
Ripple Rejection
f = 120Hz, IOUT = 5mA,
VIN = 1.5VPP at 15.5VDC
42
Current Limit
0.75
60
1.20
90
2.50
A
V
V
Maximum Line Transient
VOUT1 ² 13V
Reverse Polarity
VOUT1 ³ -0.6V, 10½ Load
-18
-30
Input Voltage, DC
Reverse Polarity Input
Voltage, Transient
1% Duty Cycle, t = 100ms, VOUT ³ -6V,
10½ Load
-50
-80
V
Output Noise Voltage
Output Impedance
10Hz - 100kHz
500
1.0
45
µVrms
500mA DC and 10mA rms, 100Hz
0.2
34
½
V
Over-voltage Shutdown
28
■ Standby Output (VOUT2
)
Output Voltage, (VOUT2
Dropout Voltage
Line Regulation
)
9V ² VIN ² 16V, 1mA ² IOUT2 ² 100mA
IOUT2 ² 100mA
4.90
5.00
5.10
0.60
50
V
V
6V ² VIN ² 26V; 1mA ² IOUT ² 100mA
1mA ² IOUT2 ² 100mA; 9V ² VIN ² 16V
VOUT1 OFF, VOUT2 OFF, VENABLE = 0.8V
5
5
mV
mV
µA
dB
Load Regulation
Quiescent Current
Ripple Rejection
50
1
350
f = 120Hz; IOUT = 100mA,
VIN = 1.5VPP at 14.5VDC
42
70
Current Limit
100
200
mA
■ ENABLE Function (ENABLE)
Input ENABLE Threshold
VOUT1 Off
VOUT1 On
1.25
1.25
0.80
10
V
V
2.00
-10
Input ENABLE Current
VENABLE ² VTHRESHOLD
Package Lead Description
LEAD SYMBOL
0
µA
PACKAGE LEAD #
5 Lead TO-220
FUNCTION
1
2
3
4
VIN
Supply voltage, usually direct from battery.
Regulated output 12V, 750mA (typ)
Ground connection.
VOUT1
Gnd
ENABLE
CMOS compatible input lead; switches outputs on and off.
When ENABLE is high VOUT1 and VOUT2 are active.
5
VOUT2
Regulated output 5V, 100mA (typ).
2
Typical Performance Characteristics
Dropout Voltage vs IOUT2
VOUT1 vs. Input Voltage
13
12
2000
1800
RL=10W
11
10
1600
1400
1200
1000
800
9
8
7
6
5
4
3
2
1
0
600
400
200
0
-1
-2
0
50
100
150
200
-40
-20
0
20
40
60
IOUT (mA)
INPUT VOLTAGE (V)
VOUT1 vs. Temperature
VOUT2 vs. Temperature
5.030
5.020
5.010
5.000
4.990
4.980
4.970
12.15
12.10
12.05
12.00
11.95
11.90
11.85
11.80
11.75
-40 -20
0
20 40 60 80 100 120 140 160
-40 -20
0
20 40 60 80 100 120 140 160
Temp (°C)
Temp (°C)
ENABLE Current vs. ENABLE Voltage
ENABLE Current vs. ENABLE Voltage
5.0
100
4.0
3.0
2.0
80
60
40
20
0
1.0
0.0
0
1
2
3
4
5
0.0
5
10
15
20
25
V
(V)
V
(V)
ENABLE
ENABLE
3
Typical Performance Characteristics: continued
Line Transient Response (VOUT1
)
Line Transient Response (VOUT2
)
20
10
10
5
IOUT1 = 500mA
IOUT2 = 100mA
0
-5
0
-10
-20
-10
3
2
1
3
2
1
0
0
0
10 20
30
40
50
60
0
10
20
30
40
50
60
TIME (ms)
TIME (ms)
Load Transient Response (VOUT1
)
Load Transient Response (VOUT2
)
150
100
50
150
100
50
0
0
-50
-100
-150
0.8
0.6
0.4
0.2
0
-50
-100
-150
20
15
10
5
0
0
10
20
30
40
50
60
0
10
20
30
40
50
60
TIME (ms)
TIME (ms)
Quiescent Current vs Output Current for VOUT2
Maximum Power Dissipation (TO-220)
20
150
140
130
120
110
100
90
80
70
60
50
No Load on 5V
18
16
14
12
10
8
INFINITE
HEAT SINK
VIN = 14V
125ûC
25ûC
-40ûC
10°C/W HEAT SINK
6
40
30
20
10
4
NO HEAT SINK
2
0
0
0
100 200 300 400 500 600
Output Current (mA)
700 800
0
10 20 30 40 50 60 70 80 90
AMBIENT TEMPERATURE (°C)
4
Typical Performance Characteristics: continued
Quiescent Current vs Output Current for VOUT1
Line Regulation vs Output Current for VOUT2
22
20
18
16
14
12
10
8
3
2
No Load On 12V
VIN = 14V
1
25ûC
0
-40ûC
-1
-2
-3
-4
-5
-6
125ûC
-40ûC
125ûC
6
VIN = 6 - 26V
25ûC
4
2
0
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Output Current (mA)
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Output Current (mA)
Line Regulation vs Output Current for VOUT1
Load Regulation vs Output Current for VOUT2
25
0
-2
20
15
10
5
-40ûC
25ûC
VIN = 13 - 26V
125ûC
-4
-6
0
25ûC
-8
-5
-10
-15
-20
-25
-30
-35
-40
-10
-12
-14
-16
-18
125ûC
-40ûC
VIN = 14V
0
100 100 100 100 100 100 100 800
Output Current (mA)
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Output Current (mA)
Load Regulation vs Output Current for VOUT1
0
-5
-40ûC
-10
-15
-20
-25
-30
-35
-40
25ûC
125ûC
VIN = 14V
0
100 200 300 400 500 600 700 800
Output Current (mA)
5
Definition of Terms
Dropout Voltage
Long Term Stability
The input-output voltage differential at which the circuit
ceases to regulate against further reduction in input voltage.
Measured when the output voltage has dropped 100mV
from the nominal value obtained at 14V input, dropout volt-
age is dependent upon load current and junction temperature.
Output voltage stability under accelerated life-test condi-
tions after 1000 hours with maximum rated voltage and
junction temperature.
Output Noise Voltages
The rms AC voltage at the output, with constant load and no
input ripple, measured over a specified frequency range.
Input Voltage
The DC voltage applied to the input terminals with respect
to ground.
Quiescent Current
The part of the positive input current that does not con-
tribute to the positive load current. i.e., the regulator ground
lead current.
Input Output Differential
The voltage difference between the unregulated input volt-
age and the regulated output voltage for which the regulator
will operate.
Ripple Rejection
The ratio of the peak-to-peak input ripple voltage to the
peak-to-peak output ripple voltage.
Line Regulation
The change in output voltage for a change in the input volt-
age. The measurement is made under conditions of low dis-
sipation or by using pulse techniques such that the average
chip temperature is not significantly affected.
Temperature Stability of VOUT
The percentage change in output voltage for a thermal varia-
tion from room temperature to either temperature extreme.
Load Regulation
The change in output voltage for a change in load current at
constant chip temperature.
Typical Circuit Waveform
60V
26V
14V
31V
VIN
14V
3V
2.0V
0.8V
ENABLE
12V
12V
12V
12V
12V
2.4V
2.4V
0V
0V
VOUT
0V
0V
1
5V
5V
V
OUT2
System
Condition
Turn
On
Load
Dump
Line Noise, Etc.
VOUT
Short1
Circuit
V
Turn
Off
OUT
1
Low VIN
Thermal
Shutdown
VOUT
Short2
Circuit
Application Notes
To determine acceptable values for C2 and C3 for a par-
ticular application, start with a tantalum capacitor of the
recommended value and work towards a less expensive
alternative part for each output.
Stability Considerations
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
Step 1: Place the completed circuit with the tantalum
capacitors of the recommended value in an environmental
chamber at the lowest specified operating temperature
and monitor the outputs with an oscilloscope. A decade
box connected in series with capacitor C2will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instabil-
ity. The aluminum electrolytic capacitor is the cheapest
solution, but, if the circuit operates at low temperatures
(-25¡C to -40¡C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturers data
sheet usually provides this information.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load on
the output under observation. Look for any oscillations on
the output. If no oscillations are observed, the capacitor is
large enough to ensure a stable design under steady state
conditions.
The value for the output capacitors C2 and C3 shown in
the test and applications circuit should work for most appli-
cations, however it is not necessarily the best solution.
6
Application Notes
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the output at low temperature.
I
IN
I
I
OUT
OUT
1
V
Smart
IN
V
V
OUT
OUT
Regulator
1
2
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Control
Features
2
}
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capaci-
tor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operat-
ing conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
I
Q
Figure 1: Dual output regulator with key performance parameters
labeled.
The value of RQJA can then be compared with those in
the package section of the data sheet. Those packages
with RQJA's less than the calculated value in equation 2
will keep the die temperature below 150¡C.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Once the minimum capacitor value with the maximum
ESR is found for each output, a safety factor should be
added to allow for the tolerance of the capacitor and any
variations in regulator performance. Most good quality
aluminum electrolytic capacitors have a tolerance of +/-
20% so the minimum value found should be increased by
at least 50% to allow for this tolerance plus the variation
which will occur at low temperatures. The ESR of the
capacitors should be less than 50% of the maximum allow-
able ESR found in step 3 above.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of RQJA
:
Repeat steps 1 through 7 with C3, the capacitor on the
other output.
R
QJA = RQJC + RQCS + RQSA
(3)
where
Calculating Power Dissipation
in a Dual Output Linear Regulator
R
R
R
QJC = the junctionÐtoÐcase thermal resistance,
QCS = the caseÐtoÐheatsink thermal resistance, and
QSA = the heatsinkÐtoÐambient thermal resistance.
The maximum power dissipation for a dual output regula-
tor (Figure 1) is:
R
R
QJC appears in the package section of the data sheet. Like
QJA, it too is a function of package type. RQCS and RQSA
PD(max) = {VIN(max)ÐVOUT1(min)}IOUT1(max)
+
are functions of the package type, heatsink and the inter-
face between them. These values appear in heat sink data
sheets of heat sink manufacturers.
{VIN(max)ÐVOUT2(min)}IOUT2(max)+VIN(max)IQ
(1)
Where:
VIN(max) is the maximum input voltage,
VOUT1(min) is the minimum output voltage from VOUT1
VOUT2(min) is the minimum output voltage fromVOUT2
Test & Application Circuit
,
,
IOUT1(max) is the maximum output current for the appli-
cation,
C1*
0.1mF
VIN
VOUT1
IOUT2(max) is the maximum output current for the appli-
cation, and
+
C2**
22mF
CS8156
IQ is the quiescent current the regulator consumes at
ENABLE
IOUT(max)
.
Once the value of PD(max) is known, the maximum permis-
sible value of RQJA can be calculated:
VOUT2
Gnd
+
C3**
22mF
NOTES:
150¡C - TA
*
C1 required if regulator is located far
from power supply filter.
RQJA
=
(2)
PD
** C2, C3 required for stability.
7
Package Specification
PACKAGE DIMENSIONS IN mm(INCHES)
PACKAGE THERMAL DATA
5 Lead TO-220
Thermal Data
RQJC
RQJA
typ
typ
2.0
50
ûC/W
ûC/W
5 Lead TO-220 (T) Straight
1.40 (.055)
1.14 (.045)
5 Lead TO-220 (THA) Horizontal
4.83 (.190)
10.54 (.415)
4.06 (.160)
9.78 (.385)
4.83 (.190)
4.06 (.160)
3.96 (.156)
2.87 (.113)
2.62 (.103)
3.71 (.146)
10.54 (.415)
9.78 (.385)
1.40 (.055)
1.14 (.045)
6.55 (.258)
5.94 (.234)
3.96 (.156)
3.71 (.146)
2.87 (.113)
2.62 (.103)
14.99 (.590)
14.22 (.560)
14.99 (.590)
14.22 (.560)
6.55 (.258)
5.94 (.234)
14.22 (.560)
13.72 (.540)
2.77 (.109)
6.83 (.269)
1.68
1.02 (.040)
0.76 (.030)
2.92 (.115)
2.29 (.090)
0.56 (.022)
(.066)
TYP
0.81(.032)
0.36 (.014)
0.56 (.022)
0.36 (.014)
6.60 (.260)
5.84 (.230)
1.83(.072)
1.57(.062)
1.02(.040)
0.63(.025)
1.70 (.067)
6.81(.268)
6.93(.273)
6.68(.263)
2.92 (.115)
2.29 (.090)
5 Lead TO-220 (TVA) Vertical
4.83 (.190)
4.06 (.160)
3.96 (.156)
3.71 (.146)
10.54 (.415)
9.78 (.385)
1.40 (.055)
1.14 (.045)
6.55 (.258)
5.94 (.234)
2.87 (.113)
2.62 (.103)
14.99 (.590)
14.22 (.560)
1.78 (.070)
2.92 (.115)
2.29 (.090)
8.64 (.340)
7.87 (.310)
4.34 (.171)
7.51 (.296)
0.56 (.022)
0.36 (.014)
1.68
(.066) typ
1.70 (.067)
6.80 (.268)
.94 (.037)
.69 (.027)
Ordering Information
Description
Part Number
CS8156YT5
CS8156YTVA5
CS8156YTHA5
Ch erry Sem icon du ctor Corporation reserves th e
righ t to m ake ch an ges to th e specification s with ou t
n otice. Please con tact Ch erry Sem icon du ctor
Corporation for th e latest available in form ation .
5 Lead TO-220 Straight
5 Lead TO-220 Vertical
5 Lead TO-220 Horizontal
Rev. 2/19/98
© 1999 Cherry Semiconductor Corporation
8
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