CEB73A3G [CET]

N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
CEB73A3G
型号: CEB73A3G
厂家: CHINO-EXCEL TECHNOLOGY    CHINO-EXCEL TECHNOLOGY
描述:

N-Channel Enhancement Mode Field Effect Transistor
N沟道增强型网络场效晶体管

晶体 晶体管
文件: 总4页 (文件大小:395K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CEP73A3G/CEB73A3G  
PRELIMINARY  
N-Channel Enhancement Mode Field Effect Transistor  
FEATURES  
30V, 62A, RDS(ON) = 9m@VGS = 10V.  
RDS(ON) = 16m@VGS = 4.5V.  
Super high dense cell design for extremely low RDS(ON)  
.
High power and current handing capability.  
Lead free product is acquired.  
D
TO-220 & TO-263 package.  
G
CEB SERIES  
TO-263(DD-PAK)  
CEP SERIES  
TO-220  
S
ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted  
c
Parameter  
Symbol  
VDS  
VGS  
ID  
Limit  
Units  
V
Drain-Source Voltage  
30  
Gate-Source Voltage  
±20  
62  
V
Drain Current-Continuous  
A
Drain Current-Pulsed a  
IDM  
248  
A
Maximum Power Dissipation @ TC = 25 C  
- Derate above 25 C  
75  
W
PD  
0.52  
-55 to 175  
W/ C  
C
Operating and Store Temperature Range  
TJ,Tstg  
Thermal Characteristics  
Parameter  
Symbol  
RθJC  
Limit  
2
Units  
C/W  
C/W  
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient  
RθJA  
62.5  
Rev 1. 2009.June  
http://www.cetsemi.com  
Details are subject to change without notice .  
1
CEP73A3G/CEB73A3G  
Electrical Characteristics T = 25 C unless otherwise noted  
c
Parameter  
Off Characteristics  
Symbol  
Test Condition  
Min  
Typ  
Max  
Units  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage Current, Forward  
Gate Body Leakage Current, Reverse  
On Characteristics b  
BVDSS  
IDSS  
VGS = 0V, ID = 250µA  
VDS = 30V, VGS = 0V  
VGS = 20V, VDS = 0V  
VGS = -20V, VDS = 0V  
30  
V
1
µA  
nA  
nA  
IGSSF  
IGSSR  
100  
-100  
6
Gate Threshold Voltage  
Static Drain-Source  
VGS(th)  
RDS(on)  
gFS  
VGS = VDS, ID = 250µA  
VGS = 10V, ID = 40A  
VGS = 4.5V, ID = 20A  
VDS = 10V, ID = 30A  
1
3
9
V
m  
mΩ  
S
7.5  
11  
22  
On-Resistance  
16  
Forward Transconductance  
Dynamic Characteristics c  
Input Capacitance  
Ciss  
Coss  
Crss  
1005  
265  
pF  
pF  
pF  
VDS = 15V, VGS = 0V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics c  
Turn-On Delay Time  
170  
td(on)  
tr  
td(off)  
tf  
16  
9
32  
18  
ns  
ns  
VDD = 15V, ID = 10A,  
VGS = 10V, RGEN = 1Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
35.5  
9
71  
ns  
Turn-Off Fall Time  
18  
ns  
Total Gate Charge  
Qg  
22  
3
28.6  
nC  
nC  
nC  
VDS = 15V, ID = 10A,  
VGS = 10V  
Gate-Source Charge  
Qgs  
Qgd  
Gate-Drain Charge  
7
Drain-Source Diode Characteristics and Maximun Ratings  
Drain-Source Diode Forward Current  
Drain-Source Diode Forward Voltage b  
IS  
62  
A
V
VSD  
VGS = 0V, IS = 30A  
1.2  
Notes :  
a.Repetitive Rating : Pulse width limited by maximum junction temperature.  
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.  
c.Guaranteed by design, not subject to production testing.  
2
CEP73A3G/CEB73A3G  
50  
40  
30  
20  
75  
VGS=10,8,6,5V  
60  
45  
V
GS=4V  
30  
25 C  
V
GS=3V  
10  
0
15  
-55 C  
4
TJ=125 C  
1
0
0
1
2
3
4
0
2
3
5
VDS, Drain-to-Source Voltage (V)  
VGS, Gate-to-Source Voltage (V)  
Figure 1. Output Characteristics  
Figure 2. Transfer Characteristics  
2.2  
1.9  
1.6  
1.3  
1.0  
0.7  
0.4  
1200  
1000  
800  
600  
400  
200  
0
ID=30A  
VGS=10V  
C
iss  
C
oss  
C
rss  
0
5
10  
15  
20  
25  
-100  
-50  
0
50  
100  
150  
200  
VDS, Drain-to-Source Voltage (V)  
TJ, Junction Temperature( C)  
Figure 3. Capacitance  
Figure 4. On-Resistance Variation  
with Temperature  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
VDS=VGS  
ID=250µA  
V
GS=0V  
102  
101  
100  
-50 -25  
0
25 50 75 100 125 150  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
TJ, Junction Temperature( C)  
VSD, Body Diode Forward Voltage (V)  
Figure 5. Gate Threshold Variation  
with Temperature  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
3
CEP73A3G/CEB73A3G  
103  
10  
8
VDS=15V  
ID=10A  
RDS(ON)Limit  
4
102  
100µs  
6
1ms  
10ms  
DC  
4
101  
2
TC=25 C  
TJ=150 C  
Single Pulse  
100  
0
10-1  
100  
101  
102  
0
6
12  
18  
24  
Qg, Total Gate Charge (nC)  
VDS, Drain-Source Voltage (V)  
Figure 7. Gate Charge  
Figure 8. Maximum Safe  
Operating Area  
VDD  
on  
t
toff  
d(off)  
t
r
t
d(on)  
OUT  
RL  
t
f
t
VIN  
90%  
10%  
90%  
D
OUT  
V
V
VGS  
10%  
INVERTED  
RGEN  
G
90%  
50%  
50%  
S
IN  
V
10%  
PULSE WIDTH  
Figure 10. Switching Waveforms  
Figure 9. Switching Test Circuit  
100  
D=0.5  
0.2  
PDM  
0.1  
10-1  
0.05  
0.02  
t1  
t2  
0.01  
1. Rθ JC (t)=r (t) * Rθ JC  
2. Rθ JC=See Datasheet  
3. TJM-TC = P* Rθ JC (t)  
4. Duty Cycle, D=t1/t2  
Single Pulse  
10-2  
10-2  
10-1  
100  
101  
102  
103  
104  
Square Wave Pulse Duration (msec)  
Figure 11. Normalized Thermal Transient Impedance Curve  
4 - 97  

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