CMLDM8005BKTIN/LEAD [CENTRAL]
Transistor;
| 型号： | CMLDM8005BKTIN/LEAD |
| 厂家： | 
CENTRAL SEMICONDUCTOR CORP |
| 描述： | Transistor |
| 文件： | 总3页 (文件大小：1029K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CMLDM8005
SURFACE MOUNT SILICON
DUAL P-CHANNEL
ENHANCEMENT-MODE
MOSFET
www.centralsemi.com
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLDM8005
consists of dual P-Channel enhancement-mode silicon
MOSFETs designed for high speed pulsed amplifier
and driver applications. These MOSFETs offer very low
r
and low threshold voltage.
DS(ON)
MARKING CODE: CC8
FEATURES:
• ESD protection up to 1800V (Human Body Model)
• 350mW power dissipation
SOT-563 CASE
• Very low r
• Low threshold voltage
• Logic level compatible
DS(ON)
APPLICATIONS:
• Load switch/Level shifting
• Battery charging
• Small, SOT-563 surface mount package
• Complementary dual N-Channel device: CMLDM7005
• Boost switch
• Electro-luminescent backlighting
MAXIMUM RATINGS: (T =25°C)
Drain-Source Voltage
SYMBOL
UNITS
V
A
V
20
8.0
DS
Gate-Source Voltage
V
V
mA
mA
A
GS
Continuous Drain Current (Steady State - Note 1)
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current
Power Dissipation (Note 1)
I
650
D
I
250
S
I
1.0
DM
P
P
P
350
mW
mW
mW
°C
D
D
D
Power Dissipation (Note 2)
300
Power Dissipation (Note 2)
150
Operating and Storage Junction Temperature
Thermal Resistance (Note 1)
T , T
-65 to +150
357
J
stg
Θ
°C/W
JA
ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (T =25°C unless otherwise noted)
A
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
, I
V
V
V
V
V
V
V
V
=4.5V, V =0
10
μA
GSSF GSSR
GS
DS
GS
DS
I
=16V, V =0
GS
100
nA
V
DSS
BV
=0, I =250μA
20
DSS
GS(th)
SD
D
V
V
=V , I =250μA
0.5
1.0
1.1
V
DS GS
D
=0, I =250mA
V
GS
GS
GS
GS
S
r
r
r
=4.5V, I =350mA
0.25
0.37
0.36
0.5
Ω
Ω
Ω
DS(ON)
DS(ON)
DS(ON)
D
=2.5V, I =300mA
D
=1.8V, I =150mA
0.8
D
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm2
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm2
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm2
R4 (5-June 2013)
CMLDM8005
SURFACE MOUNT SILICON
DUAL P-CHANNEL
ENHANCEMENT-MODE
MOSFET
ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (T =25°C unless otherwise noted)
A
SYMBOL TEST CONDITIONS
MIN
TYP
UNITS
g
V
V
V
V
V
V
V
V
V
=10V, I =200mA
0.2
S
FS
DS
DS
DS
DS
DS
DS
DS
DD
DD
D
C
C
C
=16V, V =0, f=1.0MHz
25
100
21
pF
pF
pF
rss
iss
GS
=16V, V =0, f=1.0MHz
GS
=16V, V =0, f=1.0MHz
oss
GS
Q
Q
Q
=10V, V =4.5V, I =200mA
GS
g(tot)
gs
D
1.2
nC
nC
=10V, V =4.5V, I =200mA
GS
D
0.24
=10V, V =4.5V, I =200mA
gd
GS
D
0.36
38
nC
ns
t
t
=10V, V =4.5V, I =200mA, R =10Ω
on
off
GS
D
G
=10V, V =4.5V, I =200mA, R =10Ω
48
ns
GS
D
G
SOT-563 CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Source Q1
2) Gate Q1
3) Drain Q2
4) Source Q2
5) Gate Q2
6) Drain Q1
MARKING CODE: CC8
R4 (5-June 2013)
www.centralsemi.com
CMLDM8005
SURFACE MOUNT SILICON
DUAL P-CHANNEL
ENHANCEMENT-MODE
MOSFET
TYPICAL ELECTRICAL CHARACTERISTICS
R4 (5-June 2013)
www.centralsemi.com
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