ACPL-563XL [AVAGO]
Low power consumption;
| 型号： | ACPL-563XL |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | Low power consumption |
| 文件： | 总11页 (文件大小：147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACPL-267XL, ACPL-268KL, ACPL-560XL,
ACPL-563XL, 5962-08242*
Hermetically Sealed, 3.3V High Speed, High CMR,
Logic Gate Optocouplers
Data Sheet
*See Selection Guide for full matrix of part numbers.
Description
Features
These units are single and dual channel, hermetically Low power consumption
sealed optocouplers. The products are capable of opera-
tion and storage over the full military temperature range
and can be purchased as either standard commercial
product or with full MIL-PRF-38534 Class Level H or K
3.3V supply voltages
Dual marked with device part number and DLA draw-
ing number
testing or from DLA Drawing 5962-08242. All devices are Manufactured and tested on a MIL-PRF-38534
manufactured and tested on a MIL-PRF-38534 certified
line and are included in the DLA Qualified Manufacturers
List QML-38534 for Hybrid Microcircuits.
Certified Line
QML-38534, Class H and K
Three hermetically sealed package configurations
Truth Table (Positive Logic)
Multichannel Devices
Performance guaranteed over full military
temperature range: -55°C to +125°C
Input
On (H)
Off (L)
Output
High speed: 10 Mbd typical
L
CMR: > 10,000 V/μs typical
H
1500 Vdc withstand test voltage
TTL circuit compatibility
Single Channel DIP
HCPL-260L/060L/263L/063L function compatibility
Input
On (H)
Off (L)
On (H)
Off (L)
Enable
Output
H
H
L
L
Applications
H
H
H
Military and aerospace
High reliability systems
Transportation, medical, and life critical systems
Line receiver
L
Functional Diagram
Multiple channel devices available
Voltage level shifting
Isolated input line receiver
Isolated output line driver
Logic ground isolation
Harsh industrial environments
V
CC
V
E
V
OUT
Isolation for computer, communication, and test
equipment systems
GND
The connection of a 0.1 μF bypass capacitor between VCC and GND is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Each channel contains a GaAsP light emitting diode Because the same electrical die (emitters and detectors)
which is optically coupled to an integrated high speed are used for each channel of each device listed in this
photon detector. The output of the detector is an open data sheet, absolute maximum ratings, recommended
collector Schottky clamped transistor. Internal shields operating conditions, electrical specifications, and per-
provide a guaranteed common mode transient immu- formance characteristics shown in the figures are iden-
nity specification of 1000 V/μs. Package styles for these tical for all parts. Occasional exceptions exist due to
parts are 8 and 16 pin DIP through hole (case outlines
P and E respectively). Devices may be purchased with a
package variations and limitations, and are as noted.
Additionally, the same package assembly processes and
variety of lead bend and plating options. See Selection materials are used in all devices.
Guide Table for details. Standard Microcircuit Drawing
(SMD) parts are available for each package and lead
style.
Selection Guide – Package Styles and Lead Configuration Options
Package
16 Pin DIP
Through Hole
2
8 Pin DIP
Through Hole
1
8 Pin DIP
Through Hole
2
Lead Style
Channels
Common Channel Wiring
Withstand Test Voltage
Avago Part # & Options
Standard Commercial
MIL-PRF-38534, Class H
MIL-PRF-38534, Class K
Standard Lead Finish
Solder Dipped*
VCC, GND
1500 Vdc
None
VCC, GND
1500 Vdc
1500 Vdc
ACPL-2670L
ACPL-2672L
ACPL-268KL
Gold Plate
ACPL-5600L
ACPL-5601L
ACPL-560KL
Gold Plate
ACPL-5630L
ACPL-5631L
ACPL-563KL
Gold Plate
Option -200
Option -100
Option -300
Option -200
Option -100
Option -300
Option -200
Option -100
Option -300
Butt Cut/Gold Plate
Gull Wing/Soldered*
Class H SMD Part #
Prescript for all below
Gold Plate
5962-
5962-
5962-
0824203HEC
0824203HEA
0824203HUC
0824203HUA
0824203HTA
0824201HPC
0824201HPA
0824201HYC
0824201HYA
0824201HXA
0824202HPC
0824202HPA
0824202HYC
0824202HYA
0824202HXA
Solder Dipped*
Butt Cut/Gold Plate
Butt Cut/Soldered*
Gull Wing/Soldered*
Class K SMD Part #
Prescript for all below
Gold Plate
5962-
5962-
5962-
0824203KEC
0824203KEA
0824203KUC
0824203KUA
0824203KTA
0824201KPC
0824201KPA
0824201KYC
0824201KYA
0824201KXA
0824202KPC
0824202KPA
0824202KYC
0824202KYA
0824202KXA
Solder Dipped*
Butt Cut/Gold Plate
Butt Cut/Soldered*
Gull Wing/Soldered*
* Solder contains lead.
2
Functional Diagrams
16 Pin DIP
8 Pin DIP
8 Pin DIP
Through Hole
2 Channels
Through Hole
1 Channel
Through Hole
2 Channels
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
1
2
8
7
6
5
1
V
8
CC
CC
V
CC
V
V
O1
O2
V
V
E
O1
2
3
4
7
6
5
V
OUT
3
4
V
O2
GND
GND
GND
Note: Dual channel devices have common VCC and ground. Single channel DIP has an
enable pin 7. All diagrams are “top view.”
Outline Drawings
16 Pin DIP Through Hole, 2 Channels
20.06 (0.790)
20.83 (0.820)
8.13 (0.320)
MAX.
0.89 (0.035)
1.65 (0.065)
4.45 (0.175)
MAX.
0.51 (0.020)
MIN.
3.81 (0.150)
MIN.
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
8 Pin DIP Through Hole, 1 and 2 Channels
Device Marking
9.40 (0.370)
8.13 (0.320)
MAX.
Avago LOGO
Avago P/N
DLA SMD [1]
DLA SMD [1]
PIN ONE/
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
* 50434
COMPLIANCE INDICATOR, [1]
9.91 (0.390)
DATE CODE, SUFFIX (IF NEEDED)
0.76 (0.030)
1.27 (0.050)
7.16 (0.282)
7.57 (0.298)
COUNTRY OF MFR.
Avago CAGE CODE [1]
4.32 (0.170)
MAX.
ESD IDENT
Note 1. Qualified parts only
3.81 (0.150)
MIN.
0.51 (0.020)
MIN.
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
0.51 (0.020)
MAX.
2.29 (0.090)
2.79 (0.110)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
3
Hermetic Optocoupler Options
Option
Description
100
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available
on standard commercial, class H & class K product in 8 and 16 pin DIP (see drawings below for details).
4.32 (0.170)
MAX.
0.51 (0.020)
1.14 (0.045)
MIN.
1.40 (0.055)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
4.32 (0.170)
MAX.
0.51 (0.020)
MIN.
1.14 (0.045)
1.40 (0.055)
0.20 (0.008)
0.33 (0.013)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
7.36 (0.290)
7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
200
300
Lead finish is solder dipped rather than gold plated. This option is available on standard commercial, class H
and class K products in 8 and 16 pin DIP. DLA Drawing part numbers contain provisions for lead finish.
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This option is avail-
able on standard commercial, class H & class K product in 8 and 16 pin DIP (see drawings below for details).
This option has solder dipped leads.
4.57 (0.180)
MAX.
0.51 (0.020)
1.40 (0.055)
1.65 (0.065)
MIN.
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
4.57 (0.180)
MAX.
4.57 (0.180)
MAX.
0.20 (0.008)
0.33 (0.013)
0.51 (0.020)
MIN.
5° MAX.
1.40 (0.055)
1.07 (0.042)
1.32 (0.052)
1.65 (0.065)
9.65 (0.380)
9.91 (0.390)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
Solder contains lead.
4
Absolute Maximum Ratings
No derating required up to +125°C.
Parameter
Symbol
Min.
-65
-55
Max.
Units
°C
Storage Temperature
Operating Temperature
Case Temperature
TS
TA
TC
TJ
+150
+125
°C
+170
°C
Junction Temperature
Lead Solder Temperature
+175
°C
260 for 10 sec
40
°C
Peak Forward Input Current
(each channel, ≤1 ms duration)
IF(PEAK)
IF(AVG)
mA
Average Input Forward Current (each channel)
Input Power Dissipation (each channel)
Reverse Input Voltage (each channel
Supply Voltage (1 minute maximum)
Output Current (each channel)
20
35
5
mA
mW
V
VR
VCC
IO
7.0
25
7
V
mA
V
Output Voltage (each channel)
VO
PO
PD
Output Power Dissipation (each channel)
Package Power Dissipation (each channel)
40
200
mW
mW
Single Channel Product Only
Enable Input Voltage
VE
3.6
V
8 Pin Ceramic DIP Single Channel Schematic
Note enable pin 7. An external 0.01 μF to 0.1 μF bypass capacitor must
be connected between VCC and ground for each package type.
ESD Classification
MIL-PRF-38534 and MIL-STD-883, Method 3015
ACPL-560L/01L/0KL, 5962-0824201
ACPL-5630L/31L/3KL, 5962-0824202
ACPL-2670L/72L/268KL, 5962-0824203
(B), Class 1B
(A), Class 3A
(), Class 2
Recommended Operating Conditions
Parameter
Symbol
IFL
Min.
0
Max.
250
20
Units
μA
Input Current, Low Level, Each Channel
Input Current, High Level, Each Channel
Supply Voltage, Output
IFH
10
3.0
mA
V
VCC
N
3.6
6
Fan Out (TTL Load) Each Channel
5
Recommended Operating Conditions (cont’d.)
Single Channel Product Only[10]
Parameter
Symbol
VEH
Min.
2.0
0
Max.
VCC
Units
High Level Enable Voltage
Low Level Enable Voltage
V
V
VEL
0.8
Electrical Characteristics (TA = -55°C to +125°C, unless otherwise specified)
Group
A[13]
Limits
Sub-
groups
Parameter
Symbol Test Conditions
Min.
Typ.*
Max.
Units
Fig.
Note
High Level
Output Current
IOH
VCC = 3.3 V, VO = 3.3 V,
IF = 250 μA
1, 2, 3
6
250
μA
1
1
Low Level
Output Voltage
VOL
VCC = 3.3 V, IF = 10 mA,
IOL (Sinking) = 10 mA
1, 2, 3
1, 2, 3
1, 2, 3
0.3
0.6
V
2
1, 8
1
Current Transfer
Ratio
hF CTR
ICCH
VO = 0.6 V, IF = 10 mA,
VCC = 3.3 V
100
%
Logic
High
Supply
Current
Single
Channel
VCC = 3.3 V, IF = 0 mA
5
10
6
11
22
15
30
mA
mA
mA
mA
V
1
Dual
Channel
VCC = 3.3 V,
IF1 = IF2 = 0 mA
Logic
low
Supply
Current
Single
Channel
ICCL
VCC = 3.3 V,
IF = 20 mA
1, 2, 3
1
1
Dual
Channel
VCC = 3.3 V,
IF1 = IF2 = 20 mA
12
1.55
Input Forward
Voltage
VF
IF = 20 mA
1, 2
3
1.75
1.85
3
Input Reverse
Breakdown Voltage
BVR
II-O
IR = 10 μA
1, 2, 3
5
V
1
Input-Output
Leakage Current
RH ≤ 65%, TA = 25°C
t = 5 s, VI-O = 1500 Vdc
1
4
1.0
4.0
μA
pF
2, 7
Capacitance Between CI-O
Input/ Output
f = 1 MHz, TC = 25°C
1.0
1, 3,
13
*All typical values are at VCC = 3.3 V, TA = 25°C.
6
Electrical Characteristics (cont’d) TA = -55°C to +125°C unless otherwise specified
Group A[13]
Limits
Typ.*
43
Parameter
Symbol Test Conditions
Subgroups Min.
Max.
100
140
Units
Fig.
Note
Propagation Delay
Time to High Output
Level
tPLH
V
CC = 3.3 V, RL = 510 Ω,
9
ns
4, 5, 6
1, 5
CL = 50 pF, IF = 13 mA
10, 11
Propagation Delay
Time to Low Output
Level
tPHL
9
54
100
120
ns
10, 11
Output Rise Time
Output Fall Time
tLH
RL = 510 Ω, CL = 50 pF,
IF = 13 mA
9, 10, 11
20
8
90
40
ns
1
tHL
Common Mode
Transient
Immunity at
High Output
Level
|CMH|
VCM = 50 V (PEAK),
VCC = 3.3 V,
VO (min.) = 2 V,
RL = 510 Ω, IF = 0 mA
9, 10, 11
9, 10, 11
1000
1000
>10000
V/μs
7
7
1, 6,
13
Common Mode
Transient
Immunity at Low
Output Level
|CML|
VCM = 50 V (PEAK),
VCC = 3.3 V,
VO (max.) = 0.8 V,
RL = 510 Ω, IF = 10 mA
>10000
-0.54
V/μs
1, 6,
13
Single Channel Product Only
Low Level
Enable Current
IEL
VCC = 3.3 V,
VE = 0.5 V
1, 2, 3
1, 2, 3
1, 2, 3
-2.0
2.0
mA
V
High Level
Enable Voltage
VEH
VEL
9
Low Level
0.8
V
Enable Voltage
*All typical values are at VCC = 3.3 V, TA = 25°C.
Typical Characteristics, T = 25°C, V = 3.3 V
A
CC
Parameter
Sym.
CIN
Typ.
60
Units
Test Conditions
Fig.
Note
Input Capacitance
pF
VF = 0 V, f = 1 MHz
IF = 20 mA
1
1
Input Diode Temperature
Coefficient
ΔVF
-1.5
mV/°C
ΔT
A
Resistance (Input-Output)
RI-O
1012
Ω
VI-O = 500 V
2
Single Channel Product Only
Propagation Delay Time of
Enable from VEH to VEL
tELH
tEHL
32
28
ns
ns
RL = 510 Ω, CL = 50 pF
IF = 13 mA, VEH = 3 V,
8, 9
1, 10
1, 11
V
EL = 0V
Propagation Delay Time of
Enable from VEL to VEH
Dual Channel Product Only
Input-Input
Leakage Current
II-I
0.5
nA
Relative Humidity ≤ 65%
4
V = 500 V, t = 5 s
I-I
Resistance (Input-Input)
Capacitance (Input-Input)
RI-I
CI-I
1012
0.55
Ω
VI-I = 500 V
f = 1 MHz
4
4
pF
7
Notes:
1. Each channel.
2. All devices are considered two-terminal devices; II-O is measured between all input leads or terminals shorted together and all output
leads or terminals shorted together.
3. Measured between each input pair shorted together and all output connections for that channel shorted together.
4. Measured between adjacent input pairs shorted together for each multichannel device.
5. tPHL propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leading edge of
the output pulse. The tPLH propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.5 V point
on the trailing edge of the output pulse.
6. CML is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state
(VO <0.8 V). CMH is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
high state (VO > 2.0 V).
7. This is a momentary withstand test, not an operating condition.
8. It is essential that a bypass capacitor (0.01 to 0.1 μF, ceramic) be connected from VCC to ground. Total lead length between both ends of
this external capacitor and the isolator connections should not exceed 20 mm.
9. No external pull up is required for a high logic state on the enable input.
10. The tELH enable propagation delay is measured from the 1.5 V point on the trailing edge of the enable input pulse to the 1.5 V point on
the trailing edge of the output pulse.
11. The tEHL enable propagation delay is measured from the 1.5 V point on the leading edge of the enable input pulse to the 1.5 V point on
the leading edge of the output pulse.
12. Standard commercial parts receive 100% testing at 25°C (Subgroups 1 and 9). Class H and K parts receive 100% testing at 25, 125, and
-55°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
13. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits
specified for all lots not specifically tested.
100
80
60
40
20
0
5
4
3
2
1
0
VCC = 3.3 V
TA = 25 °C
VCC = 3.3 V
VO = 3.3 V
IF = 250 μA
RL
510 Ω
1 kΩ
4 kΩ
-60 -40 -20
0
20 40 60 80 100 120 140
1
2
3
4
5
6
7
TA - TEMPERATURE - °C
IF - INPUT DIODE FORWARD CURRENT - mA
Figure 1. High Level Output Current vs. Tempera- Figure 2. Input-Output Characteristics.
ture.
Figure 3. Input Diode Forward Characteristics.
8
D.U.T.
3.3 V
120
100
80
60
40
20
0
V
CC
PULSE
GENERATOR
VCC = 3.3 V
RL = 510 Ω
R
L
TA = 25°C
I
F
V
O
Z
t
= 50Ω
= 5 ns
O
H
0.01 μF
BYPASS
V
O
C *
L
INPUT
MONITORING
NODE
GND
tPLH
Rm
* C INCLUDES PROBE AND STRAY WIRING CAPACITANCE.
L
tPHL
10 11 12 13 14 15 16 17 18 19 20
IF - PULSE INPUT CURRENT - mA
Figure 5. Propagation Delay, tPHL and tPLH vs. Pulse Input
Current, IFH.
Figure 4. Test Circuit for tPHL and tPLH.*
D.U.T.
+3.3 V
B
V
CC
510
Ω
I
I
A
OUTPUT V
120
O
MONITORING
NODE
VCC = 3.3 V
IF = 13 mA
RL = 510 Ω
0.01 μF
BYPASS
100
GND
-
V
80
FF
V
CM
tPLH
+
60
PULSE GEN.
40
tPHL
20
0
-60 -40 -20
0
20 40 60 80 100 120 140
TA - TEMPERATURE - °C
Figure 6. Propagation Delay vs. Temperature.
Figure 7. Test Circuit for Common Mode Transient Immunity and Typical
Waveforms.
9
80
PULSE
GENERATOR
OUTPUT V
MONITORING
NODE
V
CC = 3.3 V
E
Z
= 50
= 5 ns
Ω
70 VEH = 3.0 V
VEL = 0 V
O
r
t
+3.3 V
60
50
40
30
20
10
0
IF = 13 mA
D.U.T.
V
CC
R
L
V
E
I
= 13 mA
tELH
F
V
OUT
OUTPUT V
MONITORING
NODE
O
0.01 μF
BYPASS
C *
tEHL
L
GND
* C INCLUDES PROBE AND
L
STRAY WIRING CAPACITANCE.
-60 -40 -20
0
20 40 60 80 100 120 140
TA - TEMPERATURE - °C
Figure 9. Enable Propagation Delay vs. Temperature.
Figure 8. Test Circuit for tEHL and tELH.
V
CC
+5.5 V
V
D.U.T.*
OC
+5.5 V
V
CC
(EACH INPUT)
0.01 μF
+
-
V
200
Ω
200
Ω
IN
5.3 V
(EACH OUTPUT)
(EACH OUTPUT)
GND
CONDITIONS: I = 20 mA
F
I
= 25 mA
O
T
= +125 o
C
A
* ALL CHANNELS TESTED SIMULTANEOUSLY.
Figure 10. Operating Circuit for Burn-In and Steady State Life Tests.
10
MIL-PRF-38534 Class H, Class K, and
DLA SMD Test Program
Avago’s Hi-Rel Optocouplers are in compliance with MIL-
PRF-38534 Classes H and K. Class H and Class K devices
are also in compliance with DLA drawing 5962-08242.
Testing consists of 100% screening and quality confor-
mance inspection to MIL-PRF-38534.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies Limited. All rights reserved.
AV02-1327EN - October 2, 2012
相关型号：
ACPL-772L-320E
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25Mbps, ROHS COMPLIANT, SURFACE MOUNT, DIP-8
AVAGO
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