AT83C5127XXX-RATUM [ATMEL]
Microcontroller, 8-Bit, MROM, 8051 CPU, 48MHz, CMOS, PQFP32,;
| 型号： | AT83C5127XXX-RATUM |
| 厂家： | 
ATMEL |
| 描述： | Microcontroller, 8-Bit, MROM, 8051 CPU, 48MHz, CMOS, PQFP32, 微控制器 外围集成电路 |
| 文件： | 总9页 (文件大小：236K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Clock Controller
– 80C51 core with 6 clocks per instruction
– 8 MHz On-Chip Oscillator
– PLL for generating 96 MHz clock to supply CPU core, USB and Smart Card Interfaces
– Programmable CPU clock from 500 kHz / X1 to 48 MHz / X1
• Reset Controller
– Power On Reset (POR) feature avoiding an external reset capacitor
– Power Fail Detector (PFD)
– Watch-Dog Timer
• Power Management
C51
– Two power saving modes: Idle and Power Down
– Four Power Down Wake-up Sources: Smart Card Detection, Keyboard Interrupt, USB
Resume, External Interrupt
Microcontroller
with USB and
Smart Card
Reader
– Input Voltage Range: 4.5V - 5.5V
– Core’s Power Consumption (Without Smart Card and USB):
•30 mA Maximum Operating Current @ 48 MHz / X1
•200 µA Maximum Power-down Current @ 5.5V
• Interrupt Controller
– up to 7 interrupt sources
– up to 4 Level Priority
• Memory Controller
Interfaces
– Internal Program memory: up to 16 Kbytes of ROM
– Internal Data Memory : 768 bytes including 256 bytes of data and 512 bytes of XRAM
• Two 16-bit Timer/Counters
• USB 2.0 Full Speed Interface
AT83C5127
Summary
– 48 MHz DPLL
– On-Chip 3.3V USB voltage regulator and transceivers
– Software detach feature
– 7 endpoints programmable with In or out directions and ISO, Bulk or Interrupt Transfers :
•Endpoint 0: 32 Bytes Bidirectionnal FIFO for Control transfers
•Endpoints 1,2,3: 8 bytes FIFO
•Endpoints 4,5: 64 Bytes FIFO
•Endpoint 6: 2*64 bytes FIFO with Pin-Pong feature
• ISO 7816 UART Interface Fully Compliant with EMV2000, GIE-CB and WHQL Standards
– Programmable ISO clock from 1 MHz to 4.8 MHz
– Card insertion/removal detection with automatic deactivation sequence
– Programmable Baud Rate Generator from 372 to 11.625 clock pulses
– Synchronous/Asynchronous Protocols T=0 and T=1 with Direct or Inverse Convention
– Automatic character repetition on parity errors
– 32 Bit Waiting Time Counter
– 16 Bit Guard Time Counter
– Internal Step Up/Down Converter with Programmable Voltage Output:
•1.8V-30mA, 3V-50mA and 5V-60mA
– Current overload protection
– 6 kV ESD (MIL/STD 833 Class 3) protection on whole Smart Card Interface
• Alternate Smart Card Interface with CLK, IO and RST
• UART Interface with Integrated Baud Rate Generator (BRG)
• Four 12 I/O bit Ports
– Up to four LED outputs with 3 level programmable current source: 2, 4 and 10 mA
– Two General Purpose I/O programmable as external interrupts
• Packages
For detailed functional description,
please refer to the AT8xC5122/23
datasheet.
– VQFP32, QFN32, Die
7519A–SCR–04/05
1
Product description
Block Diagram
AT83C5127 product is high-performance CMOS derivatives of the 80C51 8-bit micro-
controllers designed for USB smart card reader applications.
The AT83C5127 is a low pin count of the AT8xC5122 and is proposed in ROM version.
The ROM device is only factory programmable.
3.3 V
Regulator
XTAL1
XTAL2
8 MHz
Oscillator
256 x 8
RAM
512 x 8
XRAM
UART
Interface
16-BIT
TIMERS
Interrupt
Controller
Alternate
Card
DC/DC
Converter
CPRES
CRST
CCLK
CIO
PLLF
RST
PLL
INTERNALADDRESSANDDATABUS
ParallelI/OPorts
CC4
CC8
WATCH-DOG
POR
PFD
RESET
16K x 8
ROM
USB
Interface
3.3V
Regulator
3-BIT
PORT
8-BIT
PORT
1-BIT
PORT
LED's
2
AT83C5127
7519A–SCR–04/05
AT83C5127
Package Description
Figure 1. VQFP32 Package Pinout
32 31 30 29 28 27 26 25
DVCC
P1.2/CPRES
CC8
P3.1/TxD
P1.6
1
2
3
4
5
6
7
8
24
23
22
21
P3.0/RxD
P3.5/T1/CRST1
CRST
VQFP32
CC4
20 P3.2/INT0/LED0/CIO1
P3.3/INT1
19
P3.4/T0/LED1
18
CCLK
P5.0
VSS
P3.6/LED2
17
9 10 11 12 13 14 15 16
Figure 2. MLF32 Package Pinout
32 31 30 29 28 27 26 25
DVCC
P1.2/CPRES
CC8
P3.1/TxD
P1.6
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
P3.0/RxD
P3.5/T1/CRST1
CRST
MLF32
P3.2/INT0/LED0/CIO1
P3.3/INT1
CC4
CCLK
P3.4/T0/LED1
P3.6/LED2
P5.0
VSS
9 10 11 12 13 14 15 16
3
7519A–SCR–04/05
Pin Description
Table 1. Pin Description
Internal
Power
Reset
Level
Reset
Config
Port
Supply ESD
I/O
Alt
Conf 1
Conf 2
Conf 3
Led
CVCC inactive at reset.
CIO
CC4
P1.2
CC4
CCLK
32
32
3
CVCC 6KV
CVCC 6KV
I/O
0
0
1
0
0
CIO
Port51
Port51
ESD tested with a 10µF on CVCC
CVCC inactive at reset
3
2
5
6
I/O
I/O
I/O
O
CC8
CPRES
CC4
ESD tested with a 10µF on CVCC
Weak & medium pull-up can be
disconnected
2
VCC
2KV
Port51
CVCC inactive at reset
5
CVCC 6KV
CVCC 6KV
CVCC 6KV
Port51
ESD tested with a 10µF on CVCC
CVCC inactive at reset
6
CCLK
CRST
Push-pull
ESD tested with a 10µF on CVCC
CVCC inactive at reset
CRST
P1.6
4
4
O
0
1
1
Push-pull
Port51
ESD tested with a 10µF on CVCC
23
31
23
31
VCC
VCC
2KV
2KV
I/O
I/O
P1.7
CCLK1
Port51
P3.0
P3.1
P3.2
P3.3
22
24
20
19
22
24
20
19
VCC
VCC
VCC
VCC
2KV
2KV
2KV
2KV
I/O
I/O
I/O
I/O
1
1
1
1
RxD
TxD
Port51
Port51
Port51
Port51
Push-pull
Push-pull
INT0
INT1
LED0
LED1
Push-pull
Push-pull
P3.4
P3.5
P3.6
18
21
17
18
21
17
VCC
VCC
VCC
2KV
2KV
2KV
I/O
I/O
I/O
1
1
1
T0
T1
Port51
Port51
Port51
LED2
LED3
P3.7
P5.0
13
7
13
7
VCC
VCC
2KV
2KV
I/O
I/O
1
1
Port51
Port51
Push-pull
Reset Input
The Port pins are driven to their reset conditions when a voltage lower
than VIL is applied, whether or not the oscillator is running.
This pin has an internal 10K pull-up resistor which allows the device to
be reset by connecting a capacitor between this pin and VSS.
RST
16
16
VCC
I/0
Asserting RST when the chip is in Idle mode or Power-Down mode
returns the chip to normal operation.
The output is active for at least 12 oscillator periods when an internal
reset occurs.
4
AT83C5127
7519A–SCR–04/05
AT83C5127
Table 1. Pin Description (Continued)
Internal
Power
Reset
Level
Reset
Config
Port
Supply ESD
I/O
Alt
Conf 1
Conf 2
Conf 3
Led
USB Positive Data Upstream Port
D+
29
28
30
29
28
30
DVCC
I/O
This pin requires an external serial resistor of 33Ω and a 1.5 K
up to VREF for full speed configuration.
Ω pull-
USB Negative Data Upstream Port
D-
DVCC
AVCC
I/O
O
This pin requires an external serial resistor of 33Ω
USB Voltage Reference: 3.0 < VREF < 3.6 V
VREF
VREF can be connected to D+ through a 1.5 K
voltage is controlled by software.
Ω resistor. The VREF
Input to the on-chip inverting oscillator amplifier
To use the internal oscillator, a crystal or an external oscillator must be
connected to this pin.
XTAL1
14
14
VCC
I
Output of the on-chip inverting oscillator amplifier
XTAL2
PLLF
15
26
27
15
26
27
VCC
O
O
To use the internal oscillator, a crystal circuit must be connected to
this pin. If an external oscillator is used, leave XTAL2 unconnected.
PLL Low Pass Filter input
Receives the RC network of the PLL low pass filter.
AVCC
Analog Supply Voltage
AVCC
PWR
AVCC is used to supply the internal 3.3V analog regulator which
supplies the internal USB driver
Supply Voltage
VCC
12
10
12
10
PWR
PWR
VCC is used to supply the internal 3.3V digital regulator which
supplies the PLL, CPU core and internal I/O’s
DC/DC Input
LI supplies the current for the charge pump of the DC/DC converter.
- LI tied directly to VCC : the DC/DC converter must be configured in
regulator mode.
LI
- LI tied to VCC through an external 10µH coil : the DC/DC converter
can be configured either in regulator or in pump mode.
Card Supply Voltage
CVCC is the ouput of internal DC/DC converter which supplies the
Smart Card Interface. It must be connected to an external decoupling
capacitor of 10 µF with the lowest ESR as this parameter influences
on the CVCC noise
CVCC
DVCC
9
1
9
1
PWR
PWR
Digital Supply Voltage
DVCC is the output of the internal analog 3.3V regulator which
supplies the USB driver. This pin must be connected to an external
680nF decoupling capacitor if the USB interface is used.
DC/DC Ground
CVSS
VSS
11
8
11
8
GND
GND
GND
CVSS is used to sink high shunt currents from the external coil
Digital Ground
VSS is used to supply the PLL, buffer ring and the digital core
Analog Ground
AVSS is used to supply the USB driver.
AVSS
25
25
5
7519A–SCR–04/05
AT83C5127
Ordering
Information
Supply
Max Frequency
(MHz)
Lead free/ RoHS
Part Number
Memory Size
(bytes)
Temperature
Range
Part Number
Voltage (V)
Package
LQFP32
LQFP32
QFN32
Packing
Tray
AT83C5127xxx-RATIM
AT83C5127xxx-RARIM
AT83C5127xxx-PUTIM
AT83C5127xxx-PURIM
16K ROM
16K ROM
16K ROM
16K ROM
4.5 - 5.5
4.5 - 5.5
4.5 - 5.5
4.5 - 5.5
Industrial
Industrial
Industrial
Industrial
48 MHz / X1
48 MHz / X1
48 MHz / X1
48 MHz / X1
AT83C5127xxx-RATUM
AT83C5127xxx-RARUM
AT83C5127xxx-PUTUM
AT83C5127xxx-PURUM
Tape & Reel
Tray
QFN32
Tape & Reel
7519A–SCR–04/05
Packaging
Information
LQFP32 Package
8
AT83C5127
7519A–SCR–04/05
AT83C5127
QFN32 Package
9
7519A–SCR–04/05
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7519A–SCR–04/05
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