AON7450 [AOS]
100V N-Channel MOSFET; 100V N沟道MOSFET![AON7450](http://pdffile.icpdf.com/pdf2/p00209/img/icpdf/AON745_1183678_icpdf.jpg)
型号: | AON7450 |
厂家: | ![]() |
描述: | 100V N-Channel MOSFET |
文件: | 总7页 (文件大小:274K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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AON7450
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AON7450 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
100V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS = 8V)
21A
< 48mΩ
< 57mΩ
100% UIS Tested
100% Rg Tested
D
DFN 3x3 EP
Top View
Top View
Bottom
1
8
2
3
7
6
4
G
5
S
Pin 1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
Units
Drain-Source Voltage
Gate-Source Voltage
100
±25
21
V
V
VGS
TC=25°C
Continuous Drain
Current
ID
TC=100°C
13
A
Pulsed Drain Current C
IDM
60
TA=25°C
TA=70°C
5.6
Continuous Drain
Current
IDSM
A
4.5
Avalanche Current C
IAS, IAR
18
A
Avalanche energy L=0.1mH C
EAS, EAR
16
mJ
TC=25°C
Power Dissipation B
TC=100°C
43
PD
W
17
3.1
TA=25°C
PDSM
W
°C
Power Dissipation A
2
TA=70°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 150
Thermal Characteristics
Parameter
Symbol
Typ
Max
40
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
t
≤ 10s
30
60
RθJA
Steady-State
Steady-State
75
RθJC
2.4
2.9
Rev 2: Mar. 2011
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Page 1 of 7
AON7450
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
100
V
VDS=100V, VGS=0V
10
50
IDSS
Zero Gate Voltage Drain Current
µA
TJ=55°C
V
DS=0V, VGS= ±25V
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
4.1
nA
V
VGS(th)
ID(ON)
VDS=VGS ID=250µA
VGS=10V, VDS=5V
VGS=10V, ID=7.8A
2.9
60
3.5
A
40
73
45
20
0.7
48
87
57
mΩ
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
VGS=8V, ID=7.8A
mΩ
S
VDS=5V, ID=7.8A
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current G
1
V
40
A
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
725
65
910
95
1090
125
50
pF
pF
pF
Ω
VGS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
20
35
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=7.8A
VGS=10V, VDS=50V, RL=6.4Ω,
0.4
0.8
1.2
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
12
4.2
2.8
16
5.3
4.7
18
6.5
35
7
20
6.4
6.6
nC
nC
nC
ns
ns
ns
ns
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
RGEN=3Ω
tD(off)
tf
trr
IF=7.8A, dI/dt=500A/µs
IF=7.8A, dI/dt=500A/µs
12
42
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
17
60
22
78
ns
Qrr
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design, and the maximum temperature of 150°C may be u sed if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 2: Mar. 2011
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Page 2 of 7
AON7450
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
50
40
30
20
10
0
36
32
28
24
20
16
12
8
VDS=5V
8.5V
7.5V
7V
8V
10V
6.5
6V
VGS=5.5V
125°C
25°C
4
0
0
2
4
6
8
10
0
1
2
3
4
5
6
7
8
9
10
VGS(Volts)
V
DS (Volts)
Figure 2: Transfer Characteristics (Note E)
Fig 1: On-Region Characteristics (Note E)
70
2.2
2
60
50
40
30
20
VGS=10V
ID=7.8A
VGS=8V
1.8
1.6
1.4
1.2
1
VGS=8V
ID=7.8A
VGS=10V
0.8
0
25
50
75
100
125
150
175
0
5
10
15
20
25
30
ID (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
90
80
70
60
50
40
30
20
1.0E+02
ID=7.8A
1.0E+01
1.0E+00
125°C
125°C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
25°C
25°C
0.0
0.2
0.4
0.6
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
0.8
1.0
1.2
4
8
12
16
20
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 2: Mar. 2011
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Page 3 of 7
AON7450
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
1400
10
VDS=50V
1200
ID=7.8A
8
Ciss
1000
6
800
600
4
400
Coss
2
Crss
200
0
0
0
3
6
9
12
15
18
0
20
40
60
80
100
Q
g (nC)
VDS (Volts)
Figure 8: Capacitance Characteristics
Figure 7: Gate-Charge Characteristics
200
160
120
80
1000.0
100.0
10.0
1.0
TJ(Max)=150°C
TC=25°C
10µs
RDS(ON)
limited
100µs
DC
1ms
TJ(Max)=150°C
TC=25°C
0.1
40
0.0
0
0.01
0.1
1
10
100
1000
0.0001
0.001
0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=2.9°C/W
0.1
PD
Ton
T
Single Pulse
0.0001
0.01
0.00001
0.001
0.01
Pulse Width (s)
0.1
1
10
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 2: Mar. 2011
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Page 4 of 7
AON7450
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
50
TA=25°C
TA=100°C
40
30
10
TA=150°C
20
TA=125°C
10
1
0
1
10
100
0
25
50
75
100
125
150
Time in avalanche, tA (µs)
TCASE (°C)
Figure 12: Single Pulse Avalanche capability (Note
C)
Figure 13: Power De-rating (Note F)
10000
1000
100
10
30
25
20
15
10
5
TA=25°C
1
0.00001
0.001
0.1
10
1000
0
0
25
50
75
100
125
150
Pulse Width (s)
T
CASE (°C)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
Figure 14: Current De-rating (Note F)
10
1
D=Ton/T
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J,PK=TA+PDM.ZθJA.RθJA
θJA=75°C/W
R
0.1
PD
0.01
Ton
Single Pulse
T
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 2: Mar. 2011
www.aosmd.com
Page 5 of 7
AON7450
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
140
120
100
80
30.00
25.00
20.00
15.00
10.00
5.00
24
20
16
12
8
1.6
1.2
0.8
0.4
di/dt=800A/µs
125ºC
125ºC
di/dt=800A/µs
trr
25ºC
125ºC
25ºC
25ºC
Qrr
60
Irm
40
S
25ºC
20
4
20
125ºC
0
0.00
0
0
0
5
10
15
25
30
0
5
10
15
IS (A)
20
25
30
I
S (A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
120
100
80
60
40
20
0
25.00
30
25
20
15
10
5
2.5
2
Is=20A
Is=20A
125ºC
125ºC
20.00
15.00
10.00
5.00
125ºC
trr
1.5
1
25ºC
25ºC
Qrr
25ºC
0.5
25ºC
S
Irm
125º
0.00
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di/dt (A/µs)
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev 2: Mar. 2011
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Page 6 of 7
AON7450
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 2: Mar. 2011
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Page 7 of 7
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