AON7452 [AOS]
100V N-Channel MOSFET; 100V N沟道MOSFET![AON7452](http://pdffile.icpdf.com/pdf2/p00209/img/icpdf/AON745_1183679_icpdf.jpg)
型号: | AON7452 |
厂家: | ![]() |
描述: | 100V N-Channel MOSFET |
文件: | 总7页 (文件大小:248K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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AON7452
100V N-Channel MOSFET
SDMOS TM
General Description
Product Summary
The AON7452 is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge and low Qrr.The result is outstanding efficiency
with controlled switching behavior. This universal
technology is well suited for PWM, load switching and
general purpose applications.
VDS
100V
ID (at VGS=10V)
RDS(ON) (at VGS=10V)
RDS(ON) (at VGS=7V)
5.5A
< 310mΩ
< 370mΩ
100% UIS Tested
100% Rg Tested
DFN 3x3 EP
D
Top View
Bottom View
Top View
1
8
2
3
7
6
G
4
5
S
Pin 1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Maximum
100
Units
Drain-Source Voltage
Gate-Source Voltage
V
V
VGS
±25
TC=25°C
5.5
Continuous Drain
Current
ID
TC=100°C
3.5
A
Pulsed Drain Current C
IDM
12
TA=25°C
TA=70°C
2.5
Continuous Drain
Current
IDSM
A
2
Avalanche Current C
IAS, IAR
2.5
A
Avalanche energy L=0.1mH C
EAS, EAR
0.3
mJ
TC=25°C
Power Dissipation B
TC=100°C
17
PD
W
7
TA=25°C
3.1
2
PDSM
W
°C
Power Dissipation A
TA=70°C
Junction and Storage Temperature Range
TJ, TSTG
-55 to 150
Thermal Characteristics
Parameter
Symbol
Typ
Max
40
Units
°C/W
°C/W
°C/W
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
t
≤ 10s
30
60
6
RθJA
Steady-State
Steady-State
75
RθJC
7.2
Rev 1: April 2011
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Page 1 of 7
AON7452
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max Units
STATIC PARAMETERS
ID=250µA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
100
V
VDS=100V, VGS=0V
10
µA
50
IDSS
Zero Gate Voltage Drain Current
TJ=55°C
V
DS=0V, VGS= ±25V
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
4.7
nA
V
VGS(th)
ID(ON)
VDS=VGS ID=250µA
VGS=10V, VDS=5V
VGS=10V, ID=2.5A
3.3
12
4
A
255
404
296
3.5
310
485
370
mΩ
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
VGS=7V, ID=2A
mΩ
S
VDS=5V, ID=2.5A
IS=1A,VGS=0V
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
0.8
1
V
Maximum Body-Diode Continuous Current
15
A
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
125
20
5
155
28
9
185
36
13
3
pF
pF
pF
Ω
VGS=0V, VDS=50V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=2.5A
VGS=10V, VDS=50V, RL=20Ω,
1
2
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
2.4
1
3
4
nC
nC
nC
ns
ns
ns
ns
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
1.3
0.9
4
1.6
1.3
0.5
4.5
8.5
2
RGEN=3Ω
tD(off)
tf
trr
IF=2.5A, dI/dt=500A/µs
IF=2.5A, dI/dt=500A/µs
6.7
16
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
9.6
23
13
30
ns
Qrr
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA t ≤ 10s value and the maximum allowed junction temperature of 150°C. The value in any given
application depends on the user's specific board design, and the maximum temperature of 150°C may be u sed if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 1: April 2011
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Page 2 of 7
AON7452
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
5
4
3
2
1
0
10
8
10V
VDS=5V
7V
6
6.5V
4
6V
125°C
25°C
2
VGS=5.5V
0
2
3
4
5
6
7
8
0
1
2
3
4
5
V
DS (Volts)
V
GS(Volts)
Fig 1: On-Region Characteristics (Note E)
Figure 2: Transfer Characteristics (Note E)
2
800
600
400
200
0
VGS=10V
ID=2.5A
1.8
1.6
1.4
1.2
1
VGS=7V
VGS
=7V
ID=2A
VGS=10V
0.8
0
1
2
3
4
5
6
0
25
50
75
100
125
150
175
ID (A)
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
(Note E)
550
500
450
400
350
300
250
200
150
1.0E+01
1.0E+00
ID=2.5A
125°C
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
125°C
25°C
25°C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
5
6
7
8
9
10
V
GS (Volts)
VSD (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Figure 6: Body-Diode Characteristics (Note E)
Rev 1: April 2011
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Page 3 of 7
AON7452
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
250
200
150
100
50
VDS=50V
ID=2.5A
8
Ciss
6
4
Coss
2
Crss
0
0
0
0.5
1
1.5
g (nC)
2
2.5
3
3.5
0
10
20
30
VDS (Volts)
40
50
60
Q
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
200
160
120
80
100.0
10.0
1.0
TJ(Max)=150°C
TC=25°C
10µs
RDS(ON)
limited
100µs
DC
1ms
10ms
0.1
TJ(Max)=150°C
TC=25°C
40
0.0
0
0.01
0.1
1
10
100
1000
0.0001
0.001
0.01
0.1
1
10
VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power RatingJunction-to-
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Case (Note F)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
J,PK=TC+PDM.ZθJC.RθJC
θJC=7.2°C/W
T
R
0.1
0.01
PD
Ton
T
Single Pulse
0.0001
0.00001
0.001
0.01
Pulse Width (s)
0.1
1
10
100
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 1: April 2011
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Page 4 of 7
AON7452
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
20
6
5
4
3
2
1
0
15
10
5
0
0
25
50
75
CASE (°C)
100
125
150
0
25
50
75
TCASE (°C)
100
125
150
T
Figure 12: Power De-rating (Note F)
Figure 13: Current De-rating (Note F)
10000
1000
100
10
TA=25°C
1
0.00001
0.001
0.1
Pulse Width (s)
10
1000
Figure 14: Single Pulse Power Rating Junction-to-Ambient (Note H)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=Ton/T
J,PK=TA+PDM.ZθJA.RθJA
θJA=75°C/W
T
R
0.1
0.01
PD
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 15: Normalized Maximum Transient Thermal Impedance (Note H)
Rev 1: April 2011
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Page 5 of 7
AON7452
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
45
40
35
30
25
20
15
10
5
14
12
10
8
16
12
8
3
di/dt=500A/µs
di/dt=500A/µs
125ºC
25ºC
125ºC
25ºC
2.5
2
trr
Qrr
Irm
2
1.5
1
6
25ºC
125ºC
6
4
4
0.5
25ºC
2
S
125ºC
0
0
0
0
8
0
4
8
0
2
4
6
IS (A)
IS (A)
Figure 16: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Figure 17: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
50
40
30
20
10
0
25
20
15
10
5
15
10
5
2.5
2
Is=4A trr
Is=4A
125ºC
25ºC
125ºC
1.5
1
Qrr
25ºC
25ºC
0.5
25ºC
125ºC
Irm
S
125º
0
0
0
300
400
500
600
700
300
400
500
600
700
di/dt (A/µs)
di/dt (A/µs)
Figure 18: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Figure 19: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Rev 1: April 2011
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Page 6 of 7
AON7452
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vgs
Vds
+
Vgs
Vdd
I AR
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
Vds -
Ig
DUT
Vgs
trr
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Rev 1: April 2011
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Page 7 of 7
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