AOD606_08 [AOS]
Complementary Enhancement Mode Field Effect Transistor; 互补增强型场效应晶体管![AOD606_08](http://pdffile.icpdf.com/pdf2/p00209/img/icpdf/AOD606_1182912_icpdf.jpg)
型号: | AOD606_08 |
厂家: | ![]() |
描述: | Complementary Enhancement Mode Field Effect Transistor |
文件: | 总11页 (文件大小:245K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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AOD606
Complementary Enhancement Mode Field Effect Transistor
General Description
Features
n-channel
VDS (V) = 40V
ID = 8A (VGS=10V)
RDS(ON)
The AOD606 uses advanced trench
technology MOSFETs to provide
excellent RDS(ON) and low gate charge.
The complementary MOSFETs may be
used in H-bridge, Inverters and other
applications.
p-channel
-40V
-8A (VGS = -10V)
RDS(ON)
< 33 mΩ (VGS=10V)
< 47 mΩ (VGS=4.5V)
< 50 mΩ (VGS = -10V)
< 70 mΩ (VGS = -4.5V)
-RoHS Compliant
-Halogen Free*
100% UIS Tested!
TO-252-4L
D1/D2
D-PAK
Bottom View
D
Top View
G1
G2
S1
S2
G2
S2
D1/D2
n-channel
p-channel
G1
S1
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Max n-channel Max p-channel
Units
VDS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
Current G
Pulsed Drain Current C
Avalanche Current C
40
-40
±20
-8
V
VGS
±20
V
A
TC=25°C
8
6.3
TC=100°C
ID
-6.3
-30
IDM
IAR
EAR
30
12
14
A
Repetitive avalanche energy L=0.3mH C
21.6
20
29.4
30
mJ
TC=25°C
PD
W
Power Dissipation B
TC=100°C
10
15
TA=25°C
1.6
1.7
PDSM
W
Power Dissipation A
TA=70°C
1
1.1
TJ, TSTG
Junction and Storage Temperature Range
-55 to 175
-55 to 175
°C
Thermal Characteristics: n-channel and p-channel
Parameter
Symbol Device Typ
Max
30
Maximum Junction-to-Ambient A
n-ch
n-ch
n-ch
25
66
7
°C/W
°C/W
°C/W
t ≤ 10s
RθJA
RθJC
RθJA
RθJC
Maximum Junction-to-Ambient A
80
7.5
Steady-State
Maximum Junction-to-Case B
Steady-State
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A
p-ch
p-ch
p-ch
17
60
4
25
75
5
°C/W
°C/W
°C/W
t ≤ 10s
Steady-State
Maximum Junction-to-Case B
Steady-State
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
ID=10mA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
40
V
V
DS=32V, VGS=0V
1
5
IDSS
Zero Gate Voltage Drain Current
µA
TJ=55°C
VDS=0V, VGS=±20V
VDS=VGS, ID=250µA
VGS=10V, VDS=5V
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
100
3
nA
V
VGS(th)
ID(ON)
1.5
30
2.3
A
V
GS=10V, ID=8A
27
39
33
52
47
mΩ
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
VGS=4.5V, ID=6A
VDS=5V, ID=8A
IS=1A, VGS=0V
37
mΩ
S
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
25
0.76
1
8
V
Maximum Body-Diode Continuous Current
Pulsed Body-Diode CurrentC
A
ISM
30
A
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
404
95
pF
pF
pF
Ω
VGS=0V, VDS=20V, f=1MHz
GS=0V, VDS=0V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
37
V
2.7
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
9.2
4.5
1.6
2.6
3.5
6
nC
nC
nC
nC
ns
VGS=10V, VDS=20V, ID=8A
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS=10V, VDS=20V, RL=2.5Ω,
ns
RGEN=3Ω
tD(off)
tf
13.2
3.5
22.9
18.3
ns
ns
trr
IF=8A, dI/dt=100A/µs
IF=8A, dI/dt=100A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
ns
Qrr
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev5: Sep. 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
20
15
10
5
30
25
20
15
10
5
10V
5V
VDS=5V
4.5V
4V
125°C
VGS=3.5V
25°C
0
0
0
1
2
3
4
5
2
2.5
3
3.5
4
4.5
VGS(Volts)
VDS (Volts)
Figure 2: Transfer Characteristics
Fig 1: On-Region Characteristics
50
1.8
1.6
1.4
1.2
1
VGS=10V
ID=8A
45
40
35
30
25
20
VGS=4.5V
VGS=4.5V
ID=6A
VGS=10V
0.8
0
4
8
12
16
20
0
25
50
75
100
125
150
175
ID (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
Figure 4: On-Resistance vs. Junction
Temperature
100
90
80
70
60
50
40
30
20
10
1.0E+01
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
ID=8A
125°C
125°C
25°C
25°C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2
4
6
8
10
VSD (Volts)
VGS (Volts)
Figure 6: Body-Diode Characteristics
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
700
10
600
500
400
300
200
100
0
VDS=20V
ID=8A
8
6
4
2
0
Ciss
Coss
Crss
0
2
4
6
8
10
0
5
10
15
20
25
30
35
40
Qg (nC)
VDS (Volts)
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
100.0
10.0
1.0
200
160
120
80
TJ(Max)=175°C, T A=25°C
10µs
TJ(Max)=175°C
TA=25°C
RDS(ON)
limited
100µs
1ms
10ms
DC
40
0
0.1
0.0001 0.001
0.01
0.1
1
10
100
0.1
1
10
100
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
In descending order
D=Ton/T
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=7.5°C/W
1
0.1
PD
Ton
T
Single Pulse
0.0001
0.01
0.00001
0.001
0.01
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
0.1
1
10
100
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
N-Channel MOSFET TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
L ID
TA=25°C
tA =
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
BV −VDD
TA=150°C
0
0
0.000001
0.00001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
0.0001
0
25
50
75
100
125
150
175
T
CASE (°C)
Figure 13: Power De-rating (Note B)
10
8
50
TA=25°C
40
30
20
10
0
6
4
2
0
0
25
50
75
100
125
150
175
0.001
0.01
0.1
1
10
100
1000
TCASE (°C)
Pulse Width (s)
Figure 14: Current De-rating (Note B)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
θJA=30°C/W
PD
0.01
Single Pulse
R
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
STATIC PARAMETERS
ID=-10mA, VGS=0V
BVDSS
Drain-Source Breakdown Voltage
-40
V
V
DS=-32V, VGS=0V
-1
-5
IDSS
Zero Gate Voltage Drain Current
µA
TJ=55°C
VDS=0V, VGS=±20V
VDS=VGS ID=-250µA
VGS=-10V, VDS=-5V
IGSS
Gate-Body leakage current
Gate Threshold Voltage
On state drain current
±100
-3
nA
V
VGS(th)
ID(ON)
-1.5
-30
-1.8
A
V
GS=-10V, ID=-8A
35
62
50
70
mΩ
RDS(ON)
Static Drain-Source On-Resistance
TJ=125°C
VGS=-4.5V, ID=-4A
VDS=-5V, ID=-8A
IS=-1A,VGS=0V
55
mΩ
S
gFS
VSD
IS
Forward Transconductance
Diode Forward Voltage
16
-0.75
-1
-8
V
Maximum Body-Diode Continuous Current
Pulsed Body-Diode CurrentC
A
ISM
-30
A
DYNAMIC PARAMETERS
Ciss
Coss
Crss
Rg
Input Capacitance
657
143
63
pF
pF
pF
Ω
VGS=0V, VDS=-20V, f=1MHz
GS=0V, VDS=0V, f=1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate resistance
V
6.5
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge (10V)
Qg(4.5V) Total Gate Charge (4.5V)
14.1
7
nC
nC
nC
nC
ns
VGS=-10V, VDS=-20V, ID=-8A
Qgs
Qgd
tD(on)
tr
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
2.2
4.1
8
V
GS=-10V, VDS=-20V, RL=2.5Ω,
12.2
24
ns
RGEN=3Ω
tD(off)
tf
ns
12.5
23.2
18.2
ns
trr
IF=-8A, dI/dt=100A/µs
IF=-8A, dI/dt=100A/µs
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
ns
Qrr
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allow s it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The SOA
curve provides a single pulse rating.
*This device is guaranteed green after data code 8X11 (Sep 1ST 2008).
Rev5: Sep. 2008
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
30
25
20
15
10
5
25
20
15
10
5
-5V
-10V
-6V
-4.5V
VDS=-5V
VGS=-4V
-3.5V
125°C
-3V
25°C
0
0
0
1
2
3
4
5
0
1
2
3
4
5
-VGS(Volts)
-VDS (Volts)
Figure 2: Transfer Characteristics
Fig 1: On-Region Characteristics
80
1.80
VGS=-10V
ID=-8A
VGS=-4.5V
70
60
50
40
30
20
1.60
1.40
1.20
1.00
0.80
VGS=-4.5V
ID=-6A
VGS=-10V
0
25
50
75
100
125
150
175
0
4
8
12
16
20
-ID (A)
Temperature (°C)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
Figure 4: On-Resistance vs. Junction
Temperature
120
100
80
1.0E+01
1.0E+00
1.0E-01
1.0E-02
1.0E-03
1.0E-04
1.0E-05
1.0E-06
ID=-8A
125°C
125°C
60
25°C
25°C
40
20
0.0
0.2
0.4
0.6
0.8
1.0
1.2
2.00E+00 4.00E+00 6.00E+00 8.00E+00 1.00E+01
-VSD (Volts)
-VGS (Volts)
Figure 6: Body-Diode Characteristics
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
10
1200
1000
800
600
400
200
0
VDS=-20V
ID=-8A
8
Ciss
6
4
Coss
2
Crss
0
0
5
10
15
-VDS (Volts)
20
25
30
0
4
8
12
16
-Qg (nC)
Figure 7: Gate-Charge Characteristics
Figure 8: Capacitance Characteristics
100.0
10.0
1.0
200
160
120
80
TJ(Max)=175°C, T A=25°C
10µs
TJ(Max)=175°C
TA=25°C
RDS(ON)
limited
100µs
1ms
10ms
DC
40
0
0.1
0.0001 0.001
0.01
0.1
1
10
100
0.1
1
10
100
-VDS (Volts)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
In descending order
D=Ton/T
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=5°C/W
1
0.1
PD
Ton
T
Single Pulse
0.0001
0.01
0.00001
0.001
0.01
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
0.1
1
10
100
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606
P-Channel MOSFET Electrical Characteristics (TJ=25°C unless otherwise noted)
100
90
80
70
60
50
40
30
20
10
0
60
50
40
30
20
10
0
TA=25°C
L ID
tA =
BV −V
DD
TA=150°C
0
25
50
75
100
125
150
175
0.000001
0.00001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability
0.0001
TCASE (°C)
Figure 13: Power De-rating (Note B)
60
10
8
TA=25°C
50
40
30
20
10
0
6
4
2
0
0
25
50
75
100
125
150
175
0.001
0.01
0.1
1
10
100
1000
T
CASE (°C)
Pulse Width (s)
Figure 14: Current De-rating (Note B)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
10
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
0.01
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
θJA=25°C/W
PD
Single Pulse
0.001
Ton
T
R
0.001
0.00001
0.0001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606 N-Channel
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
VDC
+
Qgs
Qgd
Vds
VDC
-
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
10%
+
DUT
Vdd
Vgs
VDC
Rg
-
Vgs
Vgs
td(on)
t
r
td(off)
t
f
ton
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LIA2R
BVDSS
Vds
Id
Vds
+
Vgs
Vdd
I AR
Vgs
VDC
Id
Rg
-
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
trr
Vds -
L
Isd
I F
Isd
Vgs
dI/dt
I RM
+
Vdd
VDC
Vdd
-
Vds
Ig
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
AOD606 P-Channel
Gate Charge Test Circuit & Waveform
Vgs
Qg
-
-10V
-
VDC
Qgs
Qgd
+
Vds
VDC
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
t
td(off)
td(on)
t
r
f
Vgs
-
90%
10%
DUT
Vdd
Vgs
VDC
+
Rg
Vgs
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
EAR= 1/2 LIA2R
L
Vds
Id
Vgs
Vds
-
BVDSS
Vgs
Vdd
VDC
+
Id
Rg
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
trr
Vds -
L
-Isd
-IF
Isd
Vgs
dI/dt
-IRM
+
Vdd
VDC
Vdd
-
-Vds
Ig
Alpha & Omega Semiconductor, Ltd.
www.aosmd.com
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