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AWC6323RM47P9 [ANADIGICS]

HELP3ETM Dual-band Cellular & PCS CDMA 3.4 V Linear Power Amplifier Module; HELP3ETM双频段蜂窝和PCS CDMA 3.4 V线性功率放大器模块
AWC6323RM47P9
型号： AWC6323RM47P9
厂家： ANADIGICS, INC    ANADIGICS, INC
描述：

HELP3ETM Dual-band Cellular & PCS CDMA 3.4 V Linear Power Amplifier Module
HELP3ETM双频段蜂窝和PCS CDMA 3.4 V线性功率放大器模块

放大器 射频 微波 功率放大器 过程控制系统 CD PCS 蜂窝
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AWC6323  
HELP3ETM Dual-band Cellular & PCS CDMA  
3.4 V Linear Power Amplifier Module  
Data Sheet - Rev 2.2  
FEATURES  
•
InGaP HBT Technology  
•
High Efficiency (Cell Band):  
• 37.5 % @ POUT = +27.6 dBm  
• 23 % @ POUT = +16 dBm  
• 11.5 % @ POUT = +10 dBm  
Low Quiescent Current: 3.5 mA  
Internal Voltage Regulation  
A
WC6323  
•
•
•
•
•
•
•
•
Built-in Directional Coupler  
Common VMODE Control Line  
Simplified VCC Bus PCB routing  
Reduced External Component Count  
Low Profile Surface Mount Package: 1 mm  
RoHS Compliant Package, 260 oC MSL-3  
M47 Package  
14 Pin 3 mm x 5 mm x 1 mm  
Surface Mount Module  
APPLICATIONS  
•
Cell & PCS Dual-band Wireless Handsets and  
Data Devices for CDMA/EVDO networks.  
CPL_OUT. The 3 mm x 5 mm x 1 mm surface mount  
package incorporates matching networks optimized  
for output power, efficiency and linearity in a 50 Ω  
system.  
PRODUCT DESCRIPTION  
AWC6323 addresses the demand for increased  
integration in dual-band handsets for CDMAnetworks.  
The small footprint 3 mm x 5 mm x 1 mm surface-  
mount RoHS compliant package contains independent  
RF PA paths to ensure optimal performance in both  
frequency bands, while achieving a 25% PCB space  
savings compared with solutions requiring two  
single-band PAs. The package pinout was chosen  
to enable handset manufacturers to easily route bias  
to both power amplifiers and simplify control with  
common mode pins. The device is manufactured on  
an advanced InGaP HBT MMIC technology offering  
state-of-the-art reliability, temperature stability, and  
ruggedness. The AWC6323 is part of ANADIGICS’  
High-Efficiency-at-Low-Power (HELP™) family of  
CDMA power amplifiers, which deliver low quiescent  
currents and significantly greater efficiency without  
the need of an external DC-DC converter. Through  
selectable bias modes, the AWC6323 achieves  
optimal efficiency, specifically at low- and mid-range  
power levels where the PAtypically operates, thereby  
dramatically increasing handset talk-time. Its built-in  
voltage regulator eliminates the need for external  
switches. This PA has built-in directional couplers  
for each band, with a common coupler output port  
V
EN_CELL  
1
14  
13  
12  
11  
10  
9
GND  
Bias Control  
Voltage Regulation  
RFIN_CELL  
2
CPL  
RFOUT_CELL  
VMODE1  
3
4
5
V
CC  
CC  
VBATT  
V
A
VMODE2  
CPLOUT  
GND  
RFIN_PCS  
CPL  
6
7
Bias Control  
Voltage Regulation  
V
EN_PCS  
8
RFOUT_PCS  
GND at Slug (pad)  
Figure 1: Block Diagram  
03/2012  
AWC6323  
VMODE1  
CPLOUT  
VMODE2  
Figure 2: Pinout  
Table 1: Pin Description  
PIN  
NAME  
DESCRIPTION  
Enable Voltage for Cell  
Band  
1
V
EN_CELL  
2
3
4
5
6
RFIN_CELL  
RF Input for Cell Band  
Mode Control Voltage 1  
Battery Voltage  
V
MODE1  
V
BATT  
V
MODE2  
Mode Control Voltage 2  
RF Input for PCS Band  
RFIN_PCS  
Enable Voltage for PCS  
Band  
7
V
EN_PCS  
8
RFOUT_PCS  
GND  
RF Output for PCS Band  
Ground  
9
10  
11  
12  
13  
14  
CPLOUT  
Coupler Output Port  
Battery Voltage A  
Supply Voltage  
VCCA  
V
CC  
RFOUT_CELL RF Output for Cell Band  
GND Ground  
Data Sheet - Rev 2.2  
03/2012  
2
AWC6323  
ELECTRICAL CHARACTERISTICS  
Table 2: Absolute Minimum and Maximum Ratings  
PARAMETER  
MIN  
0
MAX  
+5  
UNIT  
V
Supply Voltage (VBATT, VCC, VCCA)  
Mode Control Voltage (VMODE1,  
Enable Voltage (VEN_CELL, VEN_PCS  
RF Input Power (PIN  
Storage Temperature (TSTG  
V
MODE2  
)
0
+3.5  
+3.5  
+10  
+150  
V
)
0
V
)
-
dBm  
°C  
)
-40  
Stresses in excess of the absolute ratings may cause permanent damage.  
Functional operation is not implied under these conditions. Exposure  
to absolute ratings for extended periods of time may adversely affect  
reliability.  
Table 3: Operating Ranges  
PARAMETER  
MIN  
TYP  
-
MAX  
UNIT  
MHz  
V
COMMENTS  
Cellular  
824  
1850  
849  
1910  
Operating Frequency (f)  
PCS  
Supply Voltage (VCC and VBATT  
)
+3.2  
+3.4  
+4.2  
+1.35  
0
+1.8  
-
+3.1  
+0.5  
PA "on"  
PA "shut down"  
Enable Voltage (VEN  
)
V
+1.35  
0
+1.8  
-
+3.1  
+0.5  
High State Voltage  
Low State Voltage  
Mode Control Voltage (VMODE1,  
V
MODE2  
)
V
Cellular RF Output Power (POUT  
)
CDMA, HPM  
CDMA, MPM  
CDMA, LPM  
+27.1 (1)  
27.6  
16  
10  
-
-
-
dBm  
CDMA 2000, RC-1  
CDMA 2000, RC-1  
-
-
PCS RF Output Power (POUT  
)
CDMA, HPM  
CDMA, MPM  
CDMA, LPM  
+27.4 (1) +27.9  
-
-
-
dBm  
-
-
16  
10  
Case Temperature (T  
C
)
-30  
-
+90  
°C  
The device may be operated safely over these conditions; however, parametric performance is guaranteed only  
over the conditions defined in the electrical specifications.  
Notes:  
(1) For operation at VCC = +3.2 V, POUT is derated by 0.5 dB.  
Data Sheet - Rev 2.2  
3
03/2012  
AWC6323  
Table 4a: Electrical Specifications - Cellular Band (BC 0)  
(TC  
= +25 °C, VBATT = VCC = +3.4 V, VEN_CELL = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
V
MODE1  
V
MODE2  
P
OUT  
25  
14  
8
27  
17  
11.5  
30  
19  
14  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.6 dBm  
+16 dBm  
+10 dBm  
Gain  
dB  
Adjacent Channel Power  
at 885 kHz offset (1)  
Primary Channel BW = 1.23 MHZ  
Adjacent Channel BW = 30 kHz  
-
-
-
-51  
-52  
-50  
-46.5  
-46.5  
-46.5  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.6 dBm  
+16 dBm  
+10 dBm  
dBc  
Adjacent Channel Power  
at 1.98 MHz offset (1)  
Primary Channel BW = 1.23 MHZ  
Adjacent Channel BW = 30 kHz  
-
-
-
-61  
-63  
<-68  
-57  
-57  
-57  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.6 dBm  
+16 dBm  
+10 dBm  
dBc  
%
34  
18  
8
37.5  
23  
11.5  
-
-
-
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.6 dBm  
+16 dBm  
+10 dBm  
Power-Added Efficiency (1)  
through VCC pins,  
Quiescent Current (Icq)  
-
-
3.5  
6
mA  
mA  
V
MODE1 = 0/1.8 V, VMODE2 = 0 V  
through VMODE pins,  
Mode Control Current  
<0.05  
0.1  
V
MODE1= 0/1.8 V, VMODE2 = 0 V  
through VBATT pin, VMODE1 = 0/1.8 V,  
Battery Current  
-
-
-
1
2
mA  
mA  
V
MODE2 = 0 V  
Enable Current  
<0.1  
0.15  
through VEN_CELL pin  
-133  
-138  
-131  
-135  
V
V
MODE1 = 0 V, VMODE2 = 1.8 V,  
MODE1 = VMODE2 = 1.8 V  
Noise in Receive Band(2)  
dBm/Hz  
Harmonics  
2fo  
-
-
-43  
-50  
-30  
-30  
dBc  
P
OUT < +27.6 dBm  
3fo, 4fo  
Input Impedance  
Coupling Factor  
-
-
-
2:1  
VSWR  
dB  
22  
-
Data Sheet - Rev 2.2  
03/2012  
4
AWC6323  
Table 4b: Electrical Specifications - Cellular Band (BC 0)  
(TC  
= +25 °C, VBATT = VCC = +3.4 V, VEN_CELL = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
V
MODE1  
V
MODE2  
P
OUT  
P
OUT < +27.6 dBm  
In-band Load VSWR < 5:1  
Spurious Output Level  
(all spurious outputs)  
-
-
-
-65  
-
dBc  
Out-of-band Load VSWR < 10:1  
Applies over all operating  
conditions  
Load mismatch stress with no  
permanent degradation or failure  
Applies over full operating  
conditions  
8:1  
VSWR  
Notes:  
(1) PAE and ACP measured at 836.5 MHz.  
(2) 869 MHz to 894 MHz.  
Data Sheet - Rev 2.2  
03/2012  
5
AWC6323  
Table 5a: Electrical Specifications - PCS Band (BC 1)  
(TC  
= +25 °C, VBATT = VCC = +3.4 V, VEN_PCS = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform)  
COMMENTS  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
V
MODE1  
V
MODE2  
P
OUT  
24.5  
10  
7
26.5  
13.5  
10  
30  
16  
13  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.9 dBm  
+16 dBm  
+10 dBm  
Gain  
dB  
Adjacent Channel Power  
at 1.25 MHz offset (1)  
Primary Channel BW = 1.23 MHZ  
Adjacent Channel BW = 30 kHz  
-
-
-
-51  
-52  
-52  
-46.5  
-46.5  
-46.5  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.9 dBm  
+16 dBm  
+10 dBm  
dBc  
Adjacent Channel Power  
at 1.98 MHz offset (1)  
Primary Channel BW = 1.23 MHZ  
Adjacent Channel BW = 30 kHz  
-
-
-
-56  
-59  
-63  
-54  
-54  
-54  
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.9 dBm  
+16 dBm  
+10 dBm  
dBc  
%
33  
18  
8
36.5  
21  
11  
-
-
-
0 V  
1.8 V  
0/1.8 V  
1.8 V  
1.8 V  
0 V  
+27.9 dBm  
+16 dBm  
+10 dBm  
Power-Added Efficiency (1)  
through VBATT and VCC pins,  
Quiescent Current (Icq)  
-
-
3.5  
6
mA  
mA  
V
MODE1 = 0/1.8 V, VMODE2 = 0 V  
tthrough VMODE pins,  
Mode Control Current  
0.05  
0.1  
V
MODE1 = 0/1.8 V, VMODE2 = 0 V  
through VBATT pin, VMODE1 = 0/1.8 V,  
Battery Current  
-
-
1
2
mA  
mA  
V
MODE2 = 0 V  
Enable Current  
<0.1  
0.15  
through VEN_CELL pin  
V
V
V
BATT = +4.2 V, VCC = +4.2 V,  
EN_CELL = 0 V,  
MODE1 = 0 V, VMODE2 = 0 V  
Total Decoder Current on VBATT  
(in Shutdown mode)  
A  
-
-
7
16  
5
V
V
V
BATT = +4.2 V, VCC = +4.2 V,  
EN_CELL = 0 V,  
MODE1 = 0 V, VMODE2 = 0 V  
Total PA Leakage Current on VCC  
(in Shutdown mode)  
A  
dBm/Hz  
dBc  
1
-
-
-133  
-137  
-131  
-134  
V
V
MODE1 = 0 V, VMODE2 = 1.8 V  
MODE1 = VMODE2 = 1.8 V  
Noise in Receive Band(2)  
Harmonics  
2fo  
-
-
-41  
-50  
-30  
-30  
P
OUT < +27.9 dBm  
3fo, 4fo  
Input Impedance  
Coupling Factor  
-
-
-
2:1  
VSWR  
dB  
22  
-
Data Sheet - Rev 2.2  
03/2012  
6
AWC6323  
Table 5b: Electrical Specifications - PCS Band (BC 1)  
(T  
C
= +25 °C, VBATT = VCC = +3.4 V, VEN_PCS = +1.8 V, 50 Ω system, CDMA2000 RC-1 waveform)  
COMMENTS  
PARAMETER  
MIN  
TYP MAX  
UNIT  
V
MODE1  
V
MODE2  
P
OUT  
P
OUT < +27.9 dBm  
In-band Load VSWR < 5:1  
Spurious Output Level  
(all spurious outputs)  
-
-
-
-65  
-
dBc  
Out-of-band Load VSWR < 10:1  
Applies over all operating  
conditions  
Load mismatch stress with no  
permanent degradation or failure  
Applies over full operating  
conditions  
8:1  
VSWR  
Notes:  
(1) ACPRs and Efficiency measured at 1880 MHz.  
(2) 1930 MHz to 1990 MHz.  
Data Sheet - Rev 2.2  
03/2012  
7
AWC6323  
APPLICATION INFORMATION  
Bias Modes  
To ensure proper performance, refer to all related  
Application Notes on the ANADIGICS web site:  
http://www.anadigics.com  
The power amplifier may be placed in Low, Medium or  
High Bias modes by applying the appropriate logic level  
(see Operating Ranges table) to the VMODE1, and VMODE2  
pins. The Bias Control table lists the recommended  
modes of operation for various applications.  
Shutdown Mode  
The power amplifier may be placed in a shutdown  
mode by applying logic low levels (see Operating  
Ranges table) to the VENABLE and VMODE voltages.  
Vcontrols  
Venable/Vmode(s)  
Rise/Fall Max 1µS  
Defined at 10% to 90%  
of Min/Max Voltage  
On Sequence Start  
T_0N=0µ  
Off Sequence Start  
T_0FF=0µ  
ON Sequence  
OFF Sequence  
RFIN_CELL,PCS  
notes 1,2  
VEN_CELL,PCS  
VCC, VCCA  
note 1  
T_0N+1µS  
T_0N+3µS  
T_0FF+2µS T_0FF+3µS  
Referenced After 90%of Rise  
Time  
Referenced Before10%of Fall  
Time  
Figure 3: Recommended ON/OFF Timing Sequence  
Notes:  
(1) Level might be changed after RF is ON.  
(2) RF OFF defined as PIN ≤ -30 dBm.  
(3) Switching simultaneously between VMODE and VEN is not recommended.  
Table 6: Bias Control  
P
OUT  
BIAS  
MODE  
APPLICATION  
V
EN  
V
MODE1  
V
MODE2  
V
CC  
V
BATT  
LEVELS  
CDMA - low power  
(Low Bias Mode)  
< +10 dBm  
Low  
Med  
+1.8 V  
-
0 V  
3.2 - 4.2 V  
3.2 - 4.2 V  
> 3.2 V  
> 3.2 V  
CDMA - med power  
(Medium Bias Mode)  
> 8 dBm  
< +16 dBm  
+1.8 V +1.8 V +1.8 V  
CDMA - high power  
(High Bias Mode)  
> +16 dBm  
-
High  
+1.8 V  
0 V  
0 V  
0 V  
+1.8 V  
0 V  
3.2 - 4.2 V  
3.2 - 4.2 V  
> 3.2 V  
> 3.2 V  
Shutdown  
Shutdown  
Data Sheet - Rev 2.2  
03/2012  
8
AWC6323  
VEN_CELL  
1
2
14  
13  
12  
11  
10  
9
Bias Control  
Voltage Regulation  
RFIN_CELL  
CPL  
RFOUT_CELL  
68 pF  
VMODE1  
3
4
5
VCC  
1000 pF  
VBATT  
68pF  
2.2 F  
1000 pF  
2.2 F  
VMODE2  
CPLOUT  
RFIN_PCS  
CPL  
6
7
Bias Control  
Voltage Regulation  
VEN_PCS  
8
RFOUT_PCS  
33 pF  
GND at Slug (pad)  
Figure 4: Application Circuit  
Data Sheet - Rev 2.2  
03/2012  
9
AWC6323  
PACKAGE OUTLINE  
Figure 5: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module  
Figure 6: Branding Specification  
Data Sheet - Rev 2.2  
03/2012  
10  
AWC6323  
ORDERING INFORMATION  
TEMPERATURE  
RANGE  
PACKAGE  
DESCRIPTION  
ORDER NUMBER  
COMPONENT PACKAGING  
RoHS Compliant 14 Pin  
3 mm x 5 mm x 1 mm  
Surface Mount Module  
AWC6323RM47Q7 -30 °C to +90 °C  
Tape and Reel, 2500 pieces per Reel  
RoHS Compliant 14 Pin  
3 mm x 5 mm x 1 mm  
Surface Mount Module  
AWC6323RM47P9  
-30 °C to +90 °C  
Partial Tape and Reel  
anaDigiCS, iꢀc.  
141 Mount Bethel Road  
Warren, New Jersey 07059, U.S.A.  
Tel: +1 (908) 668-5000  
Fax: +1 (908) 668-5132  
URL: http://www.anadigics.com  
iMPOrTanT nOTiCE  
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.  
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to  
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed  
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers  
to verify that the information they are using is current before placing orders.  
warning  
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of anANADIGICS product  
in any such application without written consent is prohibited.  
Data Sheet - Rev 2.2  
11  
03/2012  

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