A3932SEQ-T [ALLEGRO]
THREE-PHASE POWER MOSFET CONTROLLER; 三相功率MOSFET控制器
| 型号： | A3932SEQ-T |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | THREE-PHASE POWER MOSFET CONTROLLER |
| 文件： | 总13页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
3932
THREE-PHASE POWER
MOSFET CONTROLLER
The A3932SEQ is a three-phase MOSFET controller for use with bi-
polar brushless dc motors. Its high gate-current drive capability allows
driving a wide range of n-channel power MOSFETs and can support
motor supply voltages to 50 V. Bootstrapped high-side drive blocks
provide the floating positive supplies for the gate drive and minimize
the component count normally required. The high-side circuitry also
employs a unique FET monitoring circuit that ensures the gate voltages
are at the proper levels before turn-on and during the ON cycle.
5
29 SENSE
28 RC
GHC
CC
6
7
27
GLB
SB
PWM
8
26 TACH
25 SR
Internal fixed off-time PWM current-control circuitry can be used to
regulate the maximum load current to a desired value. The peak load-
current limit is set by the user’s selection of an input reference voltage
and external sensing resistor. The fixed off-time pulse duration is set by
a user-selected external RC timing network. For added flexibility, the
GHB
CB
9
10
11
12
13
BRAKE
24
23
GLA
SA
DIR
22 H2
21 H3
continued ...
GHA
FEATURES AND BENEFITS
■ Drives Wide Range of N-Channel MOSFETs
■ Synchronous Rectification
Dwg. PP-068-1
■ Power MOSFET Protection
■ Adjustable Dead Time for Cross-Conduction Protection
■ 100% Duty Cycle Operation
■ Selectable Fast or Slow Current-Decay Modes
■ Internal PWM Peak Current Control
■ High-Current Gate Drive
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
■ Motor Lead Short-to-Ground Protection
■ Internal 5-V Regulator
Supply Voltage, VBB .............................. 50 V
Peak Regulator Voltage, VREG ............... 15 V
■ Brake Input
Logic Input Voltage Range,
■ PWM Torque-Control Input
■ Fault-Diagnostic Output
VIN ................... -0.3 V to VLCAP + 0.3 V
Sense Voltage Range,
■ Tachometer Output
VSENSE ............................ -5 V to +1.5 V
Output Voltage Range,
■ Thermal Shutdown
VSA, VSB, VSC .................. -5 V to +50 V
VGHA, VGHB, VGHC .. -5 V to VBB + 17 V
VCA, VCB, VCC ..................... VSX + 17 V
■ Undervoltage Protection
Operating Temperature Range,
TA .................................. -20°C to +85°C
Junction Temperature, TJ .................. +150°C
Storage Temperature Range,
TS ............................... -55°C to +150°C
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Selection Guide
Part Number
Pb-Free*
Yes
Packing
A3932SEQ-T
32 pieces/tube
13-in. reel, 800 pieces/reel
A3932SEQTR-T
Yes
*Pb-based variants are being phased out of the product line. The variants cited in this footnote are in production but
have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of this device is currently
restricted to existing customer applications. The variants should not be purchased for new design applications because
obsolescence in the near future is probable. Samples are no longer available. Status change: May 1, 2006. These
variants include: A3932SEQ adn A3932SEQTR.
www.allegromicro.com
2
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Functional Block Diagram
NOTE — For 12 V applications, VBB is shorted to VREG.
The VREG absolute maximum rating (15 V) must not be
exceeded.
PWM input can be used to provide speed/torque control,
allowing the internal current control circuit to set the maxi-
mum current limit.
The A3932 includes the commutation logic for Hall sen-
sors configured for 120 degree spacing. Power MOSFET
protection features include bootstrap capacitor charging
current monitor, undervoltage monitor, motor-lead short-
to-ground, and thermal shutdown.
Optional synchronous rectification is included. This
feature will short out the current path through the power
MOSFETs’ reverse body diodes during the PWM off-cycle
current decay. This can minimize power dissipation in the
power MOSFETs, eliminate the need for external power
clamp diodes, and potentially allow a more economical
choice for the MOSFET drivers.
The ‘–S–’ part-number suffix indicates an operating
temperature range of -20°C to +85°C. The ‘–EQ–’ suffix
indicates a 32-lead rectangular plastic chip carrier (PLCC).
The initial ‘–TR–’ variant suffix indicates tape and reel
packing. The ‘–T’ final variant suffix indicates lead (Pb)
free composition, with 100% matte tin leadframe plating.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2002, 2003 Allegro MicroSystems, Inc.
2
3932
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL CHARACTERISTICS: unless otherwise noted at TA = 25°C; VBB = 18 V to 50 V; CLCAP
,
Cboot = 0.1 µF; CREG = 10 µF; Cload = 3300 pF; fPWM = 22.5 kHz Square Wave; Two Phases Active.
Limits
Parameter
Symbol
Conditions
Min
Typ
Max Units
Supply Current
Quiescent Current
Reference Voltage
Output Voltage
IBB
RESET high, coast mode, stopped
ILCAP = -3 mA
–
4.75
10.8
12.4
–
–
5.0
8.0
5.25
13.2
13.6
–
mA
V
VLCAP
VREG
VBB = VREG ≤15 V, IREG = -10 mA
18 V ≤ VBB ≤ 50 V, IREG = -10 mA
–
V
13
V
V
BB = 13.2 V to 18 V, IREG = -10 mA
VBB - 2.5
25
V
Output Voltage Regulation
∆VREG(∆IREG) IREG = -1 to -30 mA, coast
–
–
mV
mV
∆
IREG = -10 mA, coast
–
40
–
VREG(∆VBB)
Digital Logic Levels
Logic Input Voltage
VIH
All inputs except SR
SR input only
All inputs except SR
SR input only
VIH = 2 V
2.0
3.0
–
–
–
–
–
–
–
–
–
V
V
VIL
0.8
1.8
-90
-130
V
–
V
Logic Input Current
IIH
IIL
-30
-50
µA
µA
VIL = 0.8 V
Gate Drive
Low-Side Output Voltage
High-Side Output Voltage
Pulldown Switch Resistance
Pullup Switch Resistance
VGLxH
VGHxH
rDS(on)
rDS(on)
trGLx
tfGLx
trGHx
tfGHx
tpr
IGLx = 0
VREG - 0.8 VREG - 0.5
–
12.8
–
V
IGHx = 0
10.4
–
11.6
4.0
14
V
Ω
IGLx = 50 mA
Ω
IGHx = -50 mA
–
–
Low-Side Output
Switching Time
10% to 90%, with Cload
90% to 10%, with Cload
10% to 90%, with Cload
90% to 10%, with Cload
GHx, GLx rising, Cload = 0
GHx, GLx falling, Cload = 0
GHx to GLx, VDEAD = 0 V, Cload = 0
GLx to GHx, IDEAD = 780 µA, Cload = 0
–
120
60
–
ns
ns
ns
ns
ns
ns
µs
ns
–
–
High-Side Output
Switching Time
–
120
60
–
–
–
Propagation Delay Time
(PWM to gate output)
–
220
110
5.6
100
–
tpf
–
–
Maximum Dead Time
Minimum Dead Time
tdead
tdead
3.5
50
7.6
150
Continued —
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
www.allegromicro.com
3
3932
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL CHARACTERISTICS: unless otherwise noted at TA = 25°C; VBB = 18 V to 50 V; CLCAP
,
Cboot = 0.1 µF; CREG = 10 µF; Cload = 3300 pF; fPWM = 22.5 kHz Square Wave; Two Phases Active.
Limits
Parameter
Symbol Conditions
Min
Typ Max
Units
Bootstrap Capacitor
Bootstrap Charge Current
Bootstrap Output Voltage
Bootstrap Resistance
Current Limit Circuitry
Input Offset Voltage
SENSE Input Current
REFERENCE Input Current
Blank Time
ICx
100
10.4
–
–
–
mA
V
VCx
rCx
VSx = 0, ICx = 0, VREG = 13 V
11.6
9.0
12.8
12
ICx = -50 mA
Ω
Vio
ISENSE
IREF
0 V ≤ VIC ≤ 1.5 V
–
–
–
±5.0
–
mV
µA
µA
µs
mA
V
V
V
IC ≥ 0 V, VID ≤ 1.5 V
IC ≥ 0 V, VID ≤ 1.5 V
-25
0
–
–
tblank
IRC
RT = 56 kΩ, CT = 470 pF
–
0.91
-1.0
1.1
3.0
–
RC Charge Current
-0.9
1.0
2.7
-1.1
1.2
3.3
RC Voltage Threshold
VRCL
VRCH
V
Protection Circuitry
Bootstrap Charge Threshold
Motor Short-to-Ground Monitor
Undervoltage Threshold
ICx
–
1.3
9.2
8.6
–
-9.0
2.0
9.7
9.1
–
–
2.7
10.2
9.6
0.5
0.5
–
mA
V
VDSH
UVLO
VBB - VSX, high side on
Increasing VREG
Decreasing VREG
IO = 1 mA
V
V
FAULT Output Voltage
TACH Output Voltage
VFAULT
VTACH
tTACH
TJ
V
IO = 1 mA
–
–
V
TACH Output Pulse Width
Thermal Shutdown Temp.
Thermal Shutdown Hysteresis
Thermal Resistance
IO = 1 mA, CTACH = 50 pF
–
0.75
165
10
µs
°C
°C
°C/W
–
–
∆TJ
–
–
RθJA
High K board per JEDEC JESD51-7
–
37
–
NOTES: 1.Typical Data is for design information only.
2.Negative current is defined as coming out of (sourcing) the specified device terminal.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
4
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Terminal Descriptions
RESET — A logic input used to enable the device, internally
pulled up to VLCAP (+5 V). A RESET = 1 will disable the
device and force all gate drivers to 0 V, coasting the motor. A
RESET = 0 allows the gate drive to follow the commutation
logic. The RESET = 1 overrides BRAKE.
Terminal
Name
1
PGND
RESET
GLC
SC
2
3
4
GLA/GLB/GLC — Low-side, gate-drive outputs for external
NMOS drivers. External series-gate resistors (as close as
possible to the NMOS gate) can be used to control the slew rate
seen at the power-driver gate, thereby controlling the di/dt and
dv/dt of the SA/SB/SC outputs. GLx = 1 (or “high”) means that
the upper half (PMOS) of the driver is turned on and its drain
will source current to the gate of the low-side FET in the
external motor-driving bridge. GLx = 0 (or “low”) means that
the lower half (NMOS) of the driver is turned on and its drain
will sink current from the external FET’s gate circuit.
5
GHC
CC
6
7
GLB
SB
8
9
GHB
CB
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
GLA
SA
SA/SB/SC — Directly connected to the motor, these terminals
sense the voltages switched across the load. These terminals
are also connected to the negative side of the bootstrap capaci-
tors and are the negative supply connections for the floating
high-side drivers.
GHA
CA
VREG
LCAP
FAULT
MODE
VBB
H1
GHA/GHB/GHC — High-side, gate-drive outputs for external
NMOS drivers. External series-gate resistors can be used to
control the slew rate seen at the power-driver gate, thereby
controlling the di/dt and dv/dt of the SA/SB/SC outputs.
GHx = 1 (or “high”) means that the upper half (PMOS) of the
driver is turned on and its drain will source current to the gate
of the high-side FET in the external motor-driving bridge. GHx
= 0 (or “low”) means that the lower half (NMOS) of the driver
is turned on and its drain will sink current from the external
FET’s gate circuit.
H3
H2
DIR
BRAKE
SR
CA/CB/CC — High-side connections for the bootstrap capaci-
tors, positive supply for high-side gate drivers. The bootstrap
capacitors are charged to approximately VREG when the
associated output Sx terminal is low. When the output swings
high, the voltage on this terminal rises with the output to
provide the boosted gate voltage needed for n-channel power
MOSFETs.
TACH
PWM
RC
SENSE
REF
DEAD
AGND
continued next page
www.allegromicro.com
5
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Terminal Descriptions (cont’d)
FAULT — Open-drain output to indicate fault condition;
FAULT = 1 (external pull-up) for any of the following:
PWM — Speed control input, internally pulled up to VLCAP
(+5 V). A PWM = 0 turns off selected drivers. A PWM = 1
will turn on selected drivers as determined by H1/H2/H3 input
logic. Holding PWM = 1 allows speed/torque control solely by
the internal current-limit circuit with the REF analog voltage.
1 – invalid HALL input code,
2 – undervoltage condition detected at VREG.
3 – thermal shutdown, or
See also the Input Logic table
.
RC — An analog input used to set the fixed off time with an
external resistor (RT) and capacitor (CT). The tblank time is
controlled by the value of the external capacitor (see Applica-
tions Information). See Application Information.
4 – motor lead (SA/SB/SC) shorted to ground.
Except for a short-to-ground fault that only turns off the
high-side drivers, faults will force a coast condition that turns
off all power MOSFETs. Only the short-to-ground fault is
latched but is cleared at each commutation. If the motor has
stalled due to a short-to-ground being detected, toggling the
RESET terminal or repeating a power-up sequence will clear
the fault. Typically pulled up to VLCAP (+5 V) with an external
5.1 kΩ resistor.
SENSE — An analog input to the current-limit comparator.
A voltage representing load current appears on this terminal
during on time, when it reaches REF voltage, the comparator
trips and load current decays for the fixed off-time interval.
Voltage transients seen at this terminal when the drivers turn on
are ignored for time tblank
.
MODE — A logic input to set current-decay method, internally
pulled up to VLCAP (+5 V). When in slow-decay mode (MODE
= 1), only the high-side MOSFET is switched off during a
PWM-off cycle. The fast-decay mode (MODE = 0) switches
both the high-side and low-side MOSFETs.
REF — An analog input to the current-limit comparator.
Voltage applied here with respect to AGND sets the peak load
current.
Ipeak = VREF/RS.
VREG — A regulated 13 V output; supply for low-side gate
drive and bootstrap capacitor charge circuits. It is good practice
to connect a decoupling capacitor from this terminal to AGND,
as close to the device terminals as possible. This terminal
should be shorted to VBB for 12 V applications.
H1/H2/H3 — Hall-sensor inputs; internally pulled up to VLCAP
(+5 V). Configured for 120° electrical spacing.
DIR — A logic input to reverse rotation, see Commutation
Truth Table. Internally pulled up to VLCAP (+5 V).
BRAKE — An active-low logic input for a braking function. A
BRAKE = 0 will turn on the low-side FETs and turn off the
high-side FETs. This will effectively short-circuit the BEMF in
the windings and brake the motor. The braking torque applied
will depend on the speed. Internally pulled up to VLCAP (+5 V).
RESET = 1 overrides BRAKE and will coast the motor.
VBB — The A3932 supply voltage. It is good practice to
connect a decoupling capacitor from this terminal to AGND, as
close to the device terminals as possible.
LCAP — Connection for 0.1 µF decoupling capacitor for the
internal 5 V reference. This terminal can source no more than
3 mA for the DEAD input, TACH and FAULT outputs.
SR — Synchronous rectification input. An SR = 0 disables this
feature, forcing current decay through the body diodes of the
power MOSFETs. An SR = 1 will result in appropriate high-
and low-side gate outputs to switch in response to a PWM-off
command. Internally pulled up to VLCAP (+5 V). See also the
Input Logic table.
DEAD — An analog input. A resistor between DEAD and
LCAP is selected to adjust the turn-off to turn-on time. This
delay is needed to prevent shoot-through in the external power
MOSFETs. See Applications Information for details on setting
dead time.
AGND — The low-level (analog) reference point.
TACH — An open-drain digital output whose frequency is
proportional to speed of rotation. A pulse appears at every
HALL transition. Typically pulled up to VLCAP (+5 V) with an
external 5.1 kΩ resistor.
PGND — The return for all low-side gate drivers. This should
be connected to the system power ground.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
6
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Commutation Truth Table
Logic Inputs
Driver Outputs
Motor Terminals
H1
H2
H3
DIR
GLA
GLB
GLC
GHA
GHB
GHC
SA
SB
SC
1
1
1
0
0
0
1
1
1
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
1
0
0
0
0
0
0
0
1
1
0
0
0
1
1
0
1
1
0
0
0
0
H
Z
L
Z
H
H
Z
L
L
L
Z
H
H
Z
H
H
Z
L
L
Z
H
L
L
Z
L
Z
H
H
Z
L
L
Z
H
H
L
Z
Input Logic
MODE
PWM
SR
RESET
Operation
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
0
0
0
0
1
1
1
1
X
0
0
0
0
0
0
0
0
1
PWM chop mode, fast decay, all drivers off
Peak current limit, selected drivers on
PWM chop mode. slow decay, selected low side drivers on
Peak current limit, selected drivers on
PWM chop mode, fast decay with opposite of selected drivers on
Peak current limit, selected drivers on
PWM chop, slow decay with both low-side drivers on
Peak current limit, selected drivers on
All gate drive outputs off, clear fault logic, coast
L = Low (less positive) level
H = High (more positive) level
X = Don’t care
Z = High impedance
1 = Active or true logic condition
0 = Inactive or false logic condition
Dwg. OA-007-32
www.allegromicro.com
7
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Applications Information
Synchronous Rectification. To reduce power dissipation
in the external MOSFETs, the A3932 control logic turns on the
appropriate low-side and high-side driver during the load-
current recirculation, PWM-off cycle. Synchronous
rectification allows current to flow through the MODE-selected
MOSFET, rather than the body diode, during the decay time.
The body diodes of the SR power MOSFETs will conduct only
during the dead time required at each PWM transition.
Additionally, a 0.1 µF (or larger) decoupling capacitor
should be connected between LCAP and AGND as close to the
device terminals as possible.
Protection Circuitry. The A3932 has several protection
features:
1) Bootstrap Circuit. The bootstrap capacitor is charged
whenever a low-side MOSFET is on, Sx output goes low, and
the load current recirculates. This happens constantly during
normal operation. The high-side MOSFET will not be allowed
to turn on before the charging has decayed to less than
approximately 9 mA. No fault will be registered.
Dead Time. It is required to have a dead-time delay between a
high- or low-side turn off and the next turn-on event to prevent
cross conduction. The potential for cross conduction occurs
with synchronous rectification, direction changes, PWM, or
after a bootstrap capacitor charging cycle. The dead time is set
by a resistor (Rdead) between the DEAD terminal and LCAP
(+5 V) and can be set between 100 ns and 5.5 µs.
When a phase’s high-side driver is on for a long time
(100% duty cycle operation) its charge pump is designed to
maintain VGS > 9 V on the bridge FET if IGHx (the load on the
gate driver) < 10 µA.
The following equations are valid for Rdead between 5.6 kΩ
and 470 kΩ. At 25°C,
2) Hall Invalid. Illegal codes for the HALL inputs (000 or
111) will force a fault and coast the motor. Noisy Hall lines
may cause double TACH pulses and, therefore, code errors that
produce faults. Additional external pullup loading and filtering
may be required depending on the system.
tdead (nom, ns) = 37 + (11.9 x 10-3 x (Rdead + 500))
For predicting worst case, over voltage and temperature
extremes,
tdead (min, ns) = 10 + (6.55 x 10-3 x (Rdead + 350))
dead (max, ns) = 63 + (17.2 x 10-3 x (Rdead + 650))
For comparison with IDEAD test currents,
IDEAD = (VLCAP – Vbe)/(Rdead + Rint)
3) VREG Undervoltage. An internal regulator supplies the
low-side gate driver and the bootstrap charge current. It is critical
to ensure that VREG is at the proper level before enabling any of
the outputs. The undervoltage circuit is active during power-up
and will force a motor coast condition (all gate drives, GHx and
GLx = 0) until VREG is greater than approximately 9.7 V.
t
where (nominal values) VLCAP = 5 V, Vbe = 0.7 V at 25°C, and
Rint = 500 Ω.
Rather than use Rdead values near 470 kΩ, set DEAD =
4) Thermal Shutdown. A junction temperature greater than
165°C will signal a fault and coast the motor (all gate drives
LOW). If the junction temperature then falls to less than 155°C
(hysteresis), the fault will be cleared.
ground (VDEAD = 0 V), which activates an internal (IDEAD
=
10 µA) current source.
The choice of power MOSFET and external series gate
resistance determines the selection of the dead-time resistor.
The dead time should be made long enough to cover the
variation of the MOSFET gate capacitance and series gate
resistance (both external and internal to the A3932) tolerances.
5) Motor Lead Shorted to Ground. The A3932 will signal a
fault if a motor lead is shorted to ground. A short to ground is
assumed after a high side is turned on and greater than 2 V is
measured between the drain (VBB) and source (SA/SB/SC) of
the high-side power MOSFET. This fault is cleared at the
beginning of each commutation. If a stalled motor results from
a fault, the fault can only be cleared by toggling the RESET
terminal or by a power-up sequence.
Decoupling. The internal reference, VREG, supplies current
for the gate-drive circuit. As the gates are driven high they will
require current from an external capacitor to support the
transients. This capacitor should be placed as close as possible
to the VREG terminal. Its value should be at least 20 times
larger than the bootstrap capacitor.
continued next page
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
8
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Applications Information (cont’d)
Current Control. Internal fixed off-time PWM circuitry is
implemented to limit load current to a desired value. When a
high-side and low-side MOSFET are turned on, current will
increase in the motor winding until it reaches a value given by
Because the load current does not flow through the sense
resistor during a dynamic brake, care must be taken to ensure
that the power MOSFET’s maximum ratings are not exceeded.
RESET = 1 overrides BRAKE and turns all motor bridge
FETs off, coasting the motor.
ITRIP ≈ VREF/RS.
At the trip point, the sense comparator resets the source-
enable latch, turning off the high-side driver. Load
inductance causes the current to recirculate (decay) for the fixed
off time. The current path during recirculation is determined by
the configuration of the MODE and SR inputs.
Low-Voltage Operation. Although VREG can be connected
to VBB for 12 V systems, the VREG maximum rating of 15 V
must be observed including transients. If transients cannot be
adequately controlled, use VREG in the regulator mode (not
connected to VBB). With VBB less than 18 V, the VREG output
voltage level specification may not be met. Note that in this
mode the VREG undervoltage threshold may leave the system
with little headroom if VBB is less than 12 V.
An external resistor (RT) and capacitor (CT), connected in
parallel from the RC terminal to AGND, are used to set the
fixed off-time period (toff = RT x CT). RT should be in the range
of 10 kΩ to 500 kΩ. The toff should be in the range of 10 µs to
50 µs. Larger values for toff can result in audible noise
problems.
Driving an H Bridge. The A3932 may be used to drive an H
bridge (e.g., a brush dc motor load) by hard wiring one state for
the Hall inputs (e.g., H1 = H2 = 1 (HIGH), H3 = 0 (LOW)).
Leave the appropriate phase driver outputs floating (in this case
CC, GHC, SC, and GLC because, from the Commutation Truth
Table, SC = Z). The DIR input controls the motor rotation
while the PWM, MODE, and SR inputs control the motor
current behavior as described in the Input Logic table.
Torque control can be implemented by varying the REF
input voltage as long as the PWM input stays high. If direct
control of the torque/current is desired by PWM input, a voltage
can be applied to the REF input to set an absolute maximum
current limit.
Layout. Careful consideration must be given to PCB layout
when designing high-frequency, fast-switching, high-current
circuits.
PWM Blank. The capacitor (CT) also serves as the means to
set the blank time duration. At the end of the PWM off cycle, a
high-side gate selected by the commutation logic will turn on.
At this time, large current transients can occur during the
reverse recovery time (trr) of the intrinsic body diodes of the
external power MOSFETs. To prevent false tripping of the
current-sense comparator, the blank function disables the
comparator for a time
1) The analog ground (AGND), the power ground (PGND),
and the high-current return of the external MOSFETs (the
negative side of the sense resistor) should return separately to
the negative side of the motor supply filtering capacitor. This
will minimize the effect of switching noise on the device logic
and analog reference.
tblank = 1.9 x CT/(0.001 - [2/RT])
The user must ensure that CT is large enough to cover the
current-spike duration.
2) Minimize stray inductances by using short, wide copper
runs at the drain and source terminals of all power MOSFETs.
This includes motor lead connections, the input power buss, and
the common source of the low-side power MOSFETs. This will
minimize voltages induced by fast switching of large load
currents.
Braking. The A3932 will dynamically brake by forcing all
low-side MOSFETs on and all high-side MOSFETs off. This
will effectively short-circuit the BEMF and brake the motor.
During braking, the load current can be approximated by:
IBRAKE = VBEMF/RL
3) Kelvin connect the SENSE terminal PC trace to the
positive side of the sense resistor.
www.allegromicro.com
9
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Dimensions in Inches
(controlling dimensions)
20
14
0.013
0.021
13
21
0.026
0.032
0.546
0.476
0.595
0.585
LONG SIDE
(0.446
0.553
0.547
0.376
SHORT SIDE)
0.050
BSC
29
5
30
4
32
1
0.453
0.447
0.015
MIN
0.495
0.485
0.125
0.140
Dwg. MA-006-32 in
NOTES: 1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor’s option within limits shown
3. Supplied in standard sticks/tubes of 32 devices or add “TR” to part number for tape and reel.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
10
3932
THREE-PHASE POWER
MOSFET CONTROLLER
Dimensions in Millimeters
(for reference only)
20
14
0.33
0.54
13
21
0.66
0.82
13.86
12.10
15.11
14.86
LONG SIDE
(11.32
14.04
13.90
9.56
SHORT SIDE)
1.27
BSC
29
5
30
4
32
1
11.50
11.36
0.38
MIN
12.57
12.32
3.18
3.55
Dwg. MA-006-32 mm
NOTES: 1. Lead spacing tolerance is non-cumulative.
2. Exact body and lead configuration at vendor’s option within limits shown
3. Supplied in standard sticks/tubes of 32 devices or add “TR” to part number for tape and reel.
The products described here are manufactured under one or more U.S. patents or U.S.
patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures
from the detail specifications as may be required to permit improvements in the performance,
reliability, or manufacturability of its products. Before placing an order, the user is cautioned to
verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or
systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro
MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or
other rights of third parties which may result from its use.
www.allegromicro.com
11
3932
THREE-PHASE POWER
MOSFET CONTROLLER
MOTOR DRIVERS
Function
Output Ratings*
Part Number†
INTEGRATED CIRCUITS FOR BRUSHLESS DC MOTORS
3-Phase Power MOSFET Controller
3-Phase Power MOSFET Controller
3-Phase Power MOSFET Controller
3-Phase Back-EMF Controller/Driver
3-Phase PWM Current-Controlled DMOS Driver
—
—
—
28 V
40 V
50 V
14 V
50 V
3933
3935
3932 & 3938
8904
3936
±900 mA
±3.0 A
INTEGRATED BRIDGE DRIVERS FOR DC AND BIPOLAR STEPPER MOTORS
PWM Current-Controlled Dual Full Bridge
Dual Full Bridge with Protection & Diagnostics
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled Dual Full Bridge
Microstepping Translator/Dual Full Bridge
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled Dual DMOS Full Bridge
PWM Current-Controlled Full Bridge
PWM Current-Controlled Dual Full Bridge
PWM Current-Controlled DMOS Full Bridge
PWM Current-Controlled Microstepping Full Bridge
PWM Current-Controlled Microstepping Full Bridge
PWM Current-Controlled Dual DMOS Full Bridge
PWM Current-Controlled Dual DMOS Full Bridge
PWM Current-Controlled Full Bridge
±500 mA
±500 mA
±650 mA
±650 mA
±750 mA
±750 mA
±750 mA
±750 mA
±800 mA
±1.0 A
±1.3 A
±1.5 A
±1.5 A
±1.5 A
±1.5 A
±1.5 A
±1.5 A
±2.0 A
18 V
30 V
30 V
30 V
30 V
45 V
45 V
45 V
33 V
35 V
50 V
45 V
50 V
50 V
50 V
50 V
50 V
50 V
50 V
35 V
50 V
3965
3976
3966
3968
3967
2916
2919
6219
3964
3973
3953
2917
3948
3955
3957
3972
3974
3952
3958
3977
3959
PWM Current-Controlled DMOS Full Bridge
Microstepping Translator/Dual DMOS Full Bridge
PWM Current-Controlled DMOS Full Bridge
±2.0 A
±2.5 A
±3.0 A
UNIPOLAR STEPPER MOTOR & OTHER DRIVERS
Unipolar Stepper-Motor Translator/Driver
Unipolar Stepper-Motor Quad Drivers
Unipolar Microstepper-Motor Quad Driver
Unipolar Stepper-Motor Quad Driver
Unipolar Stepper-Motor Translator/Driver
Unipolar Stepper-Motor Quad Driver
Unipolar Microstepper-Motor Quad Driver
1.25 A
1.5 A
1.5 A
1.8 A
2.0 A
3.0 A
3.0 A
50 V
46 V
46 V
50 V
46 V
46 V
46 V
5804
7024 & 7029
7042
2540
7051
7026
7044
* Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits
or over-current protection voltage limits. Negative current is defined as coming out of (sourcing) the output.
† Complete part number includes additional characters to indicate operating temperature range and package style.
Also, see 3175, 3177, 3235, and 3275 Hall-effect sensors for use with brushless dc motors.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
12
相关型号：
©2020 ICPDF网 联系我们和版权申明