AKD4101A [AKM]
AK4101A Evaluation Board Rev.0; AK4101A评估板Rev.0
| 型号： | AKD4101A |
| 厂家： | 
ASAHI KASEI MICROSYSTEMS |
| 描述： | AK4101A Evaluation Board Rev.0 |
| 文件： | 总24页 (文件大小：721K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ASAHI KASEI
[AKD4101A-B]
AKD4101A-B
AK4101A Evaluation Board Rev.0
GENERAL DESCRIPTION
The AKD4101A-B is an evaluation board for the AK4101A, 192kHz DIT. The AKD4101A-B has the
interface with AKM’s A/D converter evaluation boards and AKM’s DIR evaluation boards. Therefore, it is
easy to evaluate the AK4101A. The AKD4101A-B also has the digital audio interface and can achieve the
interface with digital audio systems via optical link, BNC unbalance or XLR balance connector.
Ordering guide
AKD4101A-B --- Evaluation board for AK4101A
(A cable for connecting with printer port of IBM-AT compatible PC and a control
software are packed with this. The control software does not operate on Windows
NT.)
FUNCTION
Digital interface
Compatible with 2 types of interface
- Direct interface with AKM’s ADC, DIR evaluation boards by 10pin header
- Optical/BNC/XLR output
Serial control data I/F
- 1 input/output port (10-pin port)
GND
5V
Control
AK4101A
Opt
TX
Serial Data in
(For DIT)
C,U,V
Figure 1. AKD4101A-B Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
<KM080100>
2005/10
- 1 -
ASAHI KASEI
[AKD4101A-B]
Evaluation Board Manual
Operating sequence
(1) Set up the power supply lines.
[+ 5V]
[GND]
(Red) = 5V
(Black) = 0V
(2) Set up the evaluation mode and jumper pins. (Refer to the following section.)
(3) Connect cables. (Refer to the following section.)
(4) Power on.
The AK4101A should be reset once bringing PDN(SW2) “L” upon power-up.
Evaluation modes
(1) Evaluation for DIT
Serial Data in(10pin port) – AK4101A – S/PDIF out(optical, XLR or BNC)
MCLK
BICK
LRCK
DAUX
MCLK
BICK
LRCK
PORT5
(10pin Header)
Optical, XLR or
BNC connector
AK4101A
(DIT)
S/PDIF
ADC
DAUX
AKD4101A-B
MCLK, BICK, LRCK and DAUX are input via 10pin header (PORT5: DIT). The AKD4101A-B can be
connected with the AKM’s ADC evaluation board via 10-line cable.
a. Set-up of a Bi-phase output signal
Connector
Optical (PORT4)
XLR (J3)
JP19 (TXP)
OPT
XLR
BNC (J4)
BNC
Table 1. Set-up of TXP
a-1. Set-up of TXP/TXN
JP21 (TXP) Sub
4-5 pin (short)
3-6 pin (short)
2-7 pin (short)
1-8 pin (short)
TX
JP22 (TXN) Sub
4-5 pin (short)
3-6 pin (short)
2-7 pin (short)
1-8 pin (short)
TXP1/TXN1
TXP2/TXN2
TXP3/TXN3
TXP4/TXN4
Table 2. Set-up of TXP/TXN
<KM080100>
2005/10
- 2 -
ASAHI KASEI
[AKD4101A-B]
b. Set-up of clock input and output
The used signals are MCLK, LRCK, BICK and SDTI (DAUX).
The signal level outputted and inputted from PORT5 is 5V.
Clock
MCLK
BICK
PORT
PORT5
PORT5
PORT5
LRCK
SDTI
(DAUX)
PORT5
Table 3. Clock input/output
CKS1 pin
CKS0 pin
(SW3_5)
(Sub_JP20)
MCLK
fs (max)
CKS1 bit
CKS0 bit
Default
0
0
1
1
0
1
0
1
128fs
256fs
384fs
512fs
28k-192 kHz
28k-108 kHz
28k-54 kHz
28k-54 kHz
Table 4. Master Clock Frequency Select
b-1. Set-up of input/output of BICK and LRCK
Please set up SW 3_8 (DIT_I/O) according to the setup of audio format of AK4101A (Refer to Table 6).
Audio format
Slave mode
Master mode
SW3_8 (DIT_I/O)
Default
0
1
Table 5. Set-up of DIT_I/O
c. Set-up of audio data format
It sets up by SW 1_2, SW 1_3 and SW1_4 in synchronous mode. Please set up DIF2-0 bit in asynchronous
mode.
DIF2 pin DIF1 pin DIF0 pin
(SW1_4) (SW1_3) (SW1_2)
LRCK
I/O
BICK
Mode
SDTI
DIF2 bit
DIF1 bit
DIF0 bit
I/O
I
I
I
I
I
I
O
O
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
H/L
H/L
H/L
H/L
H/L
L/H
H/L
L/H
I
I
I
I
I
I
O
O
64fs
64fs
64fs
64fs
64fs
64fs
64-128fs
64-128fs
Default
24bit, Left justified
24bit, I2S
Table 6. Audio format
<KM080100>
2005/10
- 3 -
ASAHI KASEI
[AKD4101A-B]
B, C, U, V Inputs (synchronous mode)
At synchronous mode (ANS=1), C(channel status), U(user data) and V(validity) are input via 10pin header
(PORT3: BCUV). BLS is output at normal mode (TRANS=0), and is input at audio routing mode (TRANS=1). In
case of audio routing mode, BLS, C, U an V can be directly input from the AKD4114 via 10-line flat cable. The pin
layout of PORT3 is shown in Figure 2.
PORT3
BCUV
9
1
2
10
Figure 2. PORT3 pin layout
Serial control
The AK4101A can be controlled by pins at synchronous mode (ANS=1) and by internal register at asynchronous
mode (ANS=0). Synchronous/Asynchronous mode is set as Table 7.
Mode
SW1-6 (ANS)
ON
JP18 (SDA/CDTO)
Sub_JP20 (ANS)
Open.
FS3=1: Short “CDTO/CM0=H” side.
FS3=0: Short “CM0=L” side.
Short “CDTO/CM0=H” side.
Synchronous
Asynchronous
OFF
Short.
Default
Table 7. Synchronous/Asynchronous mode
At asynchronous mode (ANS=0), the AK4101A can be controlled via printer port (parallel port) of IBM-AT
compatible PC. Connect PORT6 (uP-I/F) with PC by 10-line flat cable packed with the AKD4101A-B. Take care of
the direction of connector. There is a mark at pin#1. The pin layout of PORT6 is shown in Figure 3.
PORT6
uP I/F
2
1
10
9
Figure 3. PORT6 pin layout
Control software is packed with the AKD4101A-B. The software manual is included in this eva-board manual.
<KM080100>
2005/10
- 4 -
ASAHI KASEI
[AKD4101A-B]
Toggle switch set-up
Reset switch for AK4101A. Set to “H” during normal operation. Bring to “L” once after
the power is supplied.
SW2
PDN
DIP switch (SW1) set-up: -off- means “L”
No.
1
2
3
4
Switch Name
IPS0
DIF0
DIF1
DIF2
Function
Don’t care
Default
OFF
OFF
OFF
ON
OFF
OFF
Set-up of DIF0 pin. (synchronous mode)
Set-up of DIF1 pin. (synchronous mode)
Set-up of DIF2 pin. (synchronous mode)
Don’t care
Set-up of ANS pin.
“OFF”: asynchronous mode, “ON”: synchronous mode
Don’t care
5
IPS1/IIC
6
ANS
7
8
TEST
ACKS
OFF
OFF
Don’t care
DIP switch (SW3) set-up: -off- means “L”
No.
1
2
3
4
Switch Name
FS1
FS2
FS0
PSEL
CKS1
Function
Default
OFF
OFF
OFF
OFF
OFF
OFF
Sampling frequency select at synchronous mode (ANS=1).
(See the datasheet.)
Don’t care
Set-up of CKS1 pin. (synchronous mode)
Set-up of TRANS pin.
“OFF”: normal mode, “ON”: audio routing mode
Don’t care
Set-up of the transmission direction of 74AC245
“OFF”: When inputting from PORT5, “ON”: When outputting from
PORT5
5
6
7
TRANS
DIR_I/O
OFF
OFF
8
DIT_I/O
<KM080100>
2005/10
- 5 -
ASAHI KASEI
[AKD4101A-B]
Jumper set up.
No.
Jumper Name
Function
Set-up of Power supply source for 74AC245.
D3V : D3V
1
D3V/VD
VD : VD (default)
Set-up of FS3 pin
Synchronous mode : short CDTO/CM0=“H” → FS3 pin=“H”
short CM0=“L” → FS3 pin=“L”
Asynchronous mode: short CDTO/CM0=“H” (default)
Set-up of TXP1 output circuit.
OPT : Optical (default)
18
19
SDA/CDTO
TXP1
XLR : XLR
BNC : BNC
Set-up depending synchronous / asynchronous mode
Open : synchronous mode
Short : asynchronous mode (default)
Set-up of CKS0 pin
19(sub) ANS
20(sub) CKS0
Open : CKS0 pin=“H”
Short : CKS0 pin=“L” (default)
Set-up of TXP output
4-5 pin Short: TXP1 (default)
3-6 pin Short: TXP2
2-7 pin Short: TXP3
21(sub) TXP
22(sub) TXN
1-8 pin Short: TXP4
Set-up of TXN output
4-5 pin Short: TXN1 (default)
3-6 pin Short: TXN2
2-7 pin Short: TXN3
1-8 pin Short: TXN4
<KM080100>
2005/10
- 6 -
ASAHI KASEI
[AKD4101A-B]
Control Software Manual
Set-up of evaluation board and control software
1. Set up the AKD4101A-B according to previous term.
2. Connect IBM-AT compatible PC with AKD4101A-B by 10-line type flat cable (packed with AKD4101A-B). Take
care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AKD4101A-B Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4101A.exe” to set up the control program.
5. Then please evaluate according to the follows.
Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
Explanation of each buttons
1. [Port Reset] : Set up the USB interface board (AKDUSBIF-A) .
2. [Write default] : Initialize the register of AK4101A.
3. [All Write] :
Write all registers that is currently displayed.
4. [Function1] : Dialog to write data by keyboard operation.
5. [Function3] : The sequence of register setting can be set and executed.
6. [Function4] : The sequence that is created on [Function3] can be assigned to buttons and
executed.
7. [Function5]:
The register setting that is created by [SAVE] function on main window can
be assigned to buttons and executed.
8. [SAVE] :
10. [OPEN] :
11. [Write] :
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
<KM080100>
2005/10
- 7 -
ASAHI KASEI
[AKD4101A-B]
Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4101A, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal.
Data Box:
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to AK4101A, click [OK] button. If not, click [Cancel] button.
3. [Save] and [Open]
3-1. [Save]
Save the current register setting data. The extension of file name is “akr”.
(Operation flow)
(1) Click [Save] Button.
(2) Set the file name and push [Save] Button. The extension of file name is “akr”.
3-2. [Open]
The register setting data saved by [Save] is written to AK4101A. The file type is the same as [Save].
(Operation flow)
(1) Click [Open] Button.
(2) Select the file (*.akr) and Click [Open] Button.
<KM080100>
2005/10
- 8 -
ASAHI KASEI
[AKD4101A-B]
4. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [Start] button. Then this sequence is executed.
The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of file
name is “aks”.
Figure 4. Window of [F3]
<KM080100>
2005/10
- 9 -
ASAHI KASEI
[AKD4101A-B]
5. [Function4 Dialog]
The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the
window as shown in Figure 5 opens.
Figure 5. [F4] window
<KM080100>
2005/10
- 10 -
ASAHI KASEI
[AKD4101A-B]
5-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks).
The sequence file name is displayed as shown in Figure 6.
Figure 6. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
5-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The sequence file names can assign be saved. The file name is *.ak4.
[OPEN] : The sequence file names assign that are saved in *.ak4 are loaded.
5-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change.
<KM080100>
2005/10
- 11 -
ASAHI KASEI
[AKD4101A-B]
6. [Function5 Dialog]
The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When
[F5] button is clicked, the following window as shown in Figure 7opens.
Figure 7. [F5] window
6-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE] : The register setting file names assign can be saved. The file name is *.ak5.
[OPEN] : The register setting file names assign that are saved in *.ak5 are loaded.
6-3. Note
(1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side.
(2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to
reflect the change.
<KM080100>
2005/10
- 12 -
ASAHI KASEI
[AKD4101A-B]
Revision History
Date
Manual
Board
Reason
Contents
(YY/MM/DD)
Revision
Revision
05/10/03
KM080100
0
First edition
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering any use or
application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor
concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application
or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs,
currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life support, or
other hazard related device or system, and AKM assumes no responsibility relating to any such use, except
with the express written consent of the Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing
it, and which must therefore meet very high standards of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise
places the product with a third party to notify that party in advance of the above content and conditions, and the
buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from
any and all claims arising from the use of said product in the absence of such notification.
<KM080100>
2005/10
- 13 -
5
4
3
2
1
CN5
D
C
B
A
D
C
B
A
C19
10u
VDD
BICK
SDTI
LRCK
MCLK
C20
0.1u
CN6
CN7
48
FS0/CSN
PDN
U7
DIF0
1
2
DIF0
TRANS
CKS1
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
FS1/CDTI
FS2/CCLK
FS3/CDTO
C
FS1/CDTI
TRANS
V34
V12
U4
CKS1
DIF1
PDN
3
DIF1
PDN
DIF2
V
U
FS2/CCLK
FS3/CDTO
C1
4
DIF2
5
6
C2
U3
7
AK4101A
C3
U2
DAUX
SDTI
8
C4
U1
FS0/CSN
FS0/CSN
FS2/CCLK
FS1/CDTI
FS3/CDTO
JP19
9
DIF2
DIF1
ANS
DIF2
DIF1
VDD
DIF0
FS2/CCLK
FS1/CDTI
FS3/CDTO
ANS
10
11
12
13
14
15
16
BLS
JP20
VDD
CKS0
VSS
C21
+
CKS0
C22
10u
0.1u
DIF0
LRCK
MCLK
C23
0.1u
CKS1
LRCK
MCLK
10u
C24
JP21
TXP
JP22
TXN
V
U
C
BICK
Title
AKD4101A
CN8
Size
A3
Document Number
Rev
A
SUB
Date:
Tuesday, September 28, 2004
Sheet
1
3
of
3
5
4
3
2
5
4
3
2
1
CN4
JP1
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
1
D3V
For U6
For U1, U2, U5
For U4
D3V
VD
2
VD
D3V
D3V/VD
3
VD
C1
C2 C3 C4
C6
0.1u
0.1u
0.1u0.1u0.1u
AVDD
P/SN/ANS
ACKS
AVDD
P/SN/ANS
ACKS
D
C
B
A
D
C
B
A
+5V
L2
RXN0
10u
1
2
TVDD/VDD
VD
RXP0
R4
short
RX1
T3
TA48M033F
AVDD
RX2
AVDD
2
1
OUT
IN
+
+
C14
47u
C15
47u
SW1
IPS0
DIF0
DIF1
DIF2/XSEL
IPS1/IIC
P/SN/ANS
TEST
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3V
RX3
AVDD
R8
D3V
AVDD
short
IPS0/RX4
ACKS
JP8
RP1
1
RX5
2
9
8
7
6
5
4
3
2
1
3
DIF0
CN1
DIF0/RX5
TEST
IPS1/IIC
P/SN/ANS
TEST
1
JP9
1
RX6
2
ACKS
TEST
2
3
DIF1/RX6
PDN
DIF1
3
47k
JP10
RX7
4
1
2
3
DIF2/XSEL/RX7
DVDD
5
D3V
DIF2/XSEL
R9
10k
DVDD
VIN
6
U1
D3V
D3V
2
3
5
1A
1B
2A
2B
3A
3B
4A
4B
VIN
4
D1
1Y
7
U2A
74HC14
2
U2B
74HC14
4
1S1588
6
7
R10
100
2Y
3Y
4Y
DAUX
11
10
14
13
1
3
EMCK1
DAUX1
DAUX2
8
R11
R12
9
100
100
EMCK2
DAUX2
H
L
12
9
C16
SW2
PDN
15
1
0.1u
G
A/B
MCKO1
MCKO2
OVDD
10
11
12
13
14
15
16
74LVC157
OVDD
BICK
SDTO
LRCK
Title
AKD4101A-B
Size
A3
Document Number
Rev
0
MAIN
Date:
Wednesday, June 29, 2005
Sheet
1
1
of
2
5
4
3
2
5
4
3
2
1
CN2
PORT3
B
C
GND
+5V
R24
R25
R26
R27
1
2
3
4
5
10
B
100
100
100
100
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
JP19 TXP1
9
8
7
6
C
T45_BK
T45_BK
OPT
XLR
BNC
1
3
5
2
4
6
U
VOUT
VIN
U
BCUV
+5V
R29
R30
R31
R32
47k
VOUT
TVDD
TX0
TXP1
TXN1
47k
47k
47k
D
C
B
A
D
C
B
A
TVDD/VDD
PORT4
5
5
4
3
2
1
IN
VCC
IF
VD
C17
T4
DA02-F
R34
56
6
6
GND
R33
1k
4
8
TOTX176
0.1u
0.1u
XLR JP14
3
2
3
1
5
2
2
3
J4
T5
DA02-F
4
1:1
1
R36
BNC
JP15
MCLK
TX0
J3
XLOUT
2
3
4
5
1
8
TXN1
1
3
MCKO
0.1u
330
2
R37
100
1
5
EMCK1
1:1
EMCK
R38
100kD3V/VD
PORT5
10
U4
GND
MCLK
BICK
LRCK
DAUX
1
2
3
4
5
GND
GND
GND
NC
R82
R83
R96
R97
9
8
7
6
100
100
18
2
100
100
B0
B1
B2
B3
B4
B5
B6
B7
A0
1
3
DC
17
16
15
14
13
12
11
3
4
5
6
7
8
9
A1
A2
A3
A4
A5
A6
A7
2
R84
R85
R86
R87
R88
R89
R90
47k
47k
47k
47k
47k
47k
47k
47k
47k
47k
47k
47k
OVDD
R91
R92
R93
R94
R95
DAUX1
OVDD
AC
R40
R41
JP16
ELRCK
DIT
100k
100k
R42
100k
EBICK
1
19
DIT_I/O
DIR
OE
74AC245
CN3
U2C
JP17
ELRCK
EMCK
ELRCK
EMCK2
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
6
5
1
DC
2
3
74HC14
AC
INT0
U2D
INT1
8
9
D3V
U5
CM0/CDTO/CAD1
CM1/CDTI/SDA
OCKS1/CCLK/SCL
OCKS0/CSN/CAD0
DVDD
74HC14
R48
R49
R52
R55
10k
470
2
3
5
VD
1A
1B
2A
2B
3A
3B
4A
4B
R50
R53
4
1Y
2Y
3Y
4Y
R51
R54
10k
10k
470
470
100
100
U2E
6
7
11
10
14
13
VD
11
13
10
12
9
PORT6
U6A
10
8
6
4
2
9
CSN
SCL/CCLK
SDA/CDTI
SDA(ACK)/CDTO
12
74HC14
U2F
R56
7
5
3
1
51
15
1
1
2
G
A/B
P/SN/ANS
DVDD
74LVC157
74LS07
uP-I/F
74HC14
R57
10k
D3V
R58
JP18
R59
1
3
2
4
6
D3V
R60
SDA
100
SW3
10k
CDTO/CM0=H
5
IPS1/IIC
PSEL
CM1/FS1
OCKS1/FS2
OCKS0/FS0
PSEL
XTL0/CKS1
XTL1/TRANS
DIR_I/O
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CM0=L
D3V
IPS1/IIC
SDA/CDTO
100
D3V/VD
XTL0
DIT_I/O
RP2
XTL1
9
8
7
6
5
4
3
2
1
U6B
U6D
U6F
3
5
4
9
8
13
12
74LS07
74LS07
74LS07
DIR_I/O
DIT_I/O
U6C
6
U6E
10
Title
Size
47k
11
AKD4101A-B
74LS07
74LS07
Document Number
Rev
0
A3
MAIN
Date:
Wednesday, June 29, 2005
Sheet
1
2
of
2
5
4
3
2
AKD4115-A L1
AKD4115-A L1_SILK
相关型号：
©2020 ICPDF网 联系我们和版权申明