ADL5519_08 [ADI]
1 MHz to 10 GHz, 62 dB Dual Log Detector/Controller; 1 MHz至10 GHz时， 62分贝双数检波器/控制器
| 型号： | ADL5519_08 |
| 厂家： | 
ADI |
| 描述： | 1 MHz to 10 GHz, 62 dB Dual Log Detector/Controller |
| 文件： | 总40页 (文件大小：3293K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1 MHz to 10 GHz, 62 dB Dual Log
Detector/Controller
ADL5519
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Wide bandwidth: 1 MHz to 10 GHz
Dual-channel and channel difference output ports
Integrated accurate scaled temperature sensor
62 dB dynamic range ( 3 dBꢀ
24
23
22
21
20
19
18
17
TEMP
ADL5519
25
26
27
28
29
30
16
15
14
13
12
11
>50 dB with 1 dB up to 8 GHz
INHA
INLA
NC
Stability over temperature: 0.5 dB (−40oC to +85oCꢀ
Low noise detector/controller outputs
OUTA
FBKA
OUTP
OUTN
FBKB
CHANNEL A
LOG DETECTOR
COMR
PWDN
COMR
COMR
Pulse response time: 6 ns/8 ns (fall time/rise timeꢀ
Supply operation: 3.3 V to 5.5 V @ 60 mA
Fabricated using high speed SiGe process
Small footprint, 5 mm × 5 mm, 32-lead LFCSP
Operating temperature range: −40oC to +125oC
OUTA
OUTB
CHANNEL B
LOG DETECTOR
31
32
10
9
INLB
INHB
OUTB
NC
APPLICATIONS
RF transmitter power amplifier linearization and
gain/power control
Power monitoring in radio link transmitters
Dual-channel wireless infrastructure radios
Antenna VSWR monitor
BIAS
4
1
2
3
5
6
7
8
Figure 1.
RSSI measurement in base stations, WLAN, WiMAX, radar
GENERAL DESCRIPTION
The ADL5519 is a dual-demodulating logarithmic amplifier that
incorporates two AD8317s. It can accurately convert an RF input
signal into a corresponding decibel-scaled output. The ADL5519
provides accurately scaled, independent, logarithmic output volt-
ages for both RF measurement channels. The device has two
additional output ports, OUTP and OUTN, that provide the
measured differences between the OUTA and OUTB channels.
The on-chip channel matching makes the log amp outputs
insensitive to temperature and process variations.
temperature conditions. A supply of 3.3 V to 5.5 V is required
to power the device. Current consumption is typically 60 mA,
and it decreases to less than 1 mA when the device is disabled.
The device is capable of supplying four log amp measurements
simultaneously. Linear-in-dB measurements are provided at OUTA
and OUTB with conveniently scaled slopes of −22 mV/dB. The log
amp difference between OUTA and OUTB is available as differ-
ential or single-ended signals at OUTP and OUTN. An optional
voltage applied to VLVL provides a common-mode reference level
to offset OUTP and OUTN above ground. The broadband output
pins can support many system solutions.
The temperature sensor pin provides a scaled voltage that is
proportional to the temperature over the operating temperature
range of the device.
Any of the ADL5519 output pins can be configured to provide
a control voltage to a variable gain amplifier (VGA). Special
attention has been paid to minimize the broadband noise of the
output pins so that they can be used for controller applications.
The ADL5519 maintains accurate log conformance for signals
from 1 MHz to 8 GHz and provides useful operation to 10 GHz.
The 3 dB dynamic range is typically 62 dB and has a 1 dB
dynamic range of >50 dB (re: 50 Ω). The ADL5519 has a response
time of 6 ns/8 ns (fall time/rise time) that enables RF burst detec-
tion to a pulse rate of greater than 50 MHz. The device provides
unprecedented logarithmic intercept stability vs. ambient
The ADL5519 is fabricated on a SiGe bipolar IC process and is
available in a 5 mm × 5 mm, 32-lead LFCSP with an operating
temperature range of −40°C to +125°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADL5519
TABLE OF CONTENTS
Basis for Error Calculations...................................................... 23
Device Calibration ..................................................................... 24
Adjusting Accuracy Through Choice of Calibration Points...... 24
Temperature Compensation Adjustment................................ 25
Altering the Slope....................................................................... 26
Channel Isolation ....................................................................... 26
Output Filtering.......................................................................... 27
Package Considerations............................................................. 27
Operation Above 8 GHz............................................................ 27
Applications Information.............................................................. 28
Measurement Mode ................................................................... 28
Controller Mode......................................................................... 28
Automatic Gain Control............................................................ 30
Gain-Stable Transmitter/Receiver............................................ 32
Measuring VSWR....................................................................... 34
Evaluation Board ............................................................................ 36
Configuration Options .............................................................. 36
Evaluation Board Schematic and Artwork ............................. 37
Outline Dimensions....................................................................... 39
Ordering Guide .......................................................................... 39
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 19
Using the ADL5519........................................................................ 20
Basic Connections...................................................................... 20
Input Signal Coupling................................................................ 20
Temperature Sensor Interface................................................... 22
VREF Interface ........................................................................... 22
Power-Down Interface............................................................... 22
Setpoint Interface—VSTA, VSTB............................................. 22
Output Interface—OUTA, OUTB............................................ 22
Difference Output—OUTP, OUTN......................................... 23
Description of Characterization............................................... 23
REVISION HISTORY
1/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 40
ADL5519
SPECIFICATIONS
Supply voltage, VP = VPSR = VPSA = VPSB = 5 V, CLPF = 1000 pF, TA = 25°C, 50 ꢀ termination resistor at INHA, INHB, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
SIGNAL INPUT INTERFACE
Specified Frequency Range
DC Common-Mode Voltage
INHA, INHB (Pin 25, Pin 32)
0.001
10
GHz
V
VP − 0.7
MEASUREMENT MODE,
100 MHz OPERATION
ADJA (Pin 21) = 0.65 V, ADJB (Pin 4) = 0.7 V; OUTA, OUTB
(Pin 15, Pin 10) shorted to VSTA, VSTB (Pin 17, Pin 8);
OUTP, OUTN (Pin 13, Pin 12) shorted to FBKA, FBKB
(Pin 14, Pin 11), respectively; sinusoidal input signal;
error referred to best-fit line using linear regression
between PINHA, PINHB = −40 dBm and −10 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
1670||0.47
51
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
42
−1
−52
−22
22
0.7
1.37
50
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
OUTA, OUTB @ PINHA, PINHB = −16 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
44
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.25
+0.16
−0.6
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = −0.09 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.25 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.05 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = −0.23 dB
0.25
0.4
dB
dB
dB
dB
0.25
0.45
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
80
60
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
Input B-to-OUTA Isolation
60
dB
MEASUREMENT MODE,
900 MHz OPERATION
ADJA = 0.6 V, ADJB = 0.65 V; OUTA, OUTB shorted to
VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB, respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −10 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
925||0.54
54
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
49
−2
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
dBm
dBm
mV/dB
dBm
V
−56
−22
20.3
0.67
1.34
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
V
Rev. 0 | Page 3 of 40
ADL5519
Parameter
Conditions
Min
Typ
55
Max
Unit
dB
OUTP, OUTN Dynamic Gain Range
1 dB error
−40°C < TA < +85°C
48
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution OUTP, OUTN from 25°C
0.25
+0.25
−0.5
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = −0.08 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm
typical error = 0.3 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.17 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = −0.19 dB
0.25
0.4
dB
dB
dB
dB
0.25
0.4
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
75
50
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
Input B-to-OUTA Isolation
50
dB
MEASUREMENT MODE,
1.9 GHz OPERATION
ADJA = 0.5 V, ADJB = 0.55 V; OUTA, OUTB shorted to
VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB, respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −10 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
525||0.36
55
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
49
−4
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
−59
−22
18
0.62
1.28
55
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
48
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.2
+0.25
−0.5
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = −0.07 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.23 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.16 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = −0.22 dB
0.3
0.4
0.3
0.4
dB
dB
dB
dB
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
65
46
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Input B-to-OUTA Isolation
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
46
dB
Rev. 0 | Page 4 of 40
ADL5519
Parameter
Conditions
Min
Typ
Max
Unit
MEASUREMENT MODE,
2.2 GHz OPERATION
ADJA = 0.48 V, ADJB = 0.6 V; OUTA, OUTB shorted to
VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB, respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −10 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
408||0.34
55
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
50
−5
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
−60
−22
16.9
0.6
1.26
56
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
40
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.28
+0.3
−0.5
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = −0.07 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.25 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.17 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm
typical error = −0.22dB
0.25
0.4
dB
dB
dB
dB
0.25
0.4
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
60
46
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
Input B-to-OUTA Isolation
46
dB
MEASUREMENT MODE,
3.6 GHz OPERATION
ADJA = 0.35 V ADJB = 0.42; OUTA, OUTB shorted to
VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB, respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −10 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
187||0.66
54
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
44
−4
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
−58
−22.5
17
0.62
1.31
52
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
42
dB
Rev. 0 | Page 5 of 40
ADL5519
Parameter
Conditions
Min
Typ
Max
Unit
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.4
+0.6
−0.45
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = −0.07 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.27 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.31 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = −0.14 dB
0.25
0.45
0.3
dB
dB
dB
dB
0.5
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
40
20
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
Input B-to-OUTA Isolation
20
dB
MEASUREMENT MODE,
5.8 GHz OPERATION
ADJA = 0.58 V, ADJB = 0.7 V; OUTA, OUTB shorted to
VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −20 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
28||1.19
53
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
45
−2
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
−55
−22.5
20
0.68
1.37
53
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
46
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.25
+0.25
−0.4
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.02 dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.25 dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.13 dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.06 dB
0.3
0.4
0.3
0.5
dB
dB
dB
dB
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
45
48
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Input B-to-OUTA Isolation
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
48
dB
Rev. 0 | Page 6 of 40
ADL5519
Parameter
Conditions
Min
Typ
Max
Unit
MEASUREMENT MODE,
8 GHz OPERATION
ADJA = 0.72 V, ADJB = 0.82 V to GND; OUTA, OUTB shorted
to VSTA, VSTB; OUTP, OUTN shorted to FBKA, FBKB, respectively;
sinusoidal input signal; error referred to best fit line using
linear regression between PINHA, PINHB = −40 dBm and −20 dBm
Input Impedance
OUTA, OUTB 1 dB Dynamic Range
+10||−1.92
48
Ω||pF
dB
−40°C < TA < +85°C
1 dB error
1 dB error
38
0
dB
OUTA, OUTB Maximum Input Level
OUTA, OUTB Minimum Input Level
OUTA, OUTB, OUTP, OUTN Slope1
OUTA, OUTB Intercept1
Output Voltage (High Power In)
Output Voltage (Low Power In)
OUTP, OUTN Dynamic Gain Range
dBm
dBm
mV/dB
dBm
V
−48
−22
26
0.81
1.48
50
OUTA, OUTB @ PINHA, PINHB = −10 dBm
OUTA, OUTB @ PINHA, PINHB = −40 dBm
1 dB error
V
dB
−40°C < TA < +85°C
42
dB
Temperature Sensitivity
Deviation from OUTA, OUTB @ 25°C
−40°C < TA < +85°C, PINHA, PINHB = −16 dBm
25°C < TA < 85°C, PINHA, PINHB = −40 dBm
−40°C < TA < +25°C, PINHA, PINHB = −40 dBm
Distribution of OUTP, OUTN from 25°C
0.4
−0.1
+0.5
dB
dB
dB
25°C < TA < 85°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.2dB
−40°C < TA < +25°C, PINHA = −16 dBm, PINHB = −30 dBm,
typical error = 0.09dB
25°C < TA < 85°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = −0.07dB
−40°C < TA < +25°C, PINHA = −40 dBm, PINHB = −30 dBm,
typical error = 0.17 dB
0.3
0.5
0.3
0.5
dB
dB
dB
dB
Input A-to-Input B Isolation
Input A-to-OUTB Isolation
45
30
dB
dB
Frequency separation = 1 kHz, PINHA = −50 dBm,
PINHA – PINHB when OUTB/Slope = 1 dB
Frequency separation = 1 kHz, PINHB = −50 dBm,
PINHB – PINHA when OUTA/Slope = 1 dB
Input B-to-OUTA Isolation
30
dB
OUTPUT INTERFACE
OUTA, OUTB; OUTP, OUTN
OUTA, OUTB Voltage Range
VSTA, VSTB = 1.7 V, RF in = open
0.3
V
VSTA, VSTB = 0 V, RF in = open
VP − 0.4
0.09
VP − 0.15
10
V
V
V
mA
nF
OUTP, OUTN Voltage Range
FBKA, FBKB = open and OUTA < OUTB, RL ≥ 240 Ω to ground
FBKA, FBKB = open and OUTA > OUTB, RL ≥ 240 Ω to ground
Output held at 1 V to 1% change
Source/Sink Current
Capacitance Drive
Output Noise
1
INHA, INHB = 2.2 GHz, −10 dBm, fNOISE = 100 kHz,
CLPA, CLPB = open
10
nV/√Hz
Fall Time
Input level = no signal to −10 dBm, 80% to 20%,
CLPA, CLPB = 10 pF
Input level = no signal to −10 dBm, 80% to 20%,
CLPA, CLPB = open
12
6
ns
ns
Rise Time
Input level = −10 dBm to no signal, 20% to 80%,
CLPA, CLPB = 10 pF
Input level = −10 dBm to no signal, 20% to 80%,
CLPA, CLPB = open
16
8
ns
ns
Video Bandwidth
10
MHz
(or Envelope Bandwidth)
SETPOINT INTERFACE
Nominal Input Range
VSTA, VSTB
Input level = 0 dBm, measurement mode
Input level = –50 dBm, measurement mode
0.38
1.6
40
V
V
kΩ
Input Resistance
Controller mode, sourcing 50 μA
Rev. 0 | Page 7 of 40
ADL5519
Parameter
Conditions
Min
Typ
Max
Unit
DIFFERENCE LEVEL ADJUST
Input Voltage
Input Resistance
VLVL (Pin 6)
OUTP, OUTN = FBKA, FBKB
OUTP, OUTN = FBKA, FBKB
ADJA, ADJB
ADJA, ADJB = 0.9 V, sourcing 50 μA
ADJA, ADJB = open
VREF (Pin 5)
VP − 1
V
kΩ
100
TEMPERATURE COMPENSATION
Input Resistance
Disable Threshold Voltage
VOLTAGE REFERENCE
Output Voltage
13
VP − 0.4
kΩ
V
1.15
+26
−26
3/3
V
Temperature Sensitivity
−40°C < TA < +25°C; relative TA = 25°C
25°C < TA < 85°C; relative TA = 25°C
μV/°C
μV/°C
mA
Current Limit Source/Sink
TEMPERATURE REFERENCE
Output Voltage
Temperature Sensitivity
Current Limit Source/Sink
POWER-DOWN INTERFACE
Logic Level to Enable
Logic Level to Disable
Input Current
TEMP (Pin 19)
1.36
4.5
4/50
V
−40°C < TA < +125°C
mV/°C
mA/μA
PWDN (Pin 28)
Logic low enables
Logic high disables
Logic high PWDN = 5 V
Logic low PWDN = 0 V
PWDN low to OUTA, OUTB at 100% final value,
CLPA, CLPB = open, RF in = −10 dBm
0
V
V
μA
μA
μs
VP − 0.2
2
20
Enable Time
Disable Time
0.4
PWDN high to OUTA, OUTB at 10% final value,
CLPA, CLPB = open, RF in = 0 dBm
0.25
μs
POWER INTERFACE
Supply Voltage
VPSA, VPSB, VPSR
3.3
5.5
V
Quiescent Current
vs. Temperature
Disable Current
60
147
<1
mA
μA/°C
mA
−40°C ≤ TA ≤ +85°C
ADJA, ADJB = PWDN = VP
1 Slope and intercept are determined by calculating the best-fit line between the power levels of −40 dBm and −10 dBm at the specified input frequency.
Rev. 0 | Page 8 of 40
ADL5519
ABSOLUTE MAXIMUM RATINGS
Table 2.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
5.7 V
0 to VP
12 dBm
Supply Voltage: VPSA, VPSB, VPSR
VSET Voltage: VSTA, VSTB
Input Power (Single-Ended, Re: 50 Ω)
INHA, INLA, INHB, INLB
Internal Power Dissipation
θJA
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
420 mW
42°C/W
142°C
−40°C to +125°C
−65°C to +150°C
260°C
ESD CAUTION
Rev. 0 | Page 9 of 40
ADL5519
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
COMR
COMR
VPSB
ADJB
VREF
VLVL
CLPB
VSTB
1
2
3
4
5
6
7
8
24 COMR
23 COMR
22 VPSA
21 ADJA
20 VPSR
19 TEMP
18 CLPA
17 VSTA
PIN 1
INDICATOR
ADL5519
TOP VIEW
(Not to Scale)
NC = NO CONNECT
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
1
2
3
4
5
6
7
8
COMR
COMR
VPSB
ADJB
VREF
VLVL
CLPB
VSTB
NC
Connect via low impedance to common.
Connect via low impedance to common.
Positive Supply for Channel B. Apply 3.3 V to 5.5 V supply voltage.
Dual-Function Pin: Temperature Adjust Pin for Channel B and Power-Down Interface for OUTB.
Voltage Reference (1.15 V).
DC Common-Mode Adjust for Difference Output.
Loop Filter Pin for Channel B.
Setpoint Control Input for Channel B.
9
No Connect.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
OUTB
FBKB
OUTN
OUTP
FBKA
OUTA
NC
VSTA
CLPA
TEMP
VPSR
ADJA
VPSA
COMR
COMR
INHA
INLA
Output Voltage for Channel B.
Difference Op Amp Feedback Pin for OUTN Op Amp.
Difference Output (OUTB − OUTA + VLVL).
Difference Output (OUTA − OUTB + VLVL).
Difference Op Amp Feedback Pin for OUTP Op Amp.
Output Voltage for Channel A.
No Connect.
Setpoint Control Input for Channel A.
Loop Filter Pin for Channel A.
Temperature Sensor Output (1.3 V with 4.5 mV/°C Slope).
Positive Supply for Difference Outputs and Temperature Sensor. Apply 3.3 V to 5.5 V supply voltage.
Dual-Function Pin: Temperature Adjust Pin for Channel A and Power-Down Interface for OUTA.
Positive Supply for Channel A. Apply 3.3 V to 5.5 V supply voltage.
Connect via low impedance to common.
Connect via low impedance to common.
AC-Coupled RF Input for Channel A.
AC-Coupled RF Common for Channel A.
Connect via low impedance to common.
COMR
PWDN
COMR
COMR
INLB
Power-Down for Difference Output and Temperature Sensor.
Connect via low impedance to common.
Connect via low impedance to common.
AC-Coupled RF Common for Channel B.
AC-Coupled RF Input for Channel B.
INHB
Paddle
Internally connected to COMR.
Rev. 0 | Page 10 of 40
ADL5519
TYPICAL PERFORMANCE CHARACTERISTICS
VP = 5 V; TA = +25°C, −40°C, +85°C; CLPA, CLPB = 1 μF. Colors: +25°C black, −40°C blue, +85°C red.
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
2.0
1.5
1.0
0.5
0
2.0
1.0
1.5
OUTP
OUTN
N
1.0
0.5
0
0
P
–0.5
–1.0
–1.5
–2.0
–1.0
–2.0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
P
P
IN
IN
Figure 3. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude
at 100 MHz, Typical Device, ADJA, ADJB = 0.65 V, 0.7 V, Sine Wave,
Single-Ended Drive
Figure 6. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at 100 MHz,
Typical Device, ADJA, ADJB = 0.65 V, 0.7, Sine Wave, Single-Ended Drive,
PINHB = −30 dBm, Channel A Swept
2.0
1.5
1.5
1.0
2.0
1.0
0
1.0
0.5
0.5
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–1.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 4. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for 45 Devices, Frequency = 100 MHz,
ADJA, ADJB = 0.65 V, 0.7 V, Sine Wave, Single-Ended Drive
Figure 7. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices from
a Nominal Lot, Frequency = 100 MHz, ADJA, ADJB = 0.65 V, 0.7 V, Sine Wave,
Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
2.0
1.5
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
1.5
1.0
1.0
0.5
0.5
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–60
–50
–40
–30
P
–20
(dBm)
–10
0
10
–60
–50
–40
–30
P
–20
(dBm)
–10
0
10
IN
IN
Figure 5. Distribution of [OUTA − OUTB] Voltage Difference over Temperature
for 45 Devices from a Nominal Lot, Frequency = 100 MHz,
Figure 8. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude
at 900 MHz, Typical Device, ADJA, ADJB = 0.6 V, 0.65 V, Sine Wave,
Single-Ended Drive
ADJA, ADJB = 0.65 V, 0.7 V, Sine Wave, Single-Ended Drive
Rev. 0 | Page 11 of 40
ADL5519
2.0
2.0
1.5
2.0
1.0
0
1.0
0
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–1.0
–1.0
–2.0
–60
–2.0
10
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
P
P
IN
IN
Figure 9. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for 45 Devices, Frequency = 900 MHz,
ADJA, ADJB = 0.6 V, 0.65 V, Sine Wave, Single-Ended Drive
Figure 12. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 900 MHz, ADJA, ADJB = 0.6 V, 0.65 V, Sine
Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
0.20
0.15
0.10
0.05
0
2.0
1.5
1.0
0.5
0
2.0
1.0
0
–0.05
–0.10
–0.15
–0.20
–1.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 10. Distribution of [OUTA − OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 900 MHz,
ADJA, ADJB = 0.6 V, 0.65 V, Sine Wave, Single-Ended Drive
Figure 13. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude at
1.9 GHz, Typical Device, ADJA, ADJB = 0.5 V, 0.55 V, Sine Wave,
Single-Ended Drive
2.0
1.5
1.0
0.5
0
2.0
1.0
0
2.0
OUTP
OUTN
N
1.0
0
P
–1.0
–1.0
–2.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 11. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at
900 MHz, Typical Device, ADJA, ADJB = 0.6 V, 0.65 V, Sine Wave,
Single-Ended Drive; PINHB = −30 dBm, Channel A Swept
Figure 14. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for 45 Devices, Frequency = 1.9 GHz,
ADJA, ADJB = 0.5 V, 0.55 V, Sine Wave, Single-Ended Drive
Rev. 0 | Page 12 of 40
ADL5519
0.20
0.15
0.10
0.05
0
2.0
1.5
1.0
0.5
0
2.0
1.0
0
–0.05
–0.10
–0.15
–0.20
–1.0
–2.0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
P
P
IN
IN
Figure 15. Distribution of [OUTA – OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 1.9 GHz,
ADJA, ADJB = 0.5 V, 0.55 V, Sine Wave, Single-Ended Drive
Figure 18. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude at
2.2 GHz, Typical Device, ADJA, ADJB = 0.48 V, 0.6 V, Sine Wave,
Single-Ended Drive
2.0
1.5
1.0
0.5
0
2.0
1.0
0
2.0
OUTP
OUTN
N
1.0
0
P
–1.0
–1.0
–2.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 16. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at
1.9 GHz, with B Input Held at −30 dBm and A Input Swept, Typical Device,
ADJA, ADJB = 0.5 V, 0.55 V, Sine Wave, Single-Ended Drive,
PINHB = −30 dBm, Channel A Swept
Figure 19. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for at Least 45 Devices from a Nominal Lot,
Frequency = 2.2 GHz, ADJA, ADJB = 0.48 V, 0.6 V, Sine Wave, Single-Ended Drive
2.0
2.0
1.0
0
0.20
0.15
0.10
0.05
0
1.5
1.0
0.5
0
–0.05
–0.10
–0.15
–0.20
–0.5
–1.0
–1.5
–1.0
–2.0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 17. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 1.9 GHz, ADJA, ADJB = 0.5 V, 0.55 V,
Sine Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
Figure 20. Distribution of [OUTA – OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 2.2 GHz,
ADJA, ADJB = 0.48 V, 0.6 V, Sine Wave, Single-Ended Drive
Rev. 0 | Page 13 of 40
ADL5519
2.0
2.0
1.0
0
2.0
1.0
OUTP
OUTN
N
1.5
1.0
0.5
0
0
P
–1.0
–1.0
–2.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 21. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at 2.2 GHz,
Typical Device, ADJA, ADJB = 0.48 V, 0.6 V, Sine Wave, Single-Ended Drive,
Figure 24. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for 45 Devices from a Nominal Lot,
Frequency = 3.6 GHz, ADJA, ADJB = 0.35 V, 0.42 V, Sine Wave,
Single-Ended Drive
PINHB = −30 dBm, Channel A Swept
2.0
1.5
2.0
1.0
0
0.20
0.15
0.10
0.05
0
1.0
0.5
0
–0.05
–0.10
–0.15
–0.20
–0.5
–1.0
–1.5
–1.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 22. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 2.2 GHz, ADJA, ADJB = 0.48 V, 0.6 V,
Sine Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
Figure 25. Distribution of [OUTA – OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 3.6 GHz,
ADJA, ADJB = 0.35 V, 0.42 V, Sine Wave, Single-Ended Drive
2.0
1.5
1.0
0.5
0
2.0
1.0
0
2.0
1.5
1.0
0.5
0
2.0
1.0
0
OUTP
OUTN
N
P
–1.0
–1.0
–2.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 23. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude
at 3.6 GHz, Typical Device, ADJA, ADJB = 0.35 V, 0.42 V, Sine Wave,
Single-Ended Drive
Figure 26. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at
3.6 GHz, Typical Device, ADJA, ADJB = 0.35 V, 0.42 V, Sine Wave,
Single-Ended Drive; PINHB = −30 dBm, Channel A Swept
Rev. 0 | Page 14 of 40
ADL5519
1.5
1.0
2.0
1.0
0
0.20
0.15
0.10
0.05
0
0.5
0
–0.05
–0.10
–0.15
–0.20
–0.5
–1.0
–1.5
–1.0
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 27. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 3.6 GHz, ADJA, ADJB = 0.35 V, 0.42 V,
Sine Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
Figure 30. Distribution of [OUTA – OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 5.8 GHz,
ADJA, ADJB = 0.58 V, 0.7 V, Sine Wave, Single-Ended Drive
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
1.5
1.5
OUTP
OUTN
N
1.0
1.0
0.5
0.5
P
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 28. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude at
5.8 GHz, Typical Device, ADJA, ADJB = 0.58 V, 0.7 V, Sine Wave,
Single-Ended Drive
Figure 31. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at
5.8 GHz, Typical Device, ADJA, ADJB = 0.58 V, 0.7 V, Sine Wave,
Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
2.0
1.5
2.0
2.0
1.5
1.0
1.0
1.0
0.5
0.5
0
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–1.0
–2.0
–60
–60
–50
–40
–30
–20
(dBm)
IN
–10
0
10
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
Figure 29. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for at Least 15 Devices from Multiple Lots,
Frequency = 5.8 GHz, ADJA, ADJB = 0.58 V, 0.7 V,
Figure 32. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 5.8 GHz, ADJA, ADJB = 0.58 V, 0.7 V,
Sine Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
Sine Wave, Single-Ended Drive
Rev. 0 | Page 15 of 40
ADL5519
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
1.5
1.5
OUTP
OUTN
N
1.0
1.0
0.5
0.5
0
0
P
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
P
IN
IN
Figure 33. OUTA, OUTB Voltage and Log Conformance vs. Input Amplitude at
8 GHz, Typical Device, ADJA, ADJB = 0.72 V, 0.82 V, Sine Wave,
Single-Ended Drive
Figure 36. OUTP, OUTN Gain Error and Voltage vs. Input Amplitude at 8 GHz,
Typical Device, ADJA, ADJB = 0.72 V, 0.82 V, Sine Wave, Single-Ended Drive,
PINHB = −30 dBm, Channel A Swept
2.0
1.5
1.5
1.0
2.0
1.0
1.0
0.5
0.5
0
0
0
–0.5
–1.0
–1.5
–2.0
–0.5
–1.0
–1.5
–2.0
–1.0
–2.0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
10
–60
–50
–40
–30
–20
(dBm)
–10
0
P
P
IN
IN
Figure 34. Distribution of OUTA, OUTB Error over Temperature After Ambient
Normalization vs. Input Amplitude for 45 Devices from a Nominal Lot,
Frequency = 8 GHz, ADJA, ADJB = 0.72 V, 0.82 V, Sine Wave,
Single-Ended Drive
Figure 37. Distribution of [OUTP − OUTN] Gain Error and Voltage vs. Input
Amplitude over Temperature, After Ambient Normalization for 45 Devices
from a Nominal Lot, Frequency = 8 GHz, ADJA, ADJB = 0.72 V, 0.82 V,
Sine Wave, Single-Ended Drive, PINHB = −30 dBm, Channel A Swept
0.20
0.15
0.10
0.05
0
j1
j2
j0.5
j0.2
100MHz
–0.05
–0.10
–0.15
–0.20
0
0.2
0.5
1
2
900MHz
1900MHz
2200MHz
–j0.2
3600MHz
–j0.5
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
IN
3600MHz
–j2
Figure 35. Distribution of [OUTA − OUTB] Voltage Difference over
Temperature for 45 Devices from a Nominal Lot, Frequency = 8 GHz,
ADJA, ADJB = 0.72 V, 0.82 V, Sine Wave, Single-Ended Drive
–j1
Figure 38. Single-Ended Input Impedance (S11) vs. Frequency; ZO = 50 Ω
Rev. 0 | Page 16 of 40
ADL5519
10µ
1µ
INHA = 0dBm
INHB = 0dBm
INHA = –20dBm
INHB = –20dBm
INHA = –40dBm
INHB = –40dBm
INHA = OFF
MEAN: 1.14986
1200
1000
800
600
400
200
0
INHB = OFF
100n
10n
1n
1.12
1.14
1.16
1.18
1k
10k
100k
1M
10M
100M
VREF (V)
FREQUENCY (Hz)
Figure 39. Distribution of VREF Pin Voltage for 4000 Devices
Figure 42. Noise Spectral Density of OUTA, OUTB; CLPA, CLPB = Open
10µ
OUTN, INHA = 0dBm
OUTP, INHA = 0dBm
OUTN, INHA = –20dBm
OUTP, INHA = –20dBm
OUTN, INHA = –40dBm
OUTP, INHA = –40dBm
OUTN, INHA = OFF
OUTP, INHA = OFF
MEAN: 1.36332
1200
1000
800
600
400
200
0
1µ
100n
10n
1n
1.30
1.32
1.34
1.36
1.38
1.40
1.42
1k
10k
100k
1M
10M
100M
TEMP (V)
FREQUENCY (Hz)
Figure 40. Distribution of TEMP Pin Voltage for 4000 Devices
Figure 43. Noise Spectral Density of OUTP, OUTN; CLPA, CLPB = 0.1 μF,
Frequency = 2140 MHz
1.170
10µ
INHA = 0dBm
INHB = 0dBm
INHA = –20dBm
INHB = –20dBm
INHA = –40dBm
INHB = –40dBm
INHA = OFF
1.165
1.160
1.155
1.150
1.145
1.140
1.135
1.130
1.125
1.120
INHB = OFF
1µ
100n
10n
1n
–40
–15
10
35
60
85
1k
10k
100k
1M
10M
100M
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 41. Change in VREF Pin Voltage vs. Temperature for 45 Devices
Figure 44. Noise Spectral Density of OUTA, OUTB; CLPA, CLPB = 0.1 μF,
Frequency = 2140 MHz
Rev. 0 | Page 17 of 40
ADL5519
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
2.5
2.0
22.5
20.0
17.5
15.0
12.5
10.0
7.5
1.5
1.0
INHA, INHB = –40dBm
0.5
INHA, INHB = –30dBm
INHA, INHB = –20dBm
INHA, INHB = –40dBm
INHA, INHB = –30dBm
INHA, INHB = –20dBm
INHA, INHB = –10dBm
INHA, INHB = 0dBm
PWDN PULSE
0
–0.5
–1.0
–1.5
–2.0
–2.5
5.0
INHA, INHB = –10dBm
2.5
0
–2.5
TIME (ns)
TIME (µs)
Figure 45. Output Response to RF Burst Input for Various RF Input Levels,
Carrier Frequency = 900 MHz, CLPA = Open
Figure 48. Output Response Using Power-Down Mode for Various
RF Input Levels, Carrier Frequency = 900 MHz, CLPA = 0.1 μF
0.06
2.0
1.8
1.6
INCREASING
0.05
DECREASING
INHA, INHB = –40dBm
IINHA, INHB = –30dBm
INHA, INHB = –20dBm
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.04
0.03
0.02
0.01
0
INHA, INHB = –10dBm
3.0
3.2
3.4
3.6
3.8
4.0
4.2
4.4
4.6
4.8
5.0
PWDN, ADJA, ADJB VOLTAGE (V)
TIME (µs)
Figure 46. Output Response to RF Burst Input for Various RF Input Levels,
Carrier Frequency = 900 MHz, CLPA = 0.1 μF
Figure 49. Supply Current vs. VPWDN, VADJA, VADJB
2.5
2.0
22.5
20.0
17.5
15.0
12.5
10.0
7.5
1.5
1.0
0.5
0
RF OFF
INHA, INHB = –40dBm
INHA, INHB = –30dBm
INHA, INHB = –20dBm
INHA, INHB = –10dBm
INHA, INHB = 0dBm
PWDN PULSE
–0.5
–1.0
–1.5
–2.0
–2.5
5.0
2.5
0
–2.5
TIME (µs)
Figure 47. Output Response Using Power-Down Mode for Various
RF Input Levels, Carrier Frequency = 900 MHz, CLPA = Open
Rev. 0 | Page 18 of 40
ADL5519
THEORY OF OPERATION
The ADL5519 is a dual-channel, six-stage demodulating loga-
rithmic amplifier that is specifically designed for use in RF
measurement and power control applications at frequencies
up to 10 GHz. The ADL5519 is a derivative of the AD8317
logarithmic detector/controller core. The ADL5519 maintains
tight intercept variability vs. temperature over a 50 dB range.
Each measurement channel offers performance equivalent to
that of the AD8317. The complete circuit block diagram is
shown in Figure 50.
The maximum input with 1 dB log conformance error is typically
−5 dBm (re: 50 ꢀ). The noise spectral density referred to the input
is 1.15 nV/√Hz, which is equivalent to a voltage of 118 μV rms
in a 10.5 GHz bandwidth or a noise power of −66 dBm (re: 50 ꢀ).
This noise spectral density sets the lower limit of the dynamic
range. However, the low end accuracy of the ADL5519 is enhanced
by specially shaping the demodulating transfer characteristic to
partially compensate for errors due to internal noise. The common
pins provide a quality, low impedance connection to the printed
circuit board (PCB) ground. The package paddle, which is inter-
nally connected to the COMR pins, should also be grounded to
the PCB to reduce thermal impedance from the die to the PCB.
24
23
22
21
20
19
18
17
ADL5519
TEMP
The logarithmic function is approximated in a piecewise fashion
by six cascaded gain stages. For a more comprehensive explana-
tion of the logarithm approximation, refer to the AD8307 data
sheet. The cells have a nominal voltage gain of 9 dB each, with
a 3 dB bandwidth of 10.5 GHz. Using precision biasing, the gain
is stabilized over temperature and supply variations. The overall
dc gain is high because of the cascaded nature of the gain stages.
An offset compensation loop is included to correct for offsets
within the cascaded cells. At the output of each gain stage,
a square-law detector cell is used to rectify the signal.
25
26
27
28
29
30
16
15
14
13
12
11
INHA
INLA
NC
OUTA
FBKA
OUTP
OUTN
FBKB
CHANNEL A
LOG DETECTOR
COMR
PWDN
COMR
COMR
OUTA
OUTB
CHANNEL B
LOG DETECTOR
31
32
10
9
INLB
INHB
OUTB
NC
The RF signal voltages are converted to a fluctuating differential
current, having an average value that increases with signal level.
Along with the six gain stages and detector cells, an additional
detector is included at the input of each measurement channel,
providing a 54 dB dynamic range in total. After the detector
currents are summed and filtered, the following function is
formed at the summing node:
BIAS
4
1
2
3
5
6
7
8
Figure 50. Block Diagram
Each measurement channel is a full differential design using
a proprietary, high speed SiGe process that extends high frequency
performance. Figure 51 shows the basic diagram of the Channel A
signal path; its functionality is identical to that of the Channel B
signal path.
ID × log10(VIN/VINTERCEPT
)
(1)
where:
ID is the internally set detector current.
VIN is the input signal voltage.
V
INTERCEPT is the intercept voltage (that is, when VIN = VINTERCEPT
,
V
I
I
VSTA
the output voltage would be 0 V, if it were capable of going to 0 V).
V
OUTA
CLPA
DET
DET
DET
DET
INHA
INLA
Figure 51. Single Channel Block Diagram
Rev. 0 | Page 19 of 40
ADL5519
USING THE ADL5519
BASIC CONNECTIONS
VPSA
5pF
CURRENT
5pF
The ADL5519 is specified for operation up to 10 GHz. As a result,
low impedance supply pins with adequate isolation between
functions are essential. A power supply voltage between 3.3 V
and 5.5 V should be applied to VPSA, VPSB, and VPSR. Power
supply decoupling capacitors of 100 pF and 0.1 μF should be
connected close to these power supply pins (see Figure 53).
FIRST
GAIN
18.7kΩ
INHA
18.7kΩ
STAGE
2kΩ
A = 9dB
INLA
Gm
STAGE
OFFSET
COMP
The paddle of the LFCSP package is internally connected to
COMR. For optimum thermal and electrical performance, the
paddle should be soldered to a low impedance ground plane.
Figure 52. Single-Channel Input Interface
Although the input can be reactively matched, in general this
reactive matching is not necessary. An external 52.3 ꢀ shunt
resistor (connected on the signal side of the input coupling capaci-
tors, as shown in Figure 53) combines with the relatively high
input impedance to give an adequate broadband match of 50 ꢀ.
INPUT SIGNAL COUPLING
The ADL5519 inputs are differential but were characterized
and are generally used single ended. When using the ADL5519
in single-ended mode, the INHA, INHB pins must be ac-coupled,
and INLA, INLB must be ac-coupled to ground. Suggested
coupling capacitors are 47 nF, ceramic 0402-style capacitors for
input frequencies of 1 MHz to 10 GHz. The coupling capacitors
should be mounted close to the INHA, INHB and INLA, INLB
pins. The coupling capacitor values can be increased to lower
the input stage high-pass cutoff frequency.
The coupling time constant, 50 × CC/2, forms a high-pass corner
with a 3 dB attenuation at fHP = 1/(2π × 50 × CC ), where C1 =
C2 = C3 = C4 = CC. Using the typical value of 47 nF, this high-
pass corner is ~68 kHz. In high frequency applications, fHP should
be as large as possible to minimize the coupling of unwanted low
frequency signals. In low frequency applications, a simple RC
network forming a low-pass filter should be added at the input
for similar reasons. This low-pass filter should generally be placed
at the generator side of the coupling capacitors, thereby lowering
the required capacitance value for a given high-pass corner
frequency.
The high-pass corner is set by the input coupling capacitors and the
internal 10 pF high-pass capacitor. The dc voltage on INHA, INHB
and INLA, INLB is approximately one diode voltage drop below
the supply voltage.
Rev. 0 | Page 20 of 40
ADL5519
VPSR
C15
0.1µF
ADJA
VPSA
C7
100pF
C12
0.1µF
C9
C8
100pF
TEMP SENSOR
19
100pF
OUTPUT
VOLTAGE B
24
23
22
VPSA
21
ADJA
20
VPSR
18
17
COMR COMR
INHA
TEMP
CLPA
VSTA
C4
47nF
16
15
14
13
12
11
10
9
25
26
27
28
29
30
31
32
INHA
NC
R5
52.3Ω
INLA
OUTA
FBKA
OUTP
OUTN
FBKB
OUTB
NC
SETPOINT
VOLTAGE B
C3
47nF
COMR
PWDN
COMR
PWDN
DIFF OUT+
DIFF OUT–
ADL5519ACPZ
EXPOSED PADDLE
COMR
INLB
C2
47nF
OUTPUT
VOLTAGE B
R6
52.3Ω
INHB
INHB
C1
47nF
COMR COMR
VPSB
3
ADJB
4
VREF
5
VLVL
6
CLPB
7
VSTB
1
2
8
SETPOINT
VOLTAGE B
C10
100pF
C16
100pF
C5
0.1µF
VPOS
C11
0.1µF
VPSA
VPSB
VPSR
VPSB
ADJB
VREF
VLVL
Figure 53. Basic Connections for Operation in Measurement Mode
Rev. 0 | Page 21 of 40
ADL5519
TEMPERATURE SENSOR INTERFACE
SETPOINT INTERFACE—VSTA, VSTB
The ADL5519 provides a temperature sensor output capable of
driving 4 mA. The temperature scaling factor of the output voltage
is ~4.48 mV/°C. The typical absolute voltage at 27°C is approxi-
mately 1.36 V.
The VSTA, VSTB inputs are high impedance (40 kΩ) pins that
drive inputs of internal op amps. The VSET voltage appears across
the internal 1.5 kΩ resistor to generate a current, ISET. When a
portion of VOUT is applied to VSTA, VSTB, the feedback loop forces
VPSR
−ID × log10(VIN/VINTERCEPT) = ISET
If VSET = VOUT/2x, then ISET = VOUT/(2x × 1.5 kΩ).
The result is
(2)
INTERNAL
VPTAT
TEMP
12kΩ
V
OUT = (−ID × 1.5 kΩ × 2x) × log10(VIN/VINTERCEPT)
I
4kΩ
SET
V
20kΩ
SET
V
SET
COMR
Figure 54. TEMP Interface Simplified Schematic
20kΩ
VREF INTERFACE
1.5kΩ
The VREF pin provides a highly stable voltage reference. The
voltage on the VREF pin is 1.15 V, which is capable of driving
3 mA. An equivalent internal resistance is connected from
VREF to COMR for 3 mA sink capability.
COMM
COMM
Figure 55. VSTA, VSTB Interface Simplified Schematic
The slope is given by −ID × 2x × 1.5 kΩ = −22 mV/dB × x. For
example, if a resistor divider to ground is used to generate a VSET
voltage of VOUT/2, then x = 2. The slope is set to −880 V/decade
or −44 mV/dB. See the Altering the Slope section for additional
information.
POWER-DOWN INTERFACE
The operating and stand-by currents for the ADL5519 at 27°C
are approximately 60 mA and less than 1 mA, respectively. To
completely power down the ADL5519, the PWDN and ADJA,
ADJB pins must be pulled within 200 mV of the supply voltage.
When powered on, the output reaches to within 0.1 dB of its
steady-state value in about 0.5 μs; the reference voltage is avail-
able to full accuracy in a much shorter time.
OUTPUT INTERFACE—OUTA, OUTB
The OUTA, OUTB pins are driven by a push-pull output stage.
The rise time of the output is limited mainly by the slew on CLPA,
CLPB. The fall time is an RC-limited slew given by the load capaci-
tance and the pull-down resistance at OUTA, OUTB. There is
an internal pull-down resistor of 1.6 kΩ The resistive load at
OUTA, OUTB can be placed in parallel with the internal pull-
down resistor to reduce the discharge time. OUTA, OUTB can
source greater than 10 mA.
This wake-up response time varies, depending on the input
coupling network and the capacitance at the CLPA, CLPB pins.
PWDN disables the OUTP, OUTN, VREF, and TEMP pins. The
power-down pin, PWDN, is a high impedance pin.
The ADJA and ADJB pins, when pulled within 200 mV of the
supply voltage, disable OUTA and OUTB, respectively.
VPSA, VPSB
CLPA,
CLPB
OUTA,
OUTB
1.2kΩ
400Ω
COMR
Figure 56. OUTA, OUTB Interface Simplified Schematic
Rev. 0 | Page 22 of 40
ADL5519
DIFFERENCE OUTPUT—OUTP, OUTN
DESCRIPTION OF CHARACTERIZATION
The ADL5519 incorporates two operational amplifiers with rail-to-
rail output capability to provide a channel difference output.
The general hardware configuration used for most of the ADL5519
characterization is shown in Figure 59. The signal sources used
in this example are the E8251A from Agilent Technologies. The
INHA, INHB input pins are driven by Agilent signal sources,
and the output voltages are measured using a voltmeter.
As in the case of the output drivers for OUTA, OUTB, the output
stages have the capability of driving greater than 10 mA. OUTA
and OUTB are internally connected through 1 kΩ resistors to the
inputs of each op amp. The VLVL pin is connected to the positive
terminal of both op amps through 1 kΩ resistors to provide
level shifting. The negative feedback terminal is also made
available through a 1 kΩ resistor. The input impedance of VLVL
is 1 kΩ, and the input impedance of FBKA, FBKB is 1 kΩ. See
Figure 57 for the connections of these pins.
OUTA
SIGNAL
INA
–3dB
SOURCE
OUTB
OUTP
OUTN
VREF
TEMP
AGILENT
34970A
ADL5519
CHARACTERIZATION
BOARD
INB
METER/
SWITCHING
SIGNAL
SOURCE
–3dB
COMPUTER
CONTROLLER
VLVL VPSR
1kΩ
Figure 59. General Characterization Configuration
1kΩ
OUTA
OUTP
BASIS FOR ERROR CALCULATIONS
1kΩ
OUTB
The input power and output voltage are used to calculate the
slope and intercept values. The slope and intercept are calculated
using linear regression over the input range from −40 dBm to
−10 dBm. The slope and intercept terms are used to generate an
ideal line. The error is the difference in measured output voltage
compared to the ideal output line. This is a measure of the linearity
of the device. Refer to the Device Calibration section for more
information on calculating slope, intercept, and error.
1kΩ
FBKA COMR
VLVL VPSR
1kΩ
1kΩ
OUTB
OUTN
1kΩ
OUTA
1kΩ
FBKB COMR
Error from the linear response to the CW waveform is not
a measure of absolute accuracy because it is calculated using
the slope and intercept of each device. However, error verifies the
linearity and the effects of modulation on device response.
Similarly, at temperature extremes, error represents the output
voltage variations from the 25°C ideal line performance. Data
presented in the graphs is the typical error distribution observed
during characterization of the ADL5519.
Figure 57. OUTP, OUTN Interface Simplified Schematic
If OUTP is connected to FBKA, OUTP is given as
OUTP = OUTA − OUTB + VLVL
(3)
(4)
If OUTN is connected to FBKB, OUTN is given as
OUTN = OUTB − OUTA + VLVL
14
FBKA
Pulse response of the ADL5519 is 6 ns/8 ns rise/fall times. For
the fastest response time, the capacitance on OUTA, OUTB should
be kept to a minimum. Any capacitance on the output pins should
be counterbalanced with an equal capacitance on the CLPA, CLPB
pins to prevent ringing on the output.
13
12
11
OUTP
OUTN
FBKB
OUTA
OUTB
Figure 58. Op Amp Connections (All Resistors Are 1 kΩ ꢀ2%)
In this configuration, all four measurements, OUTA, OUTB,
OUTP, and OUTN, are available simultaneously. A differential
output can be taken from OUTP − OUTN, and VLVL can be
used to adjust the common-mode level for an ADC connection.
This is convenient not only for driving a differential ADC but
also for removing any temperature variation on VLVL.
Rev. 0 | Page 23 of 40
ADL5519
not perfectly follow the ideal VOUT vs. PIN equation, even within
its operating region. The error at the calibration points of −35
dBm and −11 dBm is equal to 0 dB, by definition.
DEVICE CALIBRATION
The measured transfer function of the ADL5519 at 2.2 GHz is
shown in Figure 60. The figure shows plots of both output voltage
vs. input power and calculated error vs. input power. As the input
power varies from −60 dBm to −5 dBm, the output voltage varies
from 1.7 V to about 0.5 V.
Figure 60 also shows error plots for the output voltage at
−40°C and +85°C. These error plots are calculated using the
slope and intercept at 25°C. This is consistent with calibration
in a mass-production environment, where calibration over
temperature is not practical.
2.00
1.75
1.50
1.25
2.0
1.5
ADJUSTING ACCURACY THROUGH CHOICE OF
CALIBRATION POINTS
1.0
0.5
In some applications, very high accuracy is required at one
power level or over a reduced input range. For example, in a
wireless transmitter, the accuracy of the high power amplifier
(HPA) is most critical at or close to full power.
V
V
OUT1
1.00
0
0.75
–0.5
–1.0
–1.5
–2.0
OUT2
0.50
0.25
0
In applications like AGC control loops, good linearity and
temperature performance are necessary over a large input power
range. The temperature crossover point (the power level at which
there is no drift in performance from −40°C to −80°C) can be
shifted from high power levels to midpower levels using the
method shown in the Temperature Compensation Adjustment
section. This shift equalizes the temperature performance over
the complete power range. The linearity of the transfer function
can be equalized by changing the calibration points.
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
IN
P
P
IN2
IN1
Figure 60. Transfer Function at 2.2 GHz with Calibration Points
Because slope and intercept vary from device to device, board-
level calibration must be performed to achieve the highest
accuracy. The equation for output voltage can be written as
Figure 61 demonstrates this equalization by changing the cali-
bration points used in Figure 60 to −46 dBm and −22 dBm. This
adjustment of the calibration points changes the linearity to greater
than 0.25 dB over a 50 dB dynamic range at the expense of a
slight decrease in linearity at power levels between −40 dBm
and −25 dBm.
V
OUT = Slope × (PIN − Intercept)
(6)
where:
Slope is the change in output voltage divided by the change in
input power, PIN, expressed in decibels (dB).
Intercept is the calculated power at which the output voltage
would be 0 V. Note that an output voltage of 0 V can never be
achieved.
Calibration points should be chosen to suit the application at hand.
In general, however, do not choose calibration points in the
nonlinear portion of the log amp transfer function (greater than
−10 dBm or less than −40 dBm, in this example).
In general, calibration is performed by applying two known
signal levels to the ADL5519 input and measuring the corre-
sponding output voltages. The calibration points are generally
chosen to be within the linear-in-dB operating range of the
device (see the Specifications section for more details).
2.00
1.75
1.50
2.0
1.5
1.0
V
V
OUT1
Calculation of the slope and intercept is accomplished using the
following equations:
1.25
0.5
1.00
0
Slope = (VOUT1 − VOUT2)/(PIN1 − PIN2
)
(7)
(8)
OUT2
0.75
0.50
0.25
0
–0.5
–1.0
–1.5
–2.0
Intercept = PIN1 − (VOUT1/Slope)
Once slope and intercept are calculated, an equation can be
written that calculates the input power based on the output
voltage of the detector.
P
IN (Unknown) = (VOUT1(MEASURED)/Slope) + Intercept
(9)
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
IN
The log conformance error of the calculated power is given by
P
P
IN2
IN1
Error (dB) = (VOUT(MEASURED) − VOUT(IDEAL))/Slope
(10)
Figure 61. Dynamic Range Extension by Choosing Calibration Points That
Are Close to the End of the Linear Range, 2.14 GHz
Figure 60 includes a plot of the error at 25°C, the temperature
at which the log amp is calibrated. Note that the error is not 0 dB
over the full dynamic range. This is because the log amp does
Rev. 0 | Page 24 of 40
ADL5519
Another way of presenting the error function of a log amp detector
is shown in Figure 62. In this example, the decibel (dB) error at
hot and cold temperatures is calculated with respect to the output
voltage at ambient. This is a key difference when compared to the
previous plots, in which all errors have been calculated with respect
to the ideal transfer function at ambient.
Compensating the device for temperature drift by using ADJA,
ADJB allows for great flexibility. To determine the optimal adjust
voltage, sweep ADJA, ADJB at ambient and at the desired
temperature extremes for a couple of power levels while
monitoring the output voltage. The point of intersection
determines the best adjust voltage. Some additional minor
tweaking may be required to achieve the highest level of tempera-
ture stability. With appropriate values, a temperature drift error
of typically 0.5 dB over the entire rated temperature range can be
achieved.
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
1.5
1.0
0.5
Table 4. Recommended ADJA, ADJB Voltage Levels
Frequency
100 MHz
900 MHz
1.9 GHz
2.2 GHz
3.6 GHz
5.8 GHz
8 GHz
Recommended ADJA, ADJB Voltage (Vꢀ
0
0.65, 0.7
0.6, 0.65
0.5, 0.55
0.48, 0.6
0.35, 0.42
0.58, 0.7
0.72, 0.82
–0.5
–1.0
–1.5
–2.0
–60
–50
–40
–30
–20
(dBm)
–10
0
10
P
IN
Figure 62. Error vs. Temperature with Respect to Output Voltage at 25°C,
2.14 GHz (Removes Transfer Function Nonlinearities at 25°C)
Proprietary techniques are used to compensate for the temperature
drift. The absolute value of compensation varies with frequency
and circuit board material.
With this alternative technique, the error at ambient becomes,
by definition, equal to 0 (see Figure 62). This value would be
valid if the device transfer function perfectly followed the ideal
of the VOUT = Slope × (PIN − Intercept) equation.
ADJA, ADJB are high impedance pins. The applied ADJA, ADJB
voltages can be supplied from VREF through a resistor divider.
Figure 63 shows a simplified schematic representation of the
ADJA, ADJB interface.
However, because an rms amp, in practice, never perfectly follows
this equation (especially outside of its linear operating range),
this plot tends to artificially improve linearity and extend the
dynamic range, unless enough calibration points are taken to
remove the error.
VREF
I
COMP
ADL5519
ADJA, ADJB
V
TADJ
Figure 62 is a useful tool for estimating temperature drift at
a particular power level with respect to the (nonideal) output
voltage at ambient.
TEMPERATURE COMPENSATION ADJUSTMENT
COMR
COMR
The ADL5519 temperature performance has been optimized to
ensure that the output voltage has minimum temperature drift
at −10 dBm input power. The applied voltage for the ADJA and
ADJB pins for some specified frequencies is listed in Table 4.
However, not all frequencies are represented in Table 4, and
experimentation may be required.
Figure 63. ADJA, ADJB Interface Simplified Schematic
Rev. 0 | Page 25 of 40
ADL5519
In most applications, the designer has the ability to adjust the
power going into the ADL5519 through the use of temperature-
stable couplers and accurate temperature-stable attenuators of
different values. When isolation is a concern, it is useful to
adjust the input power so the lowest expected detectable power
is not far from the lowest detectable power of the ADL5519 at
the frequency of operation.
ALTERING THE SLOPE
As discussed in the Setpoint Interface—VSTA, VSTB section,
the slope can readily be increased by scaling the amount of
output voltage at OUTA, OUTB that is fed back to the setpoint
interface, VSTA, VSTB. When the full signal from OUTA,
OUTB is applied to VSTA, VSTB, the slope has a nominal value of
−22 mV/dB. This value can be increased by including a voltage
divider between the OUTA, OUTB and VSTA, VSTB pins, as
shown in Figure 64.
The lowest detectable power point of the ADL5519 has little
variation from part to part. This equalizes the signals on both
channels at their lowest possible power level, which reduces the
overall isolation requirements and possibly adds attenuators to the
RF inputs of the device, reducing the RF channel input isolation
requirements.
ADL5519
V
OUTA, OUTB
VSTA, VSTB
OUT
R1
R2
Measuring the RF channel input to the other RF channel input
isolation is straightforward and is done by measuring the loss
on a network analyzer from one input to the other input. The
outcome is shown in the Specifications section of the data sheet.
Note that adding an attenuator in series with the RF signal
increases the channel input-to-input isolation by the value of
the attenuator.
Figure 64. External Network to Raise Slope
The approximate input resistance for VSTA, VSTB is 40 kΩ.
Scaling resistor values should be carefully selected to minimize
errors. Keep in mind that these resistors also load the output
pins and reduce the load-driving capabilities.
The isolation between one RF channel input and the other channel
output is a little more complicated. The easiest approach (which
was used in this datasheet) to measuring this isolation is to have
one channel set to the lowest power level it is expected to have
on its input (approximately −50 dBm in this data sheet) and
then increasing the power level on the other channel input until
the output of the low power channel changes by 22 mV. Because
−50 dBm is in the linear region of the detector, 22 mV equates
to a 1 dB change in the output.
Equation 11 can be used to calculate the resistor values.
SD
−22
⎛
⎜
⎝
⎞
⎟
⎠
R1= R2'
−1
(11)
where:
SD is the desired slope, expressed in millivolts/decibels (mV/dB).
R2' is the value of R2 in parallel with 40 kΩ.
For example, using R1 = 1.65 kΩ and R2 = 1.69 kΩ (R2' = 1.62 kΩ),
the nominal slope is increased to −44 mV/dB.
If the inputs to both RF channels are at the same frequency, the
isolation also depends on the phase shift between the RF signals
put into the ADL5519. This relationship can be demonstrated by
placing a high power signal on one RF channel input and a low
power signal slightly offset in frequency to the other RF channel.
When the slope is increased, the loop capacitor, CLPA, CLPB,
may need to be raised to ensure stability and to preserve a chosen
averaging time. The slope can be lowered by placing a voltage
divider after the output pin, following standard practices.
If the output of the low power channel is observed with an
oscilloscope, it has a ripple that looks similar to a full-wave
rectified sine wave with a frequency equal to the frequency
difference between the two channels, that is, a beat tone. The
magnitude of the ripple reflects the isolation at a specific phase
offset (note that two signals of slightly different frequencies act
like two signals with a constantly changing phase), and the
frequency of that ripple is directly related to the frequency offset.
CHANNEL ISOLATION
Isolation must be considered when using both channels of the
ADL5519 at the same time. The two isolation requirements that
should be considered are the isolation from one RF channel input
to the other RF channel input and the isolation from one RF
channel input to the other channel output. When using both
channels of the ADL5519, care should be taken in the layout to
isolate the RF inputs, INHA and INHB, from each other. Coupling
on the PC board affects both types of isolation.
The data shown in the Specifications section assumes worst-case
amplitude and phase offset. If the RF signals on Channel A and
Channel B are at significantly different frequencies, the input-to-
output isolation increases, depending on the capacitors placed on
CLPA, CLPB and the frequency offset of the two signals, due to
the response roll-off within the ADL5519.
Rev. 0 | Page 26 of 40
ADL5519
OUTPUT FILTERING
PACKAGE CONSIDERATIONS
Accurate power detection for signals with RF bursts is achieved
when the ADL5519 is able to respond quickly to the change in
RF power. For applications in which maximum video bandwidth
and, consequently, fast rise time are desired, it is essential that
the CLPA, CLPB pins have very little capacitance on them (some
capacitance reduces the ringing).
The ADL5519 uses a compact, 32-lead LFCSP. A large exposed
paddle on the bottom of the device provides both a thermal
benefit and a low inductance path to ground for the circuit.
To make proper use of this packaging feature, the PCB RF/dc
common-ground reference needs to make contact with the paddle
with as many vias as possible to lower inductance and thermal
impedance.
The nominal output video bandwidth of 10 MHz can be reduced
by connecting a ground-referenced capacitor (CFLT) to the CLPA,
CLPB pins, as shown in Figure 65. This is generally done to
reduce output ripple (at twice the input frequency for a
symmetric input waveform, such as a sinusoidal signal).
OPERATION ABOVE 8 GHz
The ADL5519 is specified for operation up to 8 GHz, but it
provides useful measurement accuracy over a reduced dynamic
range of up to 10 GHz. Figure 66 shows the performance of the
ADL5519 over temperature for a input frequency of 10 GHz. This
high frequency performance is achieved using the configuration
shown in Figure 53. The dynamic range shown is reduced from the
typical device performance, but the ADL5519 can provide 30 dB of
measurement range with less than 3 dB of linearity error.
ADL5519
I
I
LOGA,
LOGB
OUTA, OUTB
CLPA, CLPB
+4
1.5kΩ
3.5pF
C
FLT
Implementing an impedance match for frequencies greater than
8 GHz can improve the sensitivity of the ADL5519 and its measure-
ment range.
Figure 65. Lowering the Post Demodulation Bandwidth
CFLT is selected using the following equation:
1
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
4.0
(12)
3.0
CFLT
=
− 3.5 pF
(
π × 1.5 kΩ × Video Bandwidth
)
2.0
The video bandwidth should typically be set to a frequency less
than or equal to approximately 1/10 the minimum input frequency.
There are no problems with putting large capacitor values on the
CLPA, CLPB pins. These large capacitor values ensure that the
output ripple of the demodulated log output, which is at twice
the input frequency, is well filtered. Signals with modulation
may need additional filtering (a larger CFLT capacitance) to
remove modulation bleedthrough.
1.0
0
–1.0
–2.0
–3.0
–4.0
–40
–35
–30
–25
–20
–15
–10
–5
0
P
(dBm)
IN
Figure 66. VOUT and Log Conformance vs. Input Amplitude at 10 GHz,
Over Temperature, ADJA, ADJB = 1.8 V, 1.8 V
Rev. 0 | Page 27 of 40
ADL5519
APPLICATIONS INFORMATION
MEASUREMENT MODE
For a square wave input signal in a 200 ꢀ system
P
INTERCEPT (dBm) =
The ADL5519 is placed in measurement mode by connecting
OUTA, OUTB to VSTA, VSTB, respectively. The part has an offset
voltage, a negative slope, and a VOUTA, VOUTB measurement inter-
cept at the high end of its input signal range.
−1 dBV − 10 × log10[(200 ꢀ × 1 mW/1Vrms2)] = +6 dBm
More information about the intercept variation dependence upon
waveform can be found in the AD8313 and AD8307 data sheets.
The output voltage vs. input signal voltage of the ADL5519 is
linear-in-dB over a multidecade range. The equation for this
function is of the following form:
As the input signals to Channel A and Channel B are swept over
their nominal input dynamic range of −5 dBm to −55 dBm, the
output swings from 0.5 V to 1.6 V. The voltages of OUTA, OUTB
are also internally applied to a difference amplifier with a gain
of 1. When the input power is swept, OUTP swings from approxi-
mately 0.5 V to 1.75 V, and OUTN swings from 1.75 V to 0.5 V.
The VLVL pin sets the common-mode voltage for OUTP, OUTN.
An output common-mode voltage of ≤1.15 V can be set using
a resistor divider between the VREF and VLVL pins. Measurement
of large differences between INHA, INHB can be affected by
on-chip signal leakage.
V
OUT = x × VSLOPE/DEC × log10(VIN/VINTERCEPT) =
x × VSLOPE/dB × 20 × log10(VIN/VINTERCEPT
where:
x is the feedback factor in VSET = VOUT/x.
(13)
(14)
)
V
V
SLOPE/DEC is nominally −440 mV/decade or −22 mV/dB.
INTERCEPT is the x-axis intercept of the linear-in-dB portion of
the VOUT vs. VIN curve.
INTERCEPT is 2 dBV for a sinusoidal input signal.
V
CONTROLLER MODE
An offset voltage, VOFFSET, of 0.45 V is internally added to
the detector signal so that the minimum value for VOUT is
x × VOFFSET. If x = 1, the minimum VOUT value is 0.45 V.
In addition to being a measurement device, the ADL5519 can
also be configured to set and control signal levels. Each of the two
log detectors can be separately configured to set and control the
output power level of a VGA or variable voltage attenuator (VVA).
See the Controller Mode section of the AD8317 datasheet for more
information on running a single channel in controller mode.
The slope is very stable vs. process and temperature variation.
When Base-10 logarithms are used, VSLOPE/DEC represents the
volts/decade. A decade corresponds to 20 dB; VSLOPE/DEC/20 =
VSLOPE/dB represents the slope in V/dB.
Alternatively, the two log detectors can be configured to measure
and control the gain of an amplifier or signal chain. The channel
difference outputs can be used to control a feedback loop to the
ADL5519 RF inputs. A capacitor connected between FBKA and
OUTP forms an integrator, keeping in mind that the on-chip 1 kꢀ
feedback resistor forms a 0. (The value of the on-chip resistors can
vary as much as 20ꢁ with manufacturing process variation.)
If Channel A is driven and Channel B has a feedback loop from
OUTP through a VGA, OUTP integrates to a voltage value
such that
As noted in Equation 13 and Equation 14, the VOUT voltage has
a negative slope. This is also the correct slope polarity to control
the gain of many VGAs in a negative feedback configuration.
Because both the slope and intercept vary slightly with frequency,
see the Specifications section for application-specific values for
slope and intercept.
Although demodulating log amps respond to input signal
voltage and not input signal power, it is customary to discuss
the amplitude of high frequency signals in terms of power. In
this case, the characteristic impedance of the system, Z0, must
be known to convert voltages to their corresponding power levels.
The following equations are used to perform this conversion:
2
OUTB = (OUTA + VLVL)/2
(18)
The output value from OUTN may or may not be useful. It is
given by
P (dBm) = 10 × log10(Vrms /(Z0 × 1 mW))
P (dBV) = 20 × log10(Vrms/1 Vrms)
(15)
(16)
(17)
OUTN = 0 V
(19)
for VLVL < OUTA/3.
Otherwise,
2
P (dBm) = P (dBV) − 10 × log10(Z0 × 1 mW/1 Vrms
)
For example, PINTERCEPT, for a sinusoidal input signal expressed
in terms of dBm (decibels referred to 1 mW), in a 50 ꢀ system is
OUTN = (3 × VLVL − OUTA)/2
(20)
P
P
INTERCEPT (dBm) =
INTERCEPT (dBV) − 10 × log10(Z0 × 1 mW/1 Vrms2) =
2 dBV − 10 × log10(50 × 10−3) = 15 dBm
Rev. 0 | Page 28 of 40
ADL5519
If VLVL is connected to the OUTA pin, OUTB is forced to equal
OUTA through the feedback loop. This flexibility provides the
capability to measure one channel operating at a given power
level and frequency while forcing the other channel to a desired
power level at another frequency. The voltages applied to the
ADJA, ADJB pins should be selected carefully to minimize
temperature drift of the output voltage. The temperature drift is
the statistical sum of the drift from Channel A and Channel B.
As stated previously, VLVL can be used to force the slaved
channel to operate at a different power from the other channel.
If an inversion is necessary in the feedback loop, OUTN can be
used as the integrator by placing a capacitor between OUTN,
OUTP. This changes the output equation for OUTB and OUTP to
OUTB = 2 × OUTA − VLVL
For VLVL < OUTA/2,
OUTN = 0 V
(21)
(22)
(23)
Otherwise,
OUTN = 2 × VLVL − OUTA
Equation 18 to Equation 23 are valid when Channel A is driven
and Channel B is slaved through a feedback loop. When Channel B
is driven and Channel A is slaved, these equations can be altered
by changing OUTB to OUTA and OUTN to OUTP.
If the two channels are forced to operate at different power levels,
some static offset occurs due to voltage drops across metal wiring
in the IC.
Rev. 0 | Page 29 of 40
ADL5519
If a gain other than 0 dB is required, an attenuator can be used
in one of the RF paths, as shown in Figure 67. Alternatively,
power splitters or directional couplers of different coupling
factors can be used. Another convenient option is to apply a
voltage on VLVL other than OUTA. Refer to Equation 18 and
the Controller Mode section for more detail.
AUTOMATIC GAIN CONTROL
Figure 67 shows how the ADL5519 can be connected to provide
automatic gain control to an amplifier or signal chain. Additional
pins are omitted for clarity. In this configuration, both detectors
are connected in measurement mode with appropriate filtering
being used on CLPA, CLPB to provide adequate filtering of the
demodulated log output. OUTA, however, is also connected to
the VLVL pin of the on-board difference amplifier. In addition,
the OUTP output of the difference amplifier drives a variable gain
element (either VVA or VGA) and is connected back to the FBKA
input via a capacitor so that it is operating as an integrator.
If the VGA/VVA has a negative gain control sense, the OUTN
output of the difference amplifier can be used with the integrating
capacitor tied back to FBKB. Alternatively, the inputs could be
swapped.
The choice of the integrating capacitor affects the response time
of the AGC loop. Small values give a faster response time but
may result in instability, whereas larger values reduce the response
time. Capacitors that are too large can also cause oscillations due
to the capacitive drive capability of the op amp. In automatic gain
control, the capacitors on CLPA and CLPB, which perform the
filtering of the demodulated log output, must still be used and
also affect loop response time.
Assume that OUTA is much bigger than OUTB. Because OUTA
also drives VLVL, this voltage is also present on the noninverting
input of the op amp driving OUTP. This results in a current flow
from OUTP through the integrating capacitor into the FBKA input.
This results in the voltage on OUTP increasing. If the gain control
transfer function of the VGA/VVA is positive, this increases the
gain, which in turn increases the input signal to INHA. The
output voltage on the integrator continues to increase until the
power on the two input channels is equal, resulting in a signal
chain gain of unity.
Rev. 0 | Page 30 of 40
ADL5519
DIRECTIONAL
OR
POWER SPLITTER
DIRECTIONAL
OR
POWER SPLITTER
VGA/VVA
CLPA
ADL5519
VSTA
0.1µF
OUTA
CHANNEL A
LOG DETECTOR
INHA
INLA
50Ω
C
INT
ATTENUATOR
FBKA
OUTP
0.1µF
0.1µF
DIFF OUT +
OUTN
FBKB
OUTB
INLB
INHB
CHANNEL B
LOG DETECTOR
50Ω
0.1µF
VSTB
VLVL
CLPB
Figure 67. Operation in Controller Mode for Automatic Gain Control
Rev. 0 | Page 31 of 40
ADL5519
Figure 68 shows the results of the circuit in Figure 69. The input
power is swept from −47 dBm to +8 dBm. The output power is
measured, and the gain is calculated at +25°C, −40°C and +85°C.
With equal valued couplers used on the input and output, the
expected gain is about 0 dB. Due to path loss differences and
differences due to using two separate frequencies, the average
gain is about 2.5 dB. In this configuration, approximately 50 dB of
control range with 0.2 dB drift over temperature is obtained. For
an auxiliary receiver, less than 5 dB of variation is expected over
temperature. If the power levels are chosen to coincide with the
temperature crossover point, approximately 0.1 dB of temperature
variation can be expected. Most of the gain change over input
power level is caused by performance differences at different
frequencies.
GAIN-STABLE TRANSMITTER/RECEIVER
There are many applications for a transmitter or receiver with
a highly accurate temperature-stable gain. For example, a multi-
carrier, base station high power amplifier (HPA) using digital
predistortion can have a power detector and an auxiliary receiver.
The power detector and all parts associated with it can be removed
if the auxiliary receiver has a highly accurate temperature-stable
gain. With a set gain receiver, the ADC on the auxiliary receiver
can determine not only the overall power being transmitted but
also the power in each carrier for a multicarrier HPA. Without the
use of a detector, the auxiliary receiver is very difficult to calibrate
accurately over temperature due to the part-to-part variation of the
components in the auxiliary receiver.
In controller mode, the ADL5519 can be used to hold the receiver
gain constant over a broad input power/temperature range. In this
application, the difference outputs are used to hold the receiver gain
constant. Figure 69 shows an example of how this can be done.
4.0
GAIN +85°C
GAIN +25°C
GAIN –40°C
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
The RF input is connected to INHB, using a 19 dB coupler, and
the down-converted output from the signal chain is connected
to INHA, using a 19 dB coupler. A 100 pF capacitor is connected
between FBKA and OUTP, forming an integrator. OUTA is
connected to VLVL, forcing OUTP to adjust the VGA so that
OUTB is equal to OUTA. The circuit gain is set by the difference
in the coupling values of the input and output couplers and the
differences in path losses to the detector. Because they are operating
at different frequencies, the appropriate voltages on the ADJA,
ADJB pins must be supplied. ADJA is set to 0.6 V and ADJB is
set to 0.65 V to set the −40oC/+85oC crossover point toward the
center of the input power range. Using the suggested ADJA value
for 80 MHz would put the crossover point at a higher power level.
–50
–40
–30
–20
–10
0
10
P
(dBm)
IN
Figure 68. Performance of Gain-Stable Receiver
Rev. 0 | Page 32 of 40
ADL5519
RFIN
900MHz
IFOUT
80MHz
AD8342
820MHZ
0Ω 0Ω
454Ω
0Ω 0Ω
454Ω
ADL5330
90MHz
LPF
19dB
COUPLING
19dB
COUPLING
MODE SEL
0V TO 1.2V
POWER DOWN
C2
C4
C1
R31
52.3
C3
R30
52.3
5V
5V
47NF
47NF
47NF
47NF
C12
0.1UF
C7
100PF
C11
C16
0.1UF
100PF
25
32
31
30 29
28 27
26
1
2
3
0.6V
24
0.65V
23
22
VPSB
ADJB
VPSA
ADJA
4
5
6
21
20
19
18
17
ADL5519
VREF
VREF
VLVL
CLPB
VSTB
VPSR
TEMP
CLPA
VSTA
C15
0.1UF
C8
100PF
EXPOSED PADDLE
7
C10
0.1 UF
8
C9
0.1 UF
12
13
14
15
9
10
11
16
TEMPERATURE
SENSOR OUT
100 PF
B CHANNEL OUT
DIFF OUT–
Figure 69. Gain-Stable Receiver Circuit
Rev. 0 | Page 33 of 40
ADL5519
Each ADL5519 detector has a nominal input range from −5 dBm
to −55 dBm. In this example, the maximum forward power of
+50 dBm is attenuated to −10 dBm at the detector input (this
attenuation is achieved through the combined coupling factor
of the directional coupler and the subsequent attenuation). This
puts the maximum power at the detector comfortably within its
linear operating range. Also, when the HPA is transmitting at its
lowest power level of +20 dBm, the detector input power is
−40 dBm, which is still within its input operating range.
MEASURING VSWR
Measurement of reflected power in wireless transmitters is a critical
auxiliary function that is often overlooked. The power reflected
back from an antenna is specified using either the voltage standing
wave ratio (VSWR) or the reflection coefficient (also referred to
as the return loss). Poor VSWR can cause shadowing in a TV
broadcast system because the signal reflected off the antenna
reflects again off the power amplifier and is then rebroadcast. In
wireless communications systems, shadowing produces multipath-
like phenomena. Poor VSWR can degrade transmission quality;
the catastrophic VSWR that results from damage to a co-axial
cable or to an antenna can, at its worst, destroy the transmitter.
50dBm
40dBm
30dBm
20dBm
10dBm
0dBm
FORWARD
POWER
REVERSE
POWER
RANGE
RANGE
55dB
The ADL5519 delivers an output voltage proportional to the log
of the input signal over a large dynamic range. A log-responding
device offers a key advantage in VSWR measurement applications.
To compute gain or reflection loss, the ratio of the two signal
powers (either OUTPUT/INPUT or REVERSE/FORWARD)
must be calculated. An analog divider must be used to perform
this calculation with a linear-responding diode detector, but
only simple subtraction is required when using a log-responding
detector (because log(A/B) = log(A) − log(B)).
ATTENUATION
DECTOR A/B
INPUT RANGE
60dB
ATTENUATION
–10dBm
–20dBm
–30dBm
–40dBm
–50dBm
–60dBm
POWER
AT INPUT A
POWR
AT INPUT B
A dual RF detector has an additional advantage compared to
a discrete implementation. There is a natural tendency for two
devices (RF detectors, in this case) to behave similarly when they
are fabricated on a single piece of silicon, with both devices having
similar temperature drift characteristics, for example. At the
summing node, this drift cancels to yield a result that is more
temperature stable.
Figure 70. ADL5519 VSWR Level Planning
Careful level planning should be used to match the input power
levels in a dual detector and to place these power levels within
the linear operating range of the detectors. The power from the
reverse path is attenuated by 55 dB, which means that the detector
is capable of measuring reflected power up to 0 dB. In most appli-
cations, the system is designed to shut down when the reflection
coefficient degrades below a certain minimum (for example,
10 dB). Full reflection is allowed when using the ADL5519 because
of its large dynamic range. In the case of very little reflection
(a return loss of 20 dB) and the HPA is transmitting +20 dBm, the
reverse path detector has an input power of −55 dBm.
In Figure 71, two directional couplers are used, one to measure
forward power and one to measure reverse power. Additional
attenuation is required before applying these signals to the
detectors. The ADL5519 dual detector has a measurement range
of 50 dB in each detector. Care must be taken in setting the attenua-
tion levels so the reflection coefficient can be measured over the
desired output power range.
The application circuit in Figure 71 provides a direct reading of
return loss, forward power, and reverse power. If the forward and
reverse phase difference (phase angle) is needed to optimize the
power delivered to the antenna, the AD8302 should be used.
It provides one output that represents the return loss and one
output that represents the phase difference between the two
signals. However, the AD8302 does not provide the absolute
forward or reverse power.
The level planning used in this example is graphically depicted
in Figure 70. In this example, the expected output power range
from the HPA is 30 dB, from 20 dBm to 50 dBm. Over this
power range, the ADL5519 can accurately measure reflection
coefficients from 0 dB (short, open, or load) to −20 dB.
Rev. 0 | Page 34 of 40
ADL5519
P
= 20dBm TO 50dBm
OUT
HPA
VSTA
20dB
35dB
20dB
40dB
TEMP
ADL5519
0.1µF
FORWARD
POWER
OUTA
FBKA
OUTP
OUTN
FBKB
OUTB
CHANNEL A
LOG DETECTOR
INHA
52.3Ω
ADC
RETURN
LOSS
MICROPROCESSOR/
DSP
P
= –10dBm TO
–40dBm
ADC
ADC
IN
OUTA
OUTB
REVERSE
POWER
CHANNEL B
LOG DETECTOR
0.1µF
INHB
52.3Ω
BIAS
P
= –5dBm TO
–55dBm
IN
VSTB
Figure 71. ADL5519 Configuration for Measuring Reflection Coefficients
Rev. 0 | Page 35 of 40
ADL5519
EVALUATION BOARD
CONFIGURATION OPTIONS
Table 5. Evaluation Board (Rev. A) Configuration Options
Component
Description
Default Conditions
VPOS, VPSB, VPSR, Supply and Ground Connections.
Not applicable
GND, GND1, GND3
VPOS, VPSB, and VPSR are internally connected.
GND, GND1, and GND3 are internally connected.
R0A, R0B, R5, R6,
R30, R31, C1, C2,
C3, C4
Input Interface.
R30, R31 = 52.3 Ω (Size 0402),
C1 to C4 = 47 nF (Size 0402)
R0A, R0B = 0 Ω
The 52.3 Ω resistors in the R30 and R31 positions combine with the ADL5519
internal input impedance to give a broadband input impedance of about 50 Ω.
C1, C2, C3, and C4 are dc-blocking capacitors. A reactive impedance match can
be implemented by replacing R5, R6, R30, and R31 with an inductor and by
replacing C1, R0A and C4, R0B with appropriately valued capacitors.
R5, R6 = open
R14
Temperature Sensor Interface.
R14 = open (Size 0603)
Temperature sensor output voltage is available at the test point labeled TEMP.
R14 can be used as a pull-down resistor.
R13, R17, R18,
R19, R27, R28,
R29
Temperature Compensation Interface.
R13, R17, R18, R19, R28, R29 = open
(Size 0603)
R27 = 0 Ω (Size 0603)
A voltage source at ADJA, ADJB can be used to optimize the temperature
performance for various input frequencies. The pads for R27/R28 or R27/R29 can
be used for voltage dividers from the VREF node to set the ADJA, ADJB voltages
at different frequencies. The individual log channels can be disabled by installing
0 Ω resistors at R18 and R19.
R8, R12, R15, R16, Output Interface, Measurement Mode.
R8, R12, R20, R21 = 0 Ω (Size 0603)
R15, R16, R22, R23 = open (Size 0603)
C13, C14 = open (Size 0603)
R20, R21, R22,
R23, C13, C14
In measurement mode, a portion of the output voltage is fed back to VSTA, VSTB via
R8, R12. The magnitude of the slope of the OUTA, OUTB output voltage response
can be increased by reducing the portion of VOUTA, VOUTB that is fed back to VSTA,
VSTB. The slope can be decreased by implementing a voltage divider by using
R20 and R16 or R21 and R15. R20 and R21 can also be used as a back-terminating
resistor or as part of a single-pole, low-pass filter.
R8, R12, R22, R23
Output Interface, Controller Mode.
R8, R12, R22, R23 = open (Size 0603)
In this mode, the 0 Ω resistors must be removed, leaving R8 and R12 open. In
controller mode, the ADL5519 can control the gain of an external component.
A setpoint voltage is applied to VSTA, VSTB, the value of which corresponds to
the desired RF input signal level applied to the corresponding ADL5519 RF input.
A sample of the RF output signal from this variable-gain component is selected,
typically via a directional coupler, and applied to ADL5519 RF input. The voltage
at OUTA, OUTB is applied to the gain control of the variable gain element. A control
voltage is applied to VSTA, VSTB. The magnitude of the control voltage can
optionally be attenuated via the voltage divider comprising R8, R12 and R22,
R23; or a capacitor can be installed in the R22, R23 position to form a low-pass
filter along with R8, R12.
R3, R4, R11, R24,
R25, R26, C7, C8,
Power Supply Decoupling.
The nominal supply decoupling consists of a 100 pF filter capacitor placed
R3, R4, R11, R24, R25, R26 = 0 Ω
(Size 0603)
C11, C12, C15, C16 physically close to the ADL5519 and a 0.1 μF capacitor placed nearer to each
power supply input pin.
C7, C8, C11 = 100 pF (Size 0603)
C12, C15, C16 = 0.1 μF (Size 0603)
R1, R2, R9, R10
C9, C10
Output Interface, Difference.
R9 and R10 can be replaced with a capacitor to form an integrator for constant
gain controller mode
R1, R2, R9, R10 = 0 Ω (Size 0603)
C9, C10 = 1000 pF (Size 0603)
Filter Capacitor.
The low-pass corner frequency of the circuit that drives OUTA, OUTB can be
lowered by placing a capacitor between CLPA, CLPB and ground. Increasing this
capacitor increases the overall rise/fall time of the ADL5519 for pulsed input
signals. See the Output Filtering section for more details.
R7, C6
VLVL Interface.
R7 = open (Size 0603)
VREF can be used to drive VLVL through a voltage divider formed using R7 and C6. C6 = open (Size 0603)
Rev. 0 | Page 36 of 40
ADL5519
EVALUATION BOARD SCHEMATIC AND ARTWORK
6 8 0 8 - 1 9 0 6
T
M A S S M
A T O U
3
0 6 R 0
3 0 6 R 0
SMASMT
N I H A
A L I N
A T O U
K A F B
SMASMT
P T O U
T
M A S S M
D N P W
P T O U
N T O U
K B F B
D N P W
R M C O
N T O U
B L I N
N I H B
SMASMT
B T O U
3 0 6 R 0
6 0 3 R
B T O U
T
A S M S M
T
M A S S M
6 0 3 R
3
0 6 R 0
Figure 72. Evaluation Board Schematic
Rev. 0 | Page 37 of 40
ADL5519
Figure 73. Top Side Layout
Figure 75. Bottom Side Layout
Figure 76. Bottom Side Silkscreen
Figure 74. Top Side Silkscreen
Rev. 0 | Page 38 of 40
ADL5519
OUTLINE DIMENSIONS
5.00
BSC SQ
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
25
32
1
24
0.50
BSC
PIN 1
INDICATOR
TOP
VIEW
2.85
2.70 SQ
2.55
4.75
BSC SQ
EXPOSED
PAD
(BOT TOM VIEW)
0.50
0.40
0.30
17
16
8
9
0.20 MIN
3.50 REF
0.80 MAX
1.00
0.85
0.80
12° MAX
0.65 TYP
0.05 MAX
0.02 NOM
0.30
0.25
0.18
SEATING
PLANE
COPLANARITY
0.08
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2
Figure 77. 32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
5 mm × 5 mm Body, Very Thin Quad Lead
(CP-32-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5519ACPZ-R71
ADL5519ACPZ-R21
ADL5519ACPZ-WP1, 2
ADL5519-EVALZ1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
Package Option
CP-32-8
CP-32-8
32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
32-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Evaluation Board
CP-32-8
1 Z = RoHS Compliant Part.
2 WP = waffle pack.
Rev. 0 | Page 39 of 40
ADL5519
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06198-0-1/08(0ꢀ
Rev. 0 | Page 40 of 40
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