ADG849YKSZ-REEL [ADI]

3 V/5 V CMOS 0.5 ohm SPDT/2:1 Mux in SC70; 3 V / 5 V CMOS 0.5欧姆SPDT / 2 : 1多路复用器,SC70封装
ADG849YKSZ-REEL
型号: ADG849YKSZ-REEL
厂家: ADI    ADI
描述:

3 V/5 V CMOS 0.5 ohm SPDT/2:1 Mux in SC70
3 V / 5 V CMOS 0.5欧姆SPDT / 2 : 1多路复用器,SC70封装

复用器 光电二极管
文件: 总12页 (文件大小:348K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
3 V/5 V CMOS  
0.5 Ω SPDT/2:1 Mux in SC70  
ADG849  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Ultralow on-resistance:  
0.5 Ω typical  
ADG849  
S2  
0.8 Ω maximum at 5 V supply  
Excellent audio performance, ultralow distortion:  
0.13 Ω typical  
0.24 Ω maximum RON flatness  
High current carrying capability:  
400 mA continuous current  
600 mA peak current at 5 V  
D
S1  
IN  
SWITCHES SHOWN  
FOR A LOGIC 1 INPUT  
Figure 1.  
Automotive temperature range: –40°C to +125°C  
Rail-to-rail operation  
Typical power consumption (<0.01 µW)  
Pin-compatible upgrade for the ADG749 and ADG779  
APPLICATIONS  
Cellular phones  
PDAs  
Battery-powered systems  
Audio and video signal routing  
Modems  
PCMCIA cards  
Hard drives  
Relay replacement  
PRODUCT HIGHLIGHTS  
1. Very low on-resistance, 0.5 Ω typical.  
2. Tiny, 6-lead SC70 package.  
3. Low power dissipation. The CMOS construction ensures  
low power dissipation.  
4. High current carrying capability.  
GENERAL DESCRIPTION  
The ADG849 is a monolithic, CMOS SPDT (single pole, double  
throw) switch that operates with a supply range of 1.8 V to 5.5 V.  
It is designed to offer ultralow on-resistance values of typically  
0.5 Ω. This design makes the ADG849 an ideal solution for  
applications that require minimal distortion through the switch.  
The ADG849 also has the capability of carrying large amounts  
of current, typically 600 mA at 5 V operation.  
5. Low THD + noise (0.01% typ).  
Each switch of the ADG849 conducts equally well in both  
directions when on. The device exhibits break-before-make  
switching action, thus preventing momentary shorting when  
switching channels.  
The ADG849 is available in a tiny, 6-lead SC70 package, making  
it the ideal candidate for space-constrained applications.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
ADG849  
TABLE OF CONTENTS  
Specifications..................................................................................... 3  
Typical Performance Characteristics ..............................................7  
Test Circuits ........................................................................................9  
Outline Dimensions....................................................................... 11  
Ordering Guide .......................................................................... 11  
Absolute Maximum Ratings............................................................ 5  
ESD Caution.................................................................................. 5  
Pin Configuration and Function Descriptions............................. 6  
REVISION HISTORY  
7/04—Revision 0: Initial Version  
Rev. 0| Page 2 of 12  
ADG849  
SPECIFICATIONS  
Table 1. VDD = 4.5 V to 5.5 V, GND = 0 V1  
–40°C to –40°C to  
Parameter  
+25°C +85°C  
+125°C  
0 V to VDD  
0.8  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
On-Resistance (RON  
V
)
0.5  
0.6  
Ω typ  
Ω max  
VS = 0 V to VDD, IDS = 100 mA  
See Figure 15  
0.7  
On-Resistance Match Between Channels  
(∆RON  
0.05  
Ω typ  
VS = 0.85 V, IDS = 100 mA  
)
0.095  
0.13  
0.18  
0.11  
0.22  
0.125  
0.24  
Ω max  
Ω typ  
Ω max  
On-Resistance Flatness (RFLAT(ON)  
)
VS = 0 V to VDD, IDS = 100 mA  
LEAKAGE CURRENTS  
VDD = 5.5 V  
Source Off Leakage, IS (Off)  
0.01  
0.04  
nA typ  
nA typ  
VS = 4.5 V/1 V, VD = 1 V/4.5 V,  
see Figure 16  
VS = VD = 1 V, or VS = VD = 4.5 V,  
see Figure 17  
Channel On Leakage, ID, IS (On)  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current  
2.0  
0.8  
V min  
V max  
IINL or IINH  
0.005  
2.5  
µA typ  
µA max  
pF typ  
VIN = VINL or VINH  
0.1  
CIN, Digital Input Capacitance  
DYNAMIC CHARACTERISTICS2  
tON  
11  
15  
9
13  
5
ns typ  
ns max  
ns typ  
ns max  
ns typ  
RL = 50 Ω, CL = 35 pF  
VS = 3 V, see Figure 18  
RL = 50 Ω, CL = 35 pF  
VS = 3 V, see Figure 18  
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 3 V,  
see Figure 19  
17  
14  
18  
15  
tOFF  
Break-Before-Make Time Delay, tBBM  
1
ns min  
pC typ  
dB typ  
Charge Injection  
Off Isolation  
50  
–64  
VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 20  
RL = 50 Ω, CL = 5 pF, f = 100 kHz  
see Figure 21  
Channel-to-Channel Crosstalk  
–64  
dB typ  
RL = 50 Ω, CL = 5 pF, f = 100 kHz,  
see Figure 22  
Bandwidth: –3 dB  
Insertion Loss  
THD + N  
38  
0.04  
0.01  
MHz typ  
dB typ  
%
RL = 50 Ω, CL = 5 pF, see Figure 23  
RL = 50 Ω, CL = 5 pF, see Figure 23  
RL = 32 Ω, f = 20 Hz to 20 kHz,  
Vs = 2 V p-p  
CS (Off)  
CD, CS (On)  
52  
145  
pF typ  
pF typ  
POWER REQUIREMENTS  
IDD  
VDD = 5.5 V, Digital Inputs = 0 V or 5.5 V  
0.001  
µA typ  
1.0  
µA max  
1The temperature range for the Y version is –40°C to +125°C.  
2 Guaranteed by design, not subject to production test.  
Rev. 0| Page 3 of 12  
 
 
 
ADG849  
Table 2. VDD = 2.7 V to 3.6 V, GND = 0 V1  
–40°C to –40°C to  
Parameter  
+25°C +85°C  
+125°C  
0 V to VDD  
1.2  
Unit  
Test Conditions/Comments  
ANALOG SWITCH  
Analog Signal Range  
On-Resistance (RON  
V
)
0.72  
1.1  
Ω typ  
Ω max  
VS = 0 V to VDD, IDS = –100 mA  
See Figure 15  
1.1  
On-Resistance Match Between Channels  
(∆RON  
0.05  
Ω typ  
VS = 1.5 V, IDS = –100 mA  
)
0.095  
0.3  
0.11  
0.125  
Ω max  
Ω typ  
On-Resistance Flatness (RFLAT(ON)  
)
VS = 0 V to VDD, IDS = –100 mA  
VDD = 3.6 V  
LEAKAGE CURRENTS  
Source Off Leakage, IS (Off)  
Channel On Leakage, ID, IS (On)  
0.1  
0.01  
nA typ  
nA typ  
VS = 3 V/1 V, VD = 1 V/3 V, see Figure 16  
VS = VD = 1 V, or VS = VD = 3 V;  
see Figure 17  
DIGITAL INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
2.0  
0.8  
0.7  
V min  
V max  
V max  
VDD = 3 V to 3.6 V  
VDD = 2.7 V  
Input Current  
IINL or IINH  
0.005  
2.5  
µA typ  
µA max  
pF typ  
VIN = VINL or VINH  
0.1  
CIN, Digital Input Capacitance  
DYNAMIC CHARACTERISTICS2  
tON  
16  
22  
13  
18  
7
ns typ  
ns max  
ns typ  
ns max  
ns typ  
RL = 50 Ω, CL = 35 pF  
VS = 1.5 V, see Figure 18  
RL = 50 Ω, CL = 35 pF  
VS = 1.5 V, see Figure 18  
RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 1.5 V,  
see Figure 19  
24  
20  
26  
22  
tOFF  
Break-Before-Make Time Delay, tBBM  
1
ns min  
pC typ  
dB typ  
Charge Injection  
Off Isolation  
30  
–64  
VS = 0 V, RS = 0 Ω, CL = 1 nF, see Figure 20  
RL = 50 Ω, CL = 5 pF, f = 100 kHz,  
see Figure 21  
Channel-to-Channel Crosstalk  
–64  
dB typ  
RL = 50 Ω, CL = 5 pF, f = 100 kHz,  
see Figure 22  
Bandwidth: –3 dB  
Insertion Loss  
THD + N  
38  
0.04  
0.02  
MHz typ  
dB typ  
%
RL = 50 Ω, CL = 5 pF, see Figure 23  
RL = 50 Ω CL = 5 pF, see Figure 23  
RL = 32 Ω, f = 20 Hz to 20 kHz,  
Vs = 1 V p-p  
CS (Off)  
CD, CS (On)  
55  
147  
pF typ  
pF typ  
f = 1 MHz  
f = 1 MHz  
POWER REQUIREMENTS  
VDD = 3.6 V  
Digital Inputs = 0 V or 3.6 V  
IDD  
0.001  
µA typ  
1.0  
µA max  
1The temperature range for the Y version is –40°C to +125°C.  
2 Guaranteed by design, not subject to production test.  
Rev. 0| Page 4 of 12  
 
 
ADG849  
ABSOLUTE MAXIMUM RATINGS  
Table 3. TA = 25°C, unless otherwise noted  
Table 4. Truth Table  
Parameter  
Rating  
IN  
Switch S1  
Switch S2  
Off  
On  
VDD to GND  
Analog Inputs1  
–0.3 V to +7 V  
–0.3 V to VDD + 0.3 V or 30 mA,  
whichever occurs first  
0
On  
1
Off  
Digital Inputs  
1
–0.3 V to VDD + 0.3 V or 30 mA,  
whichever occurs first  
Peak Current, S or D  
600 mA (pulsed at 1 ms,  
10% duty cycle maximum)  
400 mA  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those listed in the operational sections  
of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability. Only one absolute maximum rating may be  
applied at any one time.  
Continuous Current, S or D  
Operating Temperature Range  
Extended  
Storage Temperature Range  
Junction Temperature  
SC70 Package  
θJA Thermal Impedance  
θJC Thermal Impedance  
Reflow Soldering  
–40°C to +125°C  
–65°C to +150°C  
+150°C  
332°C/W  
120°C/W  
Peak Temperature  
260(0/–5)°C  
Time at Peak Temperature  
10 sec to 40 sec  
1 Overvoltages at IN, S, or D will be clamped by internal diodes. Current  
should be limited to the maximum ratings given.  
ESD CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on  
the human body and test equipment and can discharge without detection. Although this product features  
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy  
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance  
degradation or loss of functionality.  
Rev. 0| Page 5 of 12  
 
 
ADG849  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
6
5
4
1
2
3
S2  
D
IN  
ADG849  
TOP VIEW  
(Not to Scale)  
V
DD  
S1  
GND  
Figure 2. Pin Configuration  
Table 5. Terminology  
Mnemonic  
Function  
VDD  
GND  
IDD  
Most Positive Power Supply Potential.  
Ground (0 V) Reference.  
Positive Supply Current.  
S
D
IN  
Source Terminal. May be an input or output.  
Drain Terminal. May be an input or output.  
Logic Control Input.  
RON  
∆RON  
RFLAT(ON)  
Ohmic Resistance between D and S.  
On-Resistance Match Between any Two Channels i.e., RON Maximum to RON Minimum.  
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the  
specified analog signal range.  
IS (Off)  
ID, IS (On)  
VD (VS)  
VINL  
Source Leakage Current with the Switch Off.  
Channel Leakage Current with the Switch On.  
Analog Voltage on Terminals D, S.  
Maximum Input Voltage for Logic 0.  
VINH  
Minimum Input Voltage for Logic 1.  
IINL (IINH  
)
Input Current of the Digital Input.  
CS (Off)  
CD, CS (On)  
tON  
tOFF  
tBBM  
Off Switch Source Capacitance. Measured with reference to ground.  
On Switch Capacitance. Measured with reference to ground.  
Delay time between the 50% and 90% points of the digital input and switch on condition.  
Delay time between the 50% and 90% points of the digital input and switch off condition.  
On or off time measured between the 80% points of both switches when switching from one to another.  
A measure of the glitch impulse transfered from the digital input to the analog output during switching.  
Charge  
Injection  
Crosstalk  
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance.  
A measure of unwanted signal coupling through an off switch.  
The frequency at which the output is attenuated by 3 dB.  
The frequency response of the on switch.  
The loss due to the on-resistance of the switch.  
Off Isolation  
Bandwidth  
On-Response  
Insertion Loss  
THD + N  
The ratio of harmonic amplitudes plus the noise of a signal to the fundamental.  
Rev. 0| Page 6 of 12  
 
ADG849  
TYPICAL PERFORMANCE CHARACTERISTICS  
0.6  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
T
= 25°C  
A
0.5  
0.4  
0.3  
0.2  
0.1  
0
4.5V  
5V  
+125°C  
+85°C  
5.5V  
+25  
°
C
–40  
°
C
0.1  
0
0
0.5  
1.0  
1.5  
V /V (V)  
2.0  
2.5  
3.0  
0
1
2
3
4
5
6
V /V (V)  
S
D
S
D
Figure 3. On-Resistance vs. VD/VS, VDD = 5 V 10%  
Figure 6. On-Resistance vs. Temperature, VDD = 3 V  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
120  
V
= 5V  
DD  
100  
80  
60  
40  
20  
0
2.5V  
2.7V  
3V  
3.3V  
3.6V  
I
, I (ON)  
S
D
I
(OFF)  
S
10  
20  
40  
60  
80  
100  
120  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
TEMPERATURE (°C)  
V /V (V)  
S
D
Figure 4. On-Resistance vs. VD/VS, VDD = 2.5 V to 3.6 V  
Figure 7. Leakage Currents vs. Temperature, VDD = 5 V  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
V
= 3V  
DD  
+125°C  
+85°C  
I
, I (ON)  
S
D
+25  
°
C
–40°C  
I
(OFF)  
S
0
0.5  
1.0  
1.5  
2.0  
2.5  
V /V (V)  
3.0  
3.5  
4.0  
4.5  
5.0  
10  
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
S
D
Figure 5. On-Resistance vs. Temperature, VDD = 5 V  
Figure 8. Leakage Currents vs. Temperature, VDD = 3 V  
Rev. 0| Page 7 of 12  
 
ADG849  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
250  
T
= 25°C  
A
V
= 5V  
200  
150  
100  
50  
DD  
V
DD  
= 3V  
T
V
= 25°C  
DD  
A
= 5V/3V  
0
10k  
100k  
1M  
10M  
100M  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
FREQUENCY (MHz)  
DRAIN VOLTAGE (V)  
Figure 12. Off Isolation vs. Frequency  
Figure 9. Charge Injection  
20  
18  
16  
14  
12  
10  
8
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
V
= 3.3V  
DD  
t
ON  
t
OFF  
V
= 5V  
DD  
t
ON  
t
OFF  
6
4
2
T
= 25°C  
A
V
= 5V/3V  
DD  
0
–40  
–20  
0
20  
40  
60  
80  
100  
120  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (MHz)  
TEMPERATURE (°C)  
Figure 13. Crosstalk vs. Frequency  
Figure 10. tON/tOFF vs. Temperature  
0.10  
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
1
0
V
= 5V  
DD  
–1  
–2  
–3  
–4  
–5  
–6  
–7  
–8  
–9  
1V p-p  
2V p-p  
T
V
= 25°C  
DD  
A
= 5V/3V  
20  
40  
60  
80  
100  
120  
140  
160  
180  
200  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (MHz)  
FREQUENCY (kHz)  
Figure 11. Bandwidth  
Figure 14. Total Harmonic Distortion + Noise  
Rev. 0| Page 8 of 12  
ADG849  
TEST CIRCUITS  
I
DS  
I
(OFF)  
I (OFF)  
D
S
S
D
I
(ON)  
A
D
V1  
S
D
V
V
D
S
NC  
S
D
V
D
V
S
R
= V1/I  
ON  
DS  
Figure 15. On-Resistance  
Figure 17. On-Leakage  
Figure 16. Off-Leakage  
V
V
DD  
DD  
0.1µF  
S2  
S1  
V
S
V
50%  
50%  
OUT  
D
V
IN  
R
C
L
L
IN  
35pF  
50Ω  
90%  
90%  
V
OUT  
GND  
tON  
tOFF  
Figure 18. Switching Times, tON, tOFF  
V
V
DD  
DD  
0.1µF  
50%  
50%  
0V  
V
V
IN  
S2  
S1  
V
S
V
L
OUT  
OUT  
D
80%  
80%  
R
C
L
IN  
35pF  
50Ω  
tBBM  
tBBM  
GND  
Figure 19. Break-Before-Make Time Delay, tBBM  
V
DD  
SW ON  
SW OFF  
V
V
IN  
S2  
S1  
NC  
D
V
S
V
OUT  
1nF  
IN  
OUT  
V  
OUT  
GND  
Q
= CL × ∆V  
OUT  
INJ  
Figure 20. Charge Injection  
Rev. 0| Page 9 of 12  
 
ADG849  
V
V
V
DD  
DD  
DD  
0.1µF  
0.1µF  
NETWORK  
ANALYZER  
NETWORK  
ANALYZER  
V
DD  
S1  
S2  
V
OUT  
50Ω  
S2  
S1  
R
50Ω  
50Ω  
L
D
NC  
V
S
R
50Ω  
D
V
OUT  
50Ω  
R
L
50Ω  
GND  
V
S
GND  
V
OUT  
VS  
V
OUT  
OFF ISOLATION = 20 LOG  
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG  
V
S
Figure 21. Off Isolation  
Figure 22. Channel-to-Channel Crosstalk  
V
V
DD  
DD  
0.1µF  
NETWORK  
ANALYZER  
50Ω  
S2  
S1  
V
S
D
V
OUT  
R
L
50Ω  
GND  
V
WITH SWITCH  
OUT  
INSERTION LOSS = 20 LOG  
V
WITHOUT SWITCH  
OUT  
Figure 23. Bandwidth  
Rev. 0| Page 10 of 12  
ADG849  
OUTLINE DIMENSIONS  
2.00 BSC  
6
5
2
4
3
2.10 BSC  
1.25 BSC  
1
PIN 1  
1.30 BSC  
0.65 BSC  
1.00  
0.90  
0.70  
1.10 MAX  
0.22  
0.08  
0.46  
0.36  
0.26  
8°  
4°  
0°  
0.30  
0.15  
0.10 MAX  
SEATING  
PLANE  
0.10 COPLANARITY  
COMPLIANT TO JEDEC STANDARDS MO-203AB  
Figure 24. 6-Lead SC70 Package  
[KS-6]  
Dimensions shown in Millimeters  
ORDERING GUIDE  
Package  
Option  
Model  
Temperature Range  
–40°C to +125°C  
–40°C to +125°C  
–40°C to +125°C  
Package Description  
Branding1  
SNA  
SNA  
SNA  
ADG849YKSZ-500RL72  
ADG849YKSZ-REEL2  
ADG849YKSZ-REEL72  
SC70 (Plastic Surface Mount)  
SC70 (Plastic Surface Mount)  
SC70 (Plastic Surface Mount)  
KS-6  
KS-6  
KS-6  
1 Branding on all packages is limited to three characters due to space constraints.  
2 Z = Pb-free part.  
Rev. 0| Page 11 of 12  
 
 
 
ADG849  
NOTES  
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D04737-0-7/04(0)  
Rev. 0| Page 12 of 12  

相关型号:

ADG849YKSZ-REEL7

3 V/5 V CMOS 0.5 ohm SPDT/2:1 Mux in SC70
ADI

ADG852

0.8 ヘ CMOS, 2.3 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP
ADI

ADG852BCPZ-R2

IC 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, QCC10, 1.30 X 1.60 MM, ROHS COMPLIANT, LFCSP-10, Multiplexer or Switch
ADI

ADG852BCPZ-R21

0.8 ヘ CMOS, 2.3 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP
ADI

ADG852BCPZ-REEL

IC 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, QCC10, 1.30 X 1.60 MM, ROHS COMPLIANT, LFCSP-10, Multiplexer or Switch
ADI

ADG852BCPZ-REEL1

0.8 ヘ CMOS, 2.3 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP
ADI

ADG852BCPZ-REEL7

0.8 &Omega; CMOS, 1.8V to 5.5V, SPDT/2:1 Mux Mini LFCSP
ADI

ADG852BCPZ-REEL71

0.8 ヘ CMOS, 2.3 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP
ADI

ADG854

0.5 Ω CMOS, 1.8 V to 5.5 V, Dual SPDT/2:1 Mux, Mini LFCSP
ADI

ADG854BCPZ-REEL

0.5 Ω CMOS, 1.8 V to 5.5 V, Dual SPDT/2:1 Mux, Mini LFCSP
ADI

ADG854BCPZ-REEL7

0.5 Ω CMOS, 1.8 V to 5.5 V, Dual SPDT/2:1 Mux, Mini LFCSP
ADI

ADG858

0.58 ヘ CMOS, 2.3 V to 5.5 V, Quad SPDT/2:1 Mux in Mini LFCSP
ADI