ADG854BCPZ-REEL [ADI]
0.5 Ω CMOS, 1.8 V to 5.5 V, Dual SPDT/2:1 Mux, Mini LFCSP; 0.5 Ω CMOS ， 1.8 V至5.5 V ，双SPDT / 2 ： 1多路复用器，小型LFCSP
| 型号： | ADG854BCPZ-REEL |
| 厂家： | 
ADI |
| 描述： | 0.5 Ω CMOS, 1.8 V to 5.5 V, Dual SPDT/2:1 Mux, Mini LFCSP |
| 文件： | 总12页 (文件大小：186K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1.6 Ω On Resistance,
15 V iCMOS SPST Switch
ADG1517
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1.6 Ω on resistance
ADG1517
0.4 Ω on resistance flatness
Up to 250 mA continuous current
Fully specified at 15 V
D
S
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
IN
8-lead 3 mm × 2 mm LFCSP package
NOTES
1. SWITCH SHOWN FOR A LOGIC 1 INPUT.
APPLICATIONS
Figure 1.
Audio signal routing
Video signal routing
Battery-powered systems
Communication systems
Data acquisition systems
Relay replacement
GENERAL DESCRIPTION
The on resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals. iCMOS construction ensures ultralow
power dissipation, making the part ideally suited for portable
and battery-powered instruments.
The ADG1517 is a single-pole/single-throw (SPST) switch.
Figure 1 shows that with a logic input of 1, the switch of the
ADG1517 is closed. The switch conducts equally well in both
directions when on and has an input signal range that extends
to the supplies. In the off condition, signal levels up to the
supplies are blocked.
PRODUCT HIGHLIGHTS
The iCMOS™ (industrial CMOS) modular manufacturing process
combines high voltage CMOS (complementary metal-oxide
semiconductor) and bipolar technologies. It enables the develop-
ment of a wide range of high performance analog ICs in a footprint
that no other generation of high voltage parts has been able to
achieve. Unlike analog ICs using conventional CMOS processes,
iCMOS components can tolerate high supply voltages while
providing increased performance, dramatically lower power
consumption, and reduced package size.
1. 1.85 Ω maximum on resistance at 25°C.
2. Minimum distortion.
3. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V.
4. No VL logic power supply required.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADG1517
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................4
Thermal Resistance.......................................................................4
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
Test Circuits........................................................................................8
Terminology.................................................................................... 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Single Supply ................................................................................. 3
Continuous Current, S or D........................................................ 3
REVISION HISTORY
10/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG1517
SPECIFICATIONS
SINGLE SUPPLY
VDD = 15 V 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
25°C
−40°C to +85°C
−40°C to +125°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0 V to VDD
2.75
V
1.6
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to 10 V, IS = −10 mA; see Figure 13
VDD = 13.5 V
VS = 0 V to 10 V, IS = −10 mA
1.85
0.4
0.5
2.4
0.6
On Resistance Flatness (RFLAT(ON)
)
0.7
LEAKAGE CURRENTS
VDD = 16.5 V
Source Off Leakage, IS (Off)
10
10
10
nA typ
nA typ
nA typ
VS = 1 V, VD = 10 V; or VS = 10 V,
VD = 1 V; see Figure 14
VS = 1 V, VD = 10 V; or VS = 10 V,
VD = 1 V; see Figure 14
Drain Off Leakage, ID (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
VS = VD = 1 V or 10 V, see Figure 15
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
2.0
0.8
V min
V max
μA typ
μA max
pF typ
0.001
4
VIN = VGND or VDD
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
135
175
115
155
70
ns typ
ns max
ns typ
ns max
pC typ
dB typ
% typ
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 19
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 19
VS = 8 V, RS = 0 Ω, CL = 1 nF; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 16
RL = 110 Ω, 7.5 V p-p, f = 20 Hz to 20 kHz;
see Figure 18
220
190
250
220
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion + Noise 0.04
(THD + N)
−60
−3 dB Bandwidth
Insertion Loss
CS (Off)
CD (Off)
CD, CS (On)
65
−0.16
68
68
185
MHz typ
dB typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 5 pF; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
f = 1 MHz; VS = 7.5 V
f = 1 MHz; VS = 7.5 V
f = 1 MHz; VS = 7.5 V
POWER REQUIREMENTS
IDD
VDD = 16.5 V
Digital inputs = 0 V or VDD
0.001
75
μA typ
μA max
μA typ
μA max
V min/max
1.0
IDD
Digital inputs = 5 V
GND = 0 V
145
5/16.5
VDD
1 Guaranteed by design, not subject to production test.
CONTINUOUS CURRENT, S OR D
Table 2.
Parameter
CONTINUOUS CURRENT, S or D1, 2
25°C
85°C
125°C
Unit
mA max
Test Conditions/Comments
250
150
100
VDD = 13.5 V, GND = 0 V
1 Guaranteed by design, not subject to production test.
2 Data based on θJA data shown in Table 4.
Rev. 0 | Page 3 of 12
ADG1517
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
TA = 25°C, unless otherwise noted.
θJA is specified for a 4-layer board and with the exposed pad
soldered to the board.
Table 3.
Parameter
Rating
Table 4. Thermal Resistance
Package Type
VDD to GND
−0.3 V to +25 V
GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
Analog Inputs1
θJA
Unit
8-Lead LFCSP (CP-8-4)
50.8
°C/W
Digital Inputs1
Peak Current, S or D
Data in Table 2 + 10% (pulsed
at 1 ms, 10% duty cycle max)
ESD CAUTION
Operating Temperature Range
Industrial
Storage Temperature Range
Junction Temperature
−40°C to +125°C
−65°C to +150°C
150°C
Reflow Soldering Peak
Temperature, Pb Free
260°C
1 Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 12
ADG1517
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
S
1
8 D
ADG1517
NC 2
7 GND
6 IN
TOP VIEW
GND 3
(Not to Scale)
V
4
5 NC
DD
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO GND.
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5
6
S
Source Terminal. Can be an input or output.
No Connect.
Ground (0 V) Reference. Both GND pins must be connected to GND potential.
Most Positive Power Supply Potential.
No Connect.
NC
GND
VDD
NC
IN
Logic Control Input.
7
8
GND
D
Ground (0 V) Reference. Both GND pins must be connected to GND potential.
Drain Terminal. Can be an input or output.
9 (EPAD)
Exposed Paddle (EPAD)
The exposed paddle should be tied to GND.
Table 6. Truth Table
ADG1517 IN Pin
Switch Condition
1
0
On
Off
Rev. 0 | Page 5 of 12
ADG1517
TYPICAL PERFORMANCE CHARACTERISTICS
4.5
160
140
120
100
80
GND = 0V
GND = 0V
T
= 25°C
A
V
A
= 15V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
DD
= 25°C
T
V
= 5V
DD
V
= 8V
DD
60
40
V
V
V
V
V
= 12V
DD
DD
DD
DD
DD
= 13.5V
= 14V
20
= 15V
= 16.5V
0
0
2
4
6
8
10
12
14
16
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
OR V (V)
LOGIC, IN (V)
D
S
Figure 6. IDD vs. Logic Level
Figure 3. On Resistance as a Function of VD or VS for Single Supply
250
200
150
100
50
3.0
2.5
2.0
1.5
1.0
SOURCE TO DRAIN
0
–50
–100
–150
–200
–250
DRAIN TO SOURCE
T
T
T
T
T
= –40°C
= +25°C
= +70°C
= +85°C
= +125°C
A
A
A
A
A
0.5
0
V
= 15V
DD
GND = 0V
GND = 0V
DD
V
= 15V
T
= 25°C
A
0
2
4
6
8
10
12
14 16
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
V
(V)
V
OR V (V)
S
S
D
Figure 7. Charge Injection vs. Source Voltage
Figure 4. On Resistance as a Function of VD or VS for Different Temperatures,
Single Supply
200
180
160
140
120
100
80
20
GND = 0V
18
V
V
= 15V
DD
15V SS tON
= 1V/10V
BIAS
16
14
12
10
8
15V SS tOFF
I
I
, I (ON) +, +
S
D
, I (ON) –, –
D
S
I
(OFF) –, +
(OFF) +, –
(OFF) +, –
(OFF) –, +
D
I
S
D
I
6
I
S
60
4
40
2
20
0
–2
0
–40
–20
0
20
40
60
80
100
120
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 8. tON/tOFF Times vs. Temperature
Figure 5. Leakage Currents as a Function of Temperature, Single Supply
Rev. 0 | Page 6 of 12
ADG1517
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0
GND = 0V
= 15V
V
= 7.5V p-p
S
V
DD
= 25°C
T
A
V
= 5V p-p
S
V
= 2.5V p-p
S
V
= 15V
DD
GND = 0V
LOAD = 110Ω
100
1k
10k
100k
1M
10M
100M
10
100
1k
FREQUENCY (Hz)
10k
100k
FREQUENCY (Hz)
Figure 9. Off Isolation vs. Frequency
Figure 11. THD + N vs. Frequency
0
–1
–2
–3
–4
–5
–6
–7
V
= 15V
DD
GND = 0V
= 25°C
–10
T
A
V p-p = 0.62V
–30
–50
NO DECOUPLING
CAPACITORS
DECOUPLING
CAPACITORS
ON SUPPLIES
–70
–90
GND = 0V
= 15V
V
DD
= 25°C
T
A
–110
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 10. On Response vs. Frequency
Figure 12. ACPSRR vs. Frequency
Rev. 0 | Page 7 of 12
ADG1517
TEST CIRCUITS
V
DD
0.1µF
NETWORK
ANALYZER
V
DD
S
50ꢀ
50ꢀ
IN
V
S
D
V
V
OUT
V
IN
R
L
50ꢀ
GND
S
D
I
DS
V
OUT
V
S
OFF ISOLATION = 20 log
V
S
Figure 13. On Resistance
Figure 16. Off Isolation
V
DD
0.1µF
NETWORK
ANALYZER
V
DD
S
50ꢀ
IN
V
S
D
V
OUT
V
I
(OFF)
I (OFF)
D
IN
R
L
50ꢀ
S
S
D
A
A
GND
V
V
S
D
V
WITH SWITCH
OUT
WITHOUT SWITCH
INSERTION LOSS = 20 log
V
OUT
Figure 14. Off Resistance
Figure 17. Bandwidth
V
DD
DD
0.1µF
AUDIO PRECISION
V
R
S
S
IN
V
S
V p-p
I
(ON)
A
D
D
S
D
V
OUT
NC
V
IN
R
L
110ꢀ
GND
V
D
NC = NO CONNECT
Figure 18. THD + Noise
Figure 15. On Leakage
Rev. 0 | Page 8 of 12
ADG1517
V
DD
0.1µF
V
DD
V
L
OUT
S
D
V
50%
50%
90%
IN
ADG1517
R
300ꢀ
C
L
V
S
35pF
IN
90%
V
OUT
GND
tOFF
tON
Figure 19. Switching Times
V
V
DD
DD
V
R
OUT
S
S
D
C
1nF
L
V
V
S
IN
ADG1517
IN
V
OUT
ΔV
OUT
GND
Q
= C × ΔV
L
OUT
INJ
Figure 20. Charge Injection
Rev. 0 | Page 9 of 12
ADG1517
TERMINOLOGY
IDD
The on switch capacitance, measured with reference to ground.
The positive supply current.
CIN
VD (VS)
The digital input capacitance.
The analog voltage on Terminal D and Terminal S.
tON
RON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
The ohmic resistance between D and S.
RFLAT(ON)
tOFF
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
Delay time between the 50% and 90% points of the digital input
and switch off condition.
Charge Injection
IS (Off)
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
The source leakage current with the switch off.
ID (Off)
Off Isolation
The drain leakage current with the switch off.
A measure of unwanted signal coupling through an off switch.
ID, IS (On)
Bandwidth
The channel leakage current with the switch on.
The frequency at which the output is attenuated by 3 dB.
VINL
On Response
The maximum input voltage for Logic 0.
The frequency response of the on switch.
VINH
Insertion Loss
The loss due to the on resistance of the switch.
The minimum input voltage for Logic 1.
I
INL (IINH
)
THD + N
The input current of the digital input.
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental.
CS (Off)
The off switch source capacitance, measured with reference to
ground.
ACPSRR (AC Power Supply Rejection Ratio)
Measures the ability of a part to avoid coupling noise and spurious
signals that appear on the supply voltage pin to the output of the
switch. The dc voltage on the device is modulated by a sine wave of
0.62 V p-p. The ratio of the amplitude of signal on the output to
the amplitude of the modulation is the ACPSRR.
CD (Off)
The off switch drain capacitance, measured with reference to
ground.
CD, CS (On)
Rev. 0 | Page 10 of 12
ADG1517
OUTLINE DIMENSIONS
1.75
1.65
1.50
2.00 BSC
5
8
3.00 BSC
1.90
1.80
1.65
EXPOSED
PAD
0.20 MIN
4
1
PIN 1
INDICATOR
INDEX
AREA
0.50
0.40
0.30
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.15 REF
COPLANARITY
0.08
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.30
0.25
0.20
0.50
Figure 21. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 2 mm Body, Very Very Thin, Dual Lead
(CP-8-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG1517BCPZ-REEL71
Temperature Range
Package Description
Package Option
Branding
−40°C to +125°C
8-Lead Lead Frame Chip Scale Package (LFCSP_WD)
CP-8-4
1E
1 Z = RoHS Compliant Part.
Rev. 0 | Page 11 of 12
ADG1517
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07793-0-10/08(0)
Rev. 0 | Page 12 of 12
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