AD8422ARZ-RL [ADI]
High Performance, Low Power, Rail-to-Rail Precision Instrumentation Amplifier; 高性能，低功耗，轨到轨精密仪表放大器
| 型号： | AD8422ARZ-RL |
| 厂家： | 
ADI |
| 描述： | High Performance, Low Power, Rail-to-Rail Precision Instrumentation Amplifier |
| 文件： | 总24页 (文件大小：697K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Performance, Low Power, Rail-to-Rail
Precision Instrumentation Amplifier
Data Sheet
AD8422
FEATURES
CONNECTION DIAGRAM
Low power: 330 µA maximum quiescent current
Rail-to-rail output
Low noise and distortion
8 nV/√Hz maximum input voltage noise at 1 kHz
0.15 µV p-p RTI noise (G = 100)
AD8422
1
2
3
4
8
7
6
5
–IN
+V
S
R
R
V
OUT
G
G
REF
–V
+IN
S
0.5 ppm nonlinearity with 2 kΩ load (G = 1)
Excellent ac specifications
80 dB minimum CMRR at 7 kHz (G = 1)
2.2 MHz bandwidth (G = 1)
TOP VIEW
(Not to Scale)
Figure 1. 8-Lead MSOP (RM), 8-Lead SOIC (R)
High precision dc performance (AD8422BRZ)
150 dB minimum CMRR (G = 1000)
0.04% maximum gain error (G = 1000)
0.3 µV/°C maximum input offset drift
0.5 nA maximum input bias current
Wide supply range
–20
–30
R
= 2kΩ
= ±10V
L
V
OUT
–40
–50
–60
–70
3.6 V to 36 V single supply
–80
G = 1000
1.8 V to 18 V dual supply
–90
Input overvoltage protection: 40 V from opposite supply
Gain range: 1 to 1000
G = 100
G = 10
–100
–110
–120
–130
–140
G = 1
APPLICATIONS
Medical instrumentation
Industrial process controls
Strain gages
10
100
FREQUENCY (Hz)
1k
5k
Figure 2. Total Harmonic Distortion vs. Frequency
Transducer interfaces
Precision data acquisition systems
Channel-isolated systems
Portable instrumentation
GENERAL DESCRIPTION
The AD8422 is a high precision, low power, low noise, rail-to-rail
instrumentation amplifier that delivers the best performance
per unit microampere in the industry. The AD8422 processes
signals with ultralow distortion performance that is load
independent over its full output range.
The wide input range and rail-to-rail output of the AD8422
bring all of the benefits of a high performance in-amp to single-
supply applications. Whether using high or low supply voltages,
the power savings make the AD8422 an excellent choice for
high channel count or power sensitive applications on a very
tight error budget.
The AD8422 is the third generation development of the industry-
standard AD620. The AD8422 employs new process technologies
and design techniques to achieve higher dynamic range and
lower errors than its predecessors, while consuming less than
one-third of the power. The AD8422 uses the high performance
pinout introduced by the AD8221.
The AD8422 uses robust input protection that ensures reliability
without sacrificing noise performance. The AD8422 has high
ESD immunity, and the inputs are protected from continuous
voltages up to 40 V from the opposite supply rail.
A single resistor sets the gain from 1 to 1000. The reference pin
can be used to apply a precise offset to the output voltage.
Very low bias current makes the AD8422 error-free with high
source impedance, allowing multiple sensors to be multiplexed
to the inputs. Low voltage noise and low current noise make the
AD8422 an ideal choice for measuring a Wheatstone bridge.
The AD8422 is specified from −40°C to +85°C and has typical
performance curves to 125°C. It is available in 8-lead MSOP
and 8-lead SOIC packages.
Rev. 0
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Tel: 781.329.4700
Technical Support
©2013 Analog Devices, Inc. All rights reserved.
www.analog.com
AD8422
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Architecture ................................................................................ 19
Gain Selection............................................................................. 19
Reference Terminal .................................................................... 20
Input Voltage Range................................................................... 20
Layout .......................................................................................... 20
Input Bias Current Return Path ............................................... 21
Input Voltages Beyond the Supply Rails.................................. 21
Radio Frequency Interference (RFI)........................................ 22
Applications Information.............................................................. 23
Precision Bridge Conditioning................................................. 23
Process Control Analog Input .................................................. 23
Outline Dimensions....................................................................... 24
Ordering Guide .......................................................................... 24
Applications....................................................................................... 1
Connection Diagram ....................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
SOIC Package................................................................................ 3
MSOP Package.............................................................................. 5
Absolute Maximum Ratings............................................................ 8
Thermal Resistance ...................................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 19
REVISION HISTORY
5/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
Data Sheet
AD8422
SPECIFICATIONS
SOIC PACKAGE
VS = 15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 2 kΩ, unless otherwise noted.
Table 1.
AD8422ARZ
Typ
AD8422BRZ
Typ
Test Conditions/
Comments
Parameter
Min
Max
Min
Max
Unit
COMMON-MODE REJECTION RATIO
CMRR DC to 60 Hz with 1 kΩ
Source Imbalance
VCM = −10 V to +10 V
G = 1
G = 10
G = 100
G = 1000
Over Temperature, G=1
CMRR at 7 kHz
G = 1
G = 10
G = 100
G = 1000
NOISE1
86
94
dB
dB
dB
dB
dB
106
126
146
83
114
134
150
89
T = −40°C to +85°C
VCM = −10 V to +10 V
80
90
100
100
80
95
100
100
dB
dB
dB
dB
Voltage Noise, 1 kHz
Input Voltage Noise, eNI
Output Voltage Noise, eNO
Peak to Peak, RTI
G = 1
G = 10
G = 100 to 1000
Current Noise
VIN+, VIN−, VREF = 0 V
f = 0.1 Hz to 10 Hz
8
80
8
80
nV/√Hz
nV/√Hz
2
2
µV p-p
µV p-p
µV p-p
fA/√Hz
pA p-p
0.5
0.15
90
8
0.5
0.15
90
8
f = 1 kHz
f = 0.1 Hz to 10 Hz
110
VOLTAGE OFFSET2
Input Offset, VOSI
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
60
70
0.4
25
40
0.3
µV
µV
µV/°C
Average Temperature
Coefficient
Output Offset, VOSO
Over Temperature
Average Temperature
Coefficient
VS = 1.8 V to 15 V
T = −40°C to +85°C
300
500
5
150
300
2
µV
µV
µV/°C
Offset RTI vs. Supply (PSR)
G = 1
G = 10
G = 100
G = 1000
VS = 1.8 V to 18 V
90
110
130
150
150
100
120
140
140
120
140
160
160
dB
dB
dB
dB
110
124
130
INPUT CURRENT
Input Bias Current
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
0.5
1
2
0.2
0.5
1
nA
nA
Average Temperature
Coefficient
4
4
pA/°C
Input Offset Current
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
0.2
0.3
0.8
0.1
0.15
0.3
nA
nA
Average Temperature
Coefficient
1
1
pA/°C
Rev. 0 | Page 3 of 24
AD8422
Data Sheet
AD8422ARZ
Typ
AD8422BRZ
Typ
Test Conditions/
Comments
Parameter
Min
Max
Min
Max
Unit
REFERENCE INPUT
RIN
IIN
Voltage Range
Gain to Output
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth
G = 1
20
35
20
35
kΩ
µA
V
VIN+, VIN−, VREF = 0 V
50
+VS
50
+VS
–VS
–VS
1
1
V/V
2200
850
120
12
2200
850
120
12
kHz
kHz
kHz
kHz
G = 10
G = 100
G = 1000
Settling Time 0.01%
G = 1
G = 10
G = 100
G = 1000
10 V step
10 V step
13
13
12
80
13
13
12
80
µs
µs
µs
µs
Settling Time 0.001%
G = 1
15
15
µs
G = 10
15
15
µs
G = 100
15
15
µs
G = 1000
160
160
µs
Slew Rate
GAIN3
Gain Range
G = 1 to 100
0.8
1
0.8
1
V/µs
G = 1 + (19.8 kΩ/RG)
1000
1000
V/V
Gain Error
VOUT 10 V
G = 1
G = 10
G = 100
G = 1000
0.03
0.2
0.2
0.01
0.04
0.04
0.04
%
%
%
%
0.2
Gain Nonlinearity
G = 1
VOUT = −10 V to +10 V
RL = 2 kΩ
0.5
2
4
5
5
10
20
0.5
2
4
5
5
10
20
ppm
ppm
ppm
ppm
G = 10
G = 100
G = 1000
10
10
Gain vs. Temperature
G = 1
G > 1
5
−80
1
–80
ppm/°C
ppm/°C
INPUT
Input Impedance
Differential
Common Mode
Input Operating Voltage Range4
Over Temperature
OUTPUT
200||2
200||2
200||2
200||2
GΩ||pF
GΩ||pF
V
V
VS = 1.8 V to 18 V
T = −40°C to +85°C
−VS + 1.2
−VS + 1.2
+VS − 1.1
+VS − 1.2
–VS + 1.2
–VS + 1.2
+VS − 1.1
+VS − 1.2
Output Swing, RL = 10 kΩ
Over Temperature
Output Swing, RL = 10 kΩ
Over Temperature
Output Swing, RL = 2 kΩ
Over Temperature5
Output Swing, RL = 2 kΩ
Over Temperature
Short-Circuit Current
VS = 15 V
T = −40°C to +85°C
VS = 1.8 V
T = −40°C to +85°C
VS = 15 V
T = −40°C to +85°C
VS = 1.8 V
−VS + 0.2
−VS + 0.25
−VS + 0.12
−VS + 0.13
−VS + 0.25
−VS + 0.3
−VS + 0.15
−VS + 0.2
+VS − 0.2
−VS + 0.2
+VS − 0.2
+VS − 0.25
+VS − 0.12
+VS − 0.13
+VS − 0.25
+VS – 1.4
V
V
V
V
V
V
V
V
+VS − 0.25 −VS + 0.25
+VS − 0.12 −VS + 0.12
+VS − 0.13 −VS + 0.13
+VS − 0.25 −VS + 0.25
+VS – 1.4
+VS − 0.15 −VS + 0.15
+VS − 0.2 −VS + 0.2
−VS + 0.3
+VS − 0.15
+VS − 0.2
T = −40°C to +85°C
20
20
mA
Rev. 0 | Page 4 of 24
Data Sheet
AD8422
AD8422ARZ
Typ
AD8422BRZ
Typ
Test Conditions/
Comments
Parameter
Min
Max
Min
Max
Unit
POWER SUPPLY
Operating Range
Dual-supply operation
Single-supply
operation
1.8
3.6
18
36
1.8
3.6
18
36
V
V
Quiescent Current
Over Temperature
300
330
400
300
330
400
µA
µA
T = −40°C to +85°C
TEMPERATURE RANGE
Specified Performance
Operating Range6
–40
–40
+85
+125
–40
–40
+85
+125
°C
°C
1 Total RTI noise = √
eNI2 + (eNO/G)2
2 Total RTI VOS = (VOSI) + (VOSO/G).
3 Gain does not include the effects of the external resistor, RG.
4 One input grounded. G = 1.
5 Output current limited at cold temperatures. See Figure 35.
6 See Typical Performance Characteristics for expected operation between 85°C and 125°C.
MSOP PACKAGE
VS = 15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 2 kΩ, unless otherwise noted.
Table 2.
AD8422ARMZ
Typ
AD8422BRMZ
Typ
Test Conditions/
Comments
Parameter
Min
Max
Min
Max
Unit
COMMON-MODE REJECTION RATIO
CMRR DC to 60 Hz with 1 kΩ
Source Imbalance
VCM = −10 V to +10 V
G = 1
G = 10
G = 100
G = 1000
Over Temperature, G = 1
CMRR at 7 kHz
G = 1
G = 10
G = 100
G = 1000
NOISE1
86
90
dB
dB
dB
dB
106
126
146
83
110
130
150
86
T = −40°C to +85°C
VCM = −10 V to +10 V
80
90
100
100
80
95
100
100
dB
dB
dB
dB
Voltage Noise, 1 kHz
Input Voltage Noise, eNI
Output Voltage Noise, eNO
Peak to Peak, RTI
G = 1
G = 10
G = 100 to 1000
Current Noise
VIN+, VIN−, VREF = 0 V
f = 0.1 Hz to 10 Hz
8
80
8
80
nV/√Hz
nV/√Hz
2
2
µV p-p
µV p-p
µV p-p
fA/√Hz
pA p-p
0.5
0.15
90
8
0.5
0.15
90
8
f = 1 kHz
f = 0.1 Hz to 10 Hz
110
VOLTAGE OFFSET2
Input Offset, VOSI
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
70
110
0.6
50
75
0.4
µV
µV
µV/°C
Average Temperature
Coefficient
Output Offset, VOSO
Over Temperature
Average Temperature
Coefficient
VS = 1.8 V to 15 V
T = −40°C to +85°C
300
500
5
150
300
2
µV
µV
µV/°C
Rev. 0 | Page 5 of 24
AD8422
Data Sheet
AD8422ARMZ
Typ
AD8422BRMZ
Typ
Test Conditions/
Comments
Parameter
Min
Max
Min
Max
Unit
Offset RTI vs. Supply (PSR)
G = 1
G = 10
G = 100
G = 1000
VS = 1.8 V to 18 V
90
110
130
150
150
100
120
140
140
120
140
160
160
dB
dB
dB
dB
110
124
130
INPUT CURRENT
Input Bias Current
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
0.5
1
2
0.2
0.5
1
nA
nA
Average Temperature
Coefficient
4
4
pA/°C
Input Offset Current
Over Temperature
VS = 1.8 V to 15 V
T = −40°C to +85°C
0.2
0.3
0.8
0.1
0.15
0.3
nA
nA
Average Temperature
Coefficient
1
1
pA/°C
REFERENCE INPUT
RIN
IIN
Voltage Range
Gain to Output
DYNAMIC RESPONSE
Small Signal −3 dB Bandwidth
G = 1
20
35
20
35
kΩ
µA
V
VIN+, VIN−, VREF = 0 V
50
+VS
50
+VS
−VS
−VS
1
1
V/V
2200
850
120
12
2200
850
120
12
kHz
kHz
kHz
kHz
G = 10
G = 100
G = 1000
Settling Time 0.01%
G = 1
G = 10
G = 100
G = 1000
10 V step
10 V step
13
13
12
80
13
13
12
80
µs
µs
µs
µs
Settling Time 0.001%
G = 1
15
15
µs
G = 10
15
15
µs
G = 100
15
15
µs
G = 1000
160
160
µs
Slew Rate
GAIN3
Gain Range
Gain Error
G = 1
G = 1 to 100
0.8
1
0.8
1
V/µs
G = 1 + (19.8 kΩ/RG)
1000
1000
V/V
VOUT 10 V
0.03
0.2
0.2
0.01
0.04
0.04
0.04
%
%
%
%
G = 10
G = 100
G = 1000
0.2
Gain Nonlinearity
G = 1
G = 10
G = 100
G = 1000
VOUT = −10 V to +10 V
RL = 2 kΩ
0.5
2
4
5
5
10
20
0.5
2
4
5
5
10
20
ppm
ppm
ppm
ppm
10
10
Gain vs. Temperature
G = 1
G > 1
5
−80
1
−80
ppm/°C
ppm/°C
Rev. 0 | Page 6 of 24
Data Sheet
AD8422
AD8422ARMZ
Typ
AD8422BRMZ
Typ
Test Conditions/
Comments
Parameter
INPUT
Min
Max
Min
Max
Unit
Input Impedance
Differential
Common Mode
200||2
200||2
200||2
200||2
GΩ||pF
GΩ||pF
Input Operating Voltage Range4
Over Temperature
VS = 1.8 V to 18 V
T = −40°C to +85°C
−VS + 1.2
−VS + 1.2
+VS − 1.1
+VS − 1.2
−VS + 1.2
−VS + 1.2
+VS − 1.1
+VS − 1.2
V
V
OUTPUT
Output Swing, RL = 10 kΩ
Over Temperature
Output Swing, RL = 10 kΩ
Over Temperature
Output Swing, RL = 2 kΩ
Over Temperature5
Output Swing, RL = 2 kΩ
Over Temperature
Short-Circuit Current
POWER SUPPLY
VS = 15 V
T = −40°C to +85°C
VS = 1.8 V
T = −40°C to +85°C
VS = 15 V
T = −40°C to +85°C
VS = 1.8 V
−VS + 0.2
−VS + 0.25
−VS + 0.12
−VS + 0.13
−VS + 0.25
−VS + 0.3
−VS + 0.15
−VS + 0.2
+VS − 0.2
−VS + 0.2
+VS − 0.2
+VS − 0.25
+VS − 0.12
+VS − 0.13
+VS − 0.25
+VS – 1.4
V
V
V
V
V
V
V
V
+VS − 0.25 −VS + 0.25
+VS − 0.12 −VS + 0.12
+VS − 0.13 −VS + 0.13
+VS − 0.25 −VS + 0.25
+VS – 1.4
+VS − 0.15 −VS + 0.15
−VS + 0.3
+VS − 0.15
+VS − 0.2
T = −40°C to +85°C
+VS − 0.2
−VS + 0.2
20
20
mA
Operating Range
Dual-supply operation
Single-supply operation
1.8
3.6
18
36
1.8
3.6
18
36
V
V
Quiescent Current
Over Temperature
300
330
400
300
330
400
µA
µA
T = −40°C to +85°C
TEMPERATURE RANGE
Specified Performance
Operating Range6
–40
–40
+85
+125
–40
–40
+85
+125
°C
°C
1 Total RTI Noise = √
eNI2 + (eNO/G)2
2 Total RTI VOS = (VOSI) + (VOSO/G).
3 Gain does not include the effects of the external resistor, RG.
4 One input grounded. G = 1.
5 Output current limited at cold temperatures. See Figure 35.
6 See Typical Performance Characteristics for expected operation between 85°C and 125°C.
Rev. 0 | Page 7 of 24
AD8422
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
THERMAL RESISTANCE
θJA is specified for a device in free air using a 4-layer JEDEC
printed circuit board (PCB).
Parameter
Rating
Supply Voltage
1.8 V to 18 V
Indefinite
−VS + 40 V
+VS − 40 V
VS 0.3 V
−65°C to +150°C
−40°C to +125°C
150°C
Output Short-Circuit Current Duration
Maximum Voltage at −IN or +IN1
Minimum Voltage at −IN or +IN
Maximum Voltage at REF
Storage Temperature Range
Operating Temperature Range
Maximum Junction Temperature
ESD
Table 4.
Package
θJA
Unit
°C/W
°C/W
8-Lead SOIC
8-Lead MSOP
100
162
ESD CAUTION
Human Body Model
3 kV
Charge Device Model
Machine Model
1.25 kV
100 V
1 For voltages beyond these limits, use input protection resistors. See the
Theory of Operation section for more information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 8 of 24
Data Sheet
AD8422
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD8422
1
2
3
4
8
7
6
5
–IN
+V
S
R
R
V
OUT
G
G
REF
–V
+IN
S
TOP VIEW
(Not to Scale)
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
2, 3
4
5
6
−IN
RG
Negative Input Terminal.
Gain Setting Terminals. Place resistor across the RG pins to set the gain. G = 1 + (19.8 kΩ/RG).
Positive Input Terminal.
Negative Power Supply Terminal.
Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level shift the output.
+IN
−VS
REF
VOUT
+VS
7
8
Output Terminal.
Positive Power Supply Terminal.
Rev. 0 | Page 9 of 24
AD8422
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
T = 25°C, VS = 15, VREF = 0 V, RL = 10 kΩ, unless otherwise noted.
400
350
300
250
200
150
100
50
400
350
300
250
200
150
100
50
0
–90
0
–300
–60
–30
0
30
60
90
–200
–100
0
100
200
300
300
40
INPUT OFFSET VOLTAGE (µV)
OUTPUT OFFSET VOLTAGE (µV)
Figure 4. Typical Distribution of Input Offset Voltage
Figure 7. Typical Distribution of Output Offset Voltage
800
600
400
200
0
400
300
200
100
0
–900
–600
–300
0
300
600
900
–300
–200
–100
0
100
200
POSITIVE INPUT BIAS CURRENT (pA)
INPUT OFFSET CURRENT (pA)
Figure 5. Typical Distribution of Input Bias Current
Figure 8. Typical Distribution of Input Offset Current
500
400
300
200
100
0
500
400
300
200
100
0
3
–9
–6
–3
0
6
9
–40
–20
0
20
PSRR G = 1 (µV/V)
CMRR G = 1 (µV/V)
Figure 6. Typical Distribution of PSRR (G = 1)
Figure 9. Typical Distribution of CMRR (G = 1)
Rev. 0 | Page 10 of 24
Data Sheet
AD8422
20
20
15
G = 1
G = 100
V
= ±15V
S
15
10
V
= ±15V
S
10
V
= ±12V
= ±5V
S
5
5
V
= ±12V
= ±5V
S
0
0
–5
–5
V
V
S
S
–10
–15
–20
–10
–15
–20
–20
–15
–10
–5
0
5
10
15
20
–20
–15
–10
–5
0
5
10
15
20
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 10. Input Common-Mode Voltage vs. Output Voltage (G = 1),
VS = 15 V, VS = 12 V, VS = 5 V
Figure 13. Input Common-Mode Voltage vs. Output Voltage (G = 100),
VS = 15 V, VS = 12 V, VS = 5 V
5.0
5.0
G = 1
G = 100
4.5
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
V
= 0V
V
= 2.5V
REF
REF
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 0V
V
= 2.5V
REF
REF
1
0.5
0
–0.5
0
0.5
1.0 1.5
2.0 2.5
3.0 3.5
4.0 4.5
5.0 5.5
–0.5
0
0.5
.0 1.5
2.0 2.5
3.0 3.5
4
.0 4.5
5.0 5.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 11. Input Common-Mode Voltage vs. Output Voltage (G = 1),
Single-Supply, VS = 5 V
Figure 14. Input Common-Mode Voltage vs. Output Voltage (G = 100),
Single-Supply, VS = 5 V
3.0
3.0
G = 1
G = 100
V
= 0V
V
= 1.8V
REF
REF
2.5
2.0
1.5
1.0
0.5
0
2.5
2.0
1.5
1.0
V
= 0V
V
= 1.8V
REF
REF
2.5
0.5
0
–0.5
–0.5
0
0.5
1
.0
1.5
2
.0
2.5
3
.0
3.5
4.0
0
0.5
1.0
1.5
2
.0
3
.0
3.5
4.0
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
Figure 12. Input Common-Mode Voltage vs. Output Voltage (G = 1),
Single-Supply, VS = 3.6 V
Figure 15. Input Common-Mode Voltage vs. Output Voltage (G = 100),
Single-Supply, VS = 3.6 V
Rev. 0 | Page 11 of 24
AD8422
Data Sheet
20
16
12
8
5.0
20
15
20
15
10
5
V
= 5V
V
= ±15V
S
S
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
G = 1
G = 100
V
V
V
V
= 2.5V
= 2.5V
= 0V
OUT
REF
REF
V
= 0V
IN–
IN–
I
10
IN
V
OUT
I
5
IN
4
0
0
0
–4
–8
–12
–16
–20
–5
–5
–10
–15
–20
–10
–15
–20
–35 –30 –25 –20 –15 –10 –5
0
5
10 15 20 25 30 35 40
–25 –20 –15 –10
–5
0
5
10
15
20
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 16. Input Overvoltage Performance; G = 1, VS = 5 V
Figure 19. Input Overvoltage Performance; G = 100, VS = 15 V
0.25
20
15
20
15
10
5
V = ±15V
S
V
= ±15V
S
0.20
0.15
0.10
0.05
0
G = 1
V
V
= 0V
REF
= 0V
IN–
10
V
OUT
5
0
0
I
IN
–0.05
–0.10
–0.15
–0.20
–0.25
–5
–5
–10
–15
–20
–10
–15
–20
–15
–10
–5
0
5
10
15
–25 –20 –15 –10
–5
0
5
10
15
20
25
COMMON-MODE VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 20. Input Bias Current vs. Common-Mode Voltage, VS = 15 V
Figure 17. Input Overvoltage Performance; G = 1, VS = 15 V
0.20
20
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 5V
V
= 5V
S
S
16
12
8
G = 100
V
V
0.15
0.10
0.05
0
V
= 2.5V
OUT
REF
= 2.5V
IN–
I
IN
4
0
–4
–8
–12
–16
–20
–0.05
–0.10
–0.15
–0.20
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
–35 –30 –25 –20 –15 –10 –5
0
5
10 15 20 25 30 35 40
COMMON-MODE VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 18. Input Overvoltage Performance; G = 100, VS = 5 V
Figure 21. Input Bias Current vs. Common-Mode Voltage, VS = 5 V
Rev. 0 | Page 12 of 24
Data Sheet
AD8422
180
180
160
140
120
100
80
GAIN = 1000
GAIN = 1000
GAIN = 100
GAIN = 10
GAIN = 1
160
GAIN = 100
140
GAIN = 10
120
GAIN = 1
100
80
60
40
20
0
60
40
0.1
1
10
100
1k
10k
100k
100k
10M
0.1
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 22. Positive PSRR vs. Frequency
Figure 25. CMRR vs. Frequency
180
160
140
120
100
80
180
160
140
120
100
80
GAIN = 1000
GAIN = 1000
GAIN = 100
GAIN = 10
GAIN = 1
GAIN = 100
GAIN = 10
GAIN = 1
60
40
60
20
0
0.1
40
0.1
1
10
100
1k
10k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Negative PSRR vs. Frequency
Figure 26. CMRR vs. Frequency, 1 kΩ Source Imbalance
70
60
50
40
30
20
10
0
0.5
0.4
GAIN = 1000
0.3
GAIN = 100
GAIN = 10
GAIN = 1
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–10
–20
0
10
20
30
40
50
60
70
80
90
100
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
TIME (s)
Figure 24. Gain vs. Frequency
Figure 27. Change in Input Offset Voltage (VOSI) vs. Warm-Up Time
Rev. 0 | Page 13 of 24
AD8422
Data Sheet
0.4
2.0
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
V
= ±15V
S
1.5
1.0
0.3
NORMALIZED AT 25°C
0.2
0.5
0.1
0
0
–0.5
–1.0
–1.5
–2.0
–0.1
–0.2
–0.3
–0.4
–
40
–25
–10
5
20
35
50
65
80
95 110 125
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 28. Input Bias Current and Input Offset Current vs. Temperature
Figure 31. Supply Current vs. Temperature (G = 1)
70
60
100
REPRESENTATIVE SAMPLES
NORMALIZED AT 25°C
80
60
I
+
50
SHORT
40
40
20
30
0
20
–20
–40
–60
–80
–100
10
0
–10
–20
–30
I
–
SHORT
–40 –25 –10
5
20
35
50
65
80
95 110 125
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 32. Short-Circuit Current vs. Temperature (G = 1)
Figure 29. Gain vs. Temperature (G = 1)
+V
50
40
S
REPRESENTATIVE SAMPLE
NORMALIZED AT 25°C
–0.5
30
–1.0
–1.5
20
–40°C
+25°C
+85°C
+105°C
+125°C
10
0
–10
–20
–30
–40
–50
+1.5
+1.0
+0.5
–V
S
0
2
4
6
8
10
12
14
16
18
–40 –25 –10
5
20
35
50
65
80
95 110 125
SUPPLY VOLTAGE (±V )
S
TEMPERATURE (°C)
Figure 33. Input Voltage Limit vs. Supply Voltage
Figure 30. CMRR vs. Temperature (G = 1), Normalized at 25°C
Rev. 0 | Page 14 of 24
Data Sheet
AD8422
+V
S
+V
S
–0.2
–0.4
–0.6
–0.8
–0.1
–0.2
–0.3
–40°C
+25°C
+85°C
+105°C
+125°C
+125°C
+85°C
+25°C
–40°C
+0.8
+0.6
+0.4
+0.2
+0.3
+0.2
+0.1
–V
S
–V
S
100µ
0
2
4
6
8
10
12
14
16
18
1m
10m
SUPPLY VOLTAGE (±V )
OUTPUT CURRENT (A)
S
Figure 34. Output Voltage Swing vs. Supply Voltage, RL = 10 kΩ
Figure 37. Output Voltage Swing vs. Output Current
+V
S
5
4
3
2
1
0
V
= ±15V
S
–0.2
–0.4
–0.6
G = 1
+125°C
–0.8
+85°C
+25°C
–40°C
–1
+0.8
+0.6
+0.4
+0.2
–2
–3
–4
–5
R
R
= 2kΩ
= 10kΩ
L
L
–V
S
0
2
4
6
8
10
12
14
16
18
–10
–8
–6
–4
–2
0
2
4
6
8
10
SUPPLY VOLTAGE (±V )
OUTPUT VOLTAGE (V)
S
Figure 35. Output Voltage Swing vs. Supply Voltage, RL = 2 kΩ
Figure 38. Gain Nonlinearity (G = 1)
10
8
15
V
= ±15V
S
G = 10
10
5
6
4
2
–40°C
+25°C
+85°C
+105°C
+125°C
0
0
–5
–2
–4
–6
–8
–10
–10
–15
R
R
= 2kΩ
= 10kΩ
L
L
–10
–8
–6
–4
–2
0
2
4
6
8
10
100
1k
10k
100k
LOAD RESISTANCE (Ω)
OUTPUT VOLTAGE (V)
Figure 36. Output Voltage Swing vs. Load Resistance
Figure 39. Gain Nonlinearity (G = 10)
Rev. 0 | Page 15 of 24
AD8422
Data Sheet
20
G = 1000, 100nV/DIV
V
= ±15V
S
16
12
8
G = 100
4
0
G = 1, 1µV/DIV
–4
–8
–12
–16
–20
R
R
= 2kΩ
= 10kΩ
L
L
1s/DIV
–10
–8
–6
–4
–2
0
2
4
6
8
10
OUTPUT VOLTAGE (V)
Figure 40. Gain Nonlinearity (G = 100)
Figure 43. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1, G = 1000)
50
40
10k
V
= ±15V
S
G = 1000
30
20
1k
100
10
10
0
–10
–20
–30
–40
–50
R
R
= 2kΩ
= 10kΩ
L
L
–10
–8
–6
–4
–2
0
2
4
6
8
10
1
10
100
1k
10k
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 41. Gain Nonlinearity (G = 1000)
Figure 44. Current Noise Spectral Density vs. Frequency
1k
100
10
G = 1
5pA/DIV
G = 10
G = 100
G = 1000
1s/DIV
1
0.1
1
10
100
FREQUENCY (Hz)
1k
10k
100k
Figure 45. 0.1 Hz to 10 Hz Current Noise
Figure 42. Voltage Noise Spectral Density vs. Frequency
Rev. 0 | Page 16 of 24
Data Sheet
AD8422
30
G = 1
V
= ±15V
S
25
20
15
10
5
5V/DIV
12.0μs TO 0.01%
15.2µs TO 0.001%
0.002%/DIV
V
= +5V
S
10μs/DIV
0
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 46. Large Signal Frequency Response
Figure 49. Large Signal Pulse Response and Settling Time (G = 100),
10 V Step, VS = 15 V, RL = 2 kΩ, CL = 100 pF
5V/DIV
5V/DIV
13.6μs TO 0.01%
15.2µs TO 0.001%
80μs TO 0.01%
160µs TO 0.001%
0.002%/DIV
0.002%/DIV
100μs/DIV
10μs/DIV
Figure 47. Large Signal Pulse Response and Settling Time (G = 1), 10 V Step,
VS = 15 V, RL = 2 kΩ, CL = 100 pF
Figure 50. Large Signal Pulse Response and Settling Time (G = 1000),
10 V Step, VS = 15 V, RL = 2 kΩ, CL = 100 pF
30
R
C
= 2kΩ
= 100pF
L
L
25
20
15
10
5
5V/DIV
SETTLED TO 0.001%
12.8μs TO 0.01%
15.1µs TO 0.001%
0.002%/DIV
SETTLED TO 0.01%
10μs/DIV
0
2
4
6
8
10
12
14
16
18
20
STEP SIZE (V)
Figure 48. Large Signal Pulse Response and Settling Time (G = 10), 10 V Step,
VS = 15 V, RL = 2 kΩ, CL = 100 pF
Figure 51. Settling Time vs. Step Size (G = 1)
Rev. 0 | Page 17 of 24
AD8422
Data Sheet
50mV/DIV
20mV/DIV
100µs/DIV
10µs/DIV
Figure 52. Small Signal Pulse Response (G = 1), RL = 2 kΩ, CL = 100 pF
Figure 55. Small Signal Pulse Response (G = 1000), RL = 2 kΩ, CL = 100 pF
NO LOAD
20 pF
50 pF
100 pF
20mV/DIV
10µs/DIV
50mV/DIV
10µs/DIV
Figure 53. Small Signal Pulse Response (G = 10), RL = 2 kΩ, CL = 100 pF
Figure 56. Small Signal Pulse Response with Various Capacitive Loads
(G = 1), RL = No Load
20mV/DIV
10µs/DIV
Figure 54. Small Signal Pulse Response (G = 100), RL = 2 kΩ, CL = 100 pF
Rev. 0 | Page 18 of 24
Data Sheet
AD8422
THEORY OF OPERATION
+V
S
I
V
I
B
I
I
B
B
COMPENSATION
COMPENSATION
A1
A2
10kΩ
+V
–V
C1
C2
S
10kΩ
10kΩ
NODE 1
OUTPUT
REF
A3
NODE 2
+V
S
R1
9.9kΩ
R2
9.9kΩ
S
Q1
Q2
superβ
10kΩ
ESD AND
OVERVOLTAGE
PROTECTION
ESD AND
OVERVOLTAGE
PROTECTION
+V
+V
S
S
superβ
–IN
+IN
R
G
NODE 3
NODE 4
–V
S
–V
–V
S
S
DIFFERENCE
AMPLIFIER STAGE
Figure 57. Simplified Schematic
The transfer function of the AD8422 is
ARCHITECTURE
V
OUT = G × (VIN+ − VIN−) + VREF
The AD8422 is based on the classic 3-op-amp instrumentation
amplifier topology. This topology has two stages: a preamplifier
to provide differential amplification followed by a difference
amplifier that removes the common-mode voltage. Figure 57
shows a simplified schematic of the AD8422.
where:
19.8 kΩ
G =1+
RG
Topologically, Q1, A1, R1 and Q2, A2, R2 can be viewed as
precision current feedback amplifiers that maintain a fixed
current in the emitters of Q1 and Q2. Any change in the input
signal forces the output voltages of A1 and A2 to change accord-
ingly and maintain the Q1 and Q2 current at the correct value.
This causes a precise diode drop from –IN and +IN to Node 3
and Node 4, respectively, so that the differential signal applied
to the inputs is replicated across the RG pins. Any current
through RG must also flow through R1 and R2, creating the
gained differential voltage between Node 1 and Node 2.
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8422 that can be calculated by referring to Table 6 or by
using the following gain equation:
19.8 kΩ
RG =
G −1
The AD8422 defaults to G = 1 when no gain resistor is used. Add
the tolerance and gain drift of the RG resistor to the specifications
of the AD8422 to determine the total gain accuracy of the system.
When the gain resistor is not used, gain error and gain drift are
minimal.
The amplified differential signal and the common-mode signal
are applied to a difference amplifier that rejects the common-
mode voltage but preserves the amplified differential voltage.
Table 6. Gains Achieved Using 1% Resistors
Laser-trimmed resistors allow for a highly accurate in-amp with a
gain error of less than 0.01% and a CMRR that exceeds 94 dB
(G = 1). The supply current is precisely trimmed to reduce
uncertainties due to part-to-part variations in power dissipation
and noise. The high performance pinout and special attention to
design and layout allow for high CMRR across a wide frequency
and temperature range. Using superbeta input transistors and
bias current compensation, the AD8422 offers extremely high
input impedance and low bias current, as well as very low voltage
noise while using only 300 µA supply current. The overvoltage
protection scheme allows the input to go 40 V from the opposite
rail at all gains without compromising the noise performance.
1% Standard Table Value of RG (Ω)
Calculated Gain
19.6 k
4.99 k
2.21 k
1.05 k
402
200
100
39.2
20
2.010
4.968
9.959
19.86
50.25
100.0
199.0
506.1
991.0
Rev. 0 | Page 19 of 24
AD8422
Data Sheet
RG Power Dissipation
AD8422
1
2
3
4
8
7
6
5
–IN
+V
S
The AD8422 duplicates the differential voltage across its inputs
onto the RG resistor. Choose an RG resistor size that is sufficient
to handle the expected power dissipation at ambient temperature.
R
R
V
OUT
G
G
REF
–V
+IN
S
REFERENCE TERMINAL
TOP VIEW
(Not to Scale)
The output voltage of the AD8422 is developed with respect to the
potential on the reference terminal. This can be used to apply a
precise offset to the output signal. For example, a voltage source
can be tied to the REF pin to level shift the output, allowing the
AD8422 to drive a unipolar analog-to-digital converter (ADC).
The REF pin is protected with ESD diodes and must not exceed
either +VS or −VS by more than 0.3 V.
Figure 59. Pinout Diagram
Common-Mode Rejection Ratio over Frequency
Poor layout can cause some of the common-mode signals to be
converted to differential signals before reaching the in-amp.
Such conversions occur when one input path has a frequency
response that is different from the other. To maintain high
CMRR over frequency, closely match the input source imped-
ance and capacitance of each path. Place additional source
resistance in the input path (for example, for input protection)
close to the in-amp inputs, which minimizes their interaction
with parasitic capacitance from the PCB traces.
For best performance, maintain a source impedance to the REF
terminal that is below 1 Ω. As shown in Figure 57, the reference
terminal, REF, is at one end of a 10 kꢀ resistor. Additional impedance
at the REF terminal adds to this 10 kꢀ resistor and results in
amplification of the signal connected to the positive input.
Parasitic capacitance at the gain setting pins (RG) can also affect
CMRR over frequency. If the board design has a component at
the gain setting pins (for example, a switch or jumper), choose a
component such that the parasitic capacitance is as small as
possible.
The amplification from the additional RREF can be calculated as
2(10 kꢀ + RREF)/(20 kꢀ + RREF
)
Only the positive signal path is amplified; the negative path is
unaffected. This uneven amplification degrades CMRR.
INCORRECT
CORRECT
Power Supplies and Grounding
Use a stable dc voltage to power the instrumentation amplifier.
Noise on the supply pins can adversely affect performance.
AD8422
AD8422
Place a 0.1 μF capacitor as close as possible to each supply pin.
Because the length of the bypass capacitor leads is critical at
high frequency, surface-mount capacitors are recommended. A
parasitic inductance in the bypass ground trace works against
the low impedance created by the bypass capacitor. As shown in
Figure 60, a 10 μF capacitor can be used farther away from the
device. For larger value capacitors, intended to be effective at
lower frequencies, the current return path distance is less critical.
In most cases, this capacitor can be shared by other local precision
integrated circuits.
REF
REF
V
V
+
OP1177
–
Figure 58. Driving the Reference Pin (REF)
INPUT VOLTAGE RANGE
The 3-op-amp architecture of the AD8422 applies gain in the
first stage before removing common-mode voltage with the
difference amplifier stage. Internal nodes between the first and
second stages (Node 1 and Node 2 in Figure 57) experience a
combination of a gained signal, a common-mode signal, and a
diode drop. The voltage supplies can limit the combined signal,
even when the individual input and output signals are not limited.
Figure 10 through Figure 15 show this limitation in detail.
+V
S
0.1µF
10µF
+IN
–IN
V
OUT
R
G
AD8422
LOAD
REF
LAYOUT
To ensure optimum performance of the AD8422 at the PCB level,
take care in the design of the board layout. To aid in this task,
the pins of the AD8422 are arranged in a logical manner.
0.1µF
10µF
–V
S
Figure 60. Supply Decoupling, REF, and Output Referred to Local Ground
Rev. 0 | Page 20 of 24
Data Sheet
AD8422
A ground plane layer is helpful to reduce parasitic inductances.
This minimizes voltage drops with changes in current. The area
of the current path is directly proportional to the magnitude of
parasitic inductances and, therefore, the impedance of the path
at high frequencies. Large changes in currents in an inductive
decoupling path or ground return create unwanted effects due
to the coupling of such changes into the amplifier inputs.
INPUT VOLTAGES BEYOND THE SUPPLY RAILS
Many instrumentation amplifiers specify excellent CMRR and
input impedance, but in a real system, the performance suffers
because of the external components required for input protection.
The AD8422 has very robust inputs. It typically does not need
additional input protection. Input voltages can be up to 40 V from
the opposite supply rail without damage to the part. For example,
with a +5 V positive supply and a 0 V negative supply, the part can
safely withstand voltages from −35 V to +40 V. Unlike some other
instrumentation amplifiers, the part can handle large differential
input voltages even when the part is in high gain.
Because load currents flow from the supplies, connect the load at
the same physical location as the bypass capacitor grounds.
Reference Pin
The output voltage of the AD8422 is developed with respect to
the potential on the reference terminal. Ensure that REF is tied
to the appropriate local ground.
+V
S
+
IN+
–
I
V
V
AD8422
INPUT BIAS CURRENT RETURN PATH
The input bias current of the AD8422 must have a dc return
path to ground. When using a floating source without a current
return path, such as a thermocouple, create a current return
path, as shown in Figure 61.
+
IN+
–
–V
S
MOST APPLICATIONS
Figure 62. Input Overvoltage Protection with no External Components
INCORRECT
CORRECT
For input voltages less than 40 V from the opposite rail, no input
protection is required.
+V
+V
S
S
Keep the rest of the AD8422 terminals within the supplies. All
terminals of the AD8422 are protected against ESD.
AD8422
AD8422
Input Voltages Beyond the Maximum Ratings
REF
REF
REF
REF
For applications where the AD8422 encounters voltages beyond
the limits in the Absolute Maximum Ratings section, external
protection is required. This external protection depends on the
duration of the overvoltage event and the noise performance
required.
–V
–V
S
S
TRANSFORMER
TRANSFORMER
+V
+V
S
S
For short-lived events, transient protectors such as metal oxide
varistors (MOVs) may be all that is required.
For longer events, use resistors in series with the inputs combined
with diodes. To avoid worsening bias current performance, low
leakage diodes, such as the BAV199 or FJH1100s, are recommended.
The diodes prevent the voltage at the input of the amplifier from
exceeding the maximum ratings, while the resistors limit the
current into the diodes. Because most external diodes can easily
handle 100 mA or more, resistor values do not have to be large.
Therefore, the protection resistance has minimal impact on
noise performance.
AD8422
AD8422
REF
10MΩ
–V
S
–V
S
THERMOCOUPLE
THERMOCOUPLE
+V
+V
S
S
C
C
C
R
R
1
fHIGH-PASS
=
AD8422
2πRC
AD8422
C
REF
–V
–V
S
S
CAPACITIVELY COUPLED
CAPACITIVELY COUPLED
Figure 61. Creating an Input Bias Current Return Path
Rev. 0 | Page 21 of 24
AD8422
Data Sheet
+V
+V
S
S
R
RADIO FREQUENCY INTERFERENCE (RFI)
PROTECT
I
+
I
+
IN+
–
RF rectification is often a problem when amplifiers are used in
applications that have strong RF signals. The disturbance can
appear as a small dc offset voltage. High frequency signals can
be filtered with a low-pass RC network placed at the input of
the instrumentation amplifier, as shown in Figure 64.
V
V
V
IN+
–
AD8422
AD8422
R
PROTECT
+
IN–
–
+
IN–
–
V
–V
S
–V
S
+V
S
TRANSIENT PROTECTION
SIMPLE CONTINUOUS PROTECTION
0.1µF
+IN
10µF
+V
S
+V
+V
S
S
R
R
PROTECT
PROTECT
I
+
C
1nF
C
+
IN+
–
I
V
V
V
R
IN+
–
–V
+V
S
AD8422
AD8422
2kΩ
S
V
C
D
10nF
OUT
R
R
R
G
AD8422
PROTECT
PROTECT
R
+
IN–
–
+
IN–
–
REF
–V
–V
S
V
S
–IN
–V
2kΩ
S
C
C
1nF
LOW NOISE CONTINUOUS
OPTION 1
LOW NOISE CONTINUOUS
OPTION 2
0.1µF
10µF
Figure 63. Input Protection Options for Input Voltages Beyond Absolute
Maximum Ratings
–V
S
Figure 64. RFI Suppression
At the expense of some noise performance, another solution is
to use series resistors. In the overvoltage case, current into the
inputs of the AD8422 is internally limited to a safe value for the
amplifier. Although the AD8422 inputs must still be kept within the
Absolute Maximum Ratings, the I × R drop across the
protection resistor increases the maximum voltage that the
system can withstand to the following values:
The filter limits the input signal bandwidth, according to the
following relationship:
1
FilterFrequencyDIFF
2πR(2CD CC )
1
FilterFrequencyCM
where CD ≥ 10 CC.
2πRCC
For positive input signals,
V
MAX_NEW = (40 V + Negative Supply) + IIN × RPROTECT
For negative input signals,
MIN_NEW = (Positive Supply – 40 V) − IOUT × RPROTECT
CD affects the difference signal, and CC affects the common-mode
signal. Choose values of R and CC that minimize RFI. A mismatch
between R × CC at the positive input and R × CC at the negative
input degrades the CMRR of the AD8422. By using a value of CD
that is one order of magnitude larger than CC, the effect of the
mismatch is reduced, and performance is improved.
V
Overvoltage performance is shown in Figure 16, Figure 17,
Figure 18, and Figure 19. With gains greater than 100 and
supply voltages less than 2.5 V, overdrive voltages beyond
the rails may cause the output to invert as far as the REF pin
voltage.
Resistors add noise; therefore, the choice of the resistor and capacitor
values depends on the desired tradeoff between noise, input
impedance at high frequencies, and RF immunity. The resistors
used for the RFI filter can be the same as those used for input
protection.
Rev. 0 | Page 22 of 24
Data Sheet
AD8422
APPLICATIONS INFORMATION
ADA4096-2, ensure that the desired output voltage of the AD8276
is within its output range, and VL is within the input and output
range of the ADA4096-2. The transistor must have sufficient
breakdown voltage and IC. Low cost transistors, such as the BC847
or 2N5210, are recommended.
PRECISION BRIDGE CONDITIONING
With its high CMRR, low drift, and rail-to-rail output, the
AD8422 is an excellent choice for conditioning a signal from a
Wheatstone bridge. With appropriate supply voltages, the gain
and reference pin voltage can be adjusted to match the full-scale
bridge output to any desired output range, such as 0 V to 5 V.
Figure 65 shows a circuit to convert a bridge signal into a 4 mA
to 20 mA output using the AD8276 low power, precision difference
amplifier, and the ADA4096-2 low power, rail-to-rail input and
output, overvoltage protected op amp. With high precision bridge
circuits, care must be taken to compensate offsets and temperature
errors. For example, if the voltage at the REF pin is used to
compensate for the bridge offset, ensure that the AD8422 is within
its operating range for the maximum expected offset. If the zero-
adjust potentiometer is excluded, connect the positive op amp
input to the center of the 24.9 kΩ, 10.7 kΩ divider, which is at
1.5 V. If lower supply voltages are used for the AD8276 and the
PROCESS CONTROL ANALOG INPUT
In process control systems such as programmable logic controllers
(PLC) and distributed control systems (DCS), analog variables
typically occur in just a few standard voltage or current ranges,
including 4 mA to 20 mA and 10 V. Variables within these input
ranges must often be gained or attenuated and level shifted to
match a specific ADC input range such as 0 V to 5 V. The circuit in
Figure 66 shows one way this can be done with a single AD8422.
Low power, overvoltage protection, and high precision make the
AD8422 a good match for process control applications, and high
input impedance, low bias current, and low current noise allow
significant source resistance with minimum additional errors.
+5V
+5V
+IN
+24V
+24V
SENSE
V = 0.5V TO 2.5V
+IN
–IN
R
V
= ±15mV
AD8422
G
OUT_FS
V
OUT
+5V
24.9kΩ
AD8276
REF
–IN
= 301Ω
REF
+24V
R
G
124Ω
+24V
1
G = 66.8V/V
I
= 4mA TO 20mA
OUT
V
L
10.7kΩ
ADA4096-2
R
L
ADA4096-2
1
OPTIONAL
ZERO
ADJUST
Figure 65. Bridge Circuit with 4 mA to 20 mA Output
TERMINAL
BLOCK
0V TO 10V, ±10V
0V TO 5V, ±5V
0V TO 1V, ±1V
42.2kΩ
34kΩ
+15V
1kΩ
1kΩ
+IN
G
8.45kΩ
49.9kΩ
V
= 2.5V ±2.5V
4mA TO 20mA,
0mA TO 20mA
±20mA
OUT
R
AD8422
REF
2.5V
–IN
–15V
R
= 13.2kΩ
G
G = 2.5V/V
Figure 66. Process Control Analog Input
Rev. 0 | Page 23 of 24
AD8422
Data Sheet
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 67. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 68. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
Package Option
Branding
AD8422ARZ
AD8422ARZ-R7
AD8422ARZ-RL
AD8422BRZ
AD8422BRZ-R7
AD8422BRZ-RL
AD8422ARMZ
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead SOIC_N, Standard Grade
R-8
R-8
R-8
R-8
R-8
8-Lead SOIC_N, Standard Grade, 7”Tape and Reel,
8-Lead SOIC_N, Standard Grade, 13”Tape and Reel
8-Lead SOIC_N, High Performance Grade
8-Lead SOIC_N, High Performance Grade, 7”Tape and Reel
8-Lead SOIC_N, High Performance Grade, 13”Tape and Reel R-8
8-Lead MSOP, Standard Grade
RM-8
Y4U
Y4U
Y4U
Y4V
Y4V
Y4V
AD8422ARMZ-R7 −40°C to +85°C
AD8422ARMZ-RL −40°C to +85°C
8-Lead MSOP, Standard Grade, 7”Tape and Reel,
8-Lead MSOP, Standard Grade, 13”Tape and Reel
8-Lead MSOP, High Performance Grade
8-Lead MSOP, High Performance Grade, 7”Tape and Reel
8-Lead MSOP, High Performance Grade, 13”Tape and Reel
RM-8
RM-8
RM-8
RM-8
RM-8
AD8422BRMZ
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
AD8422BRMZ-R7
AD8422BRMZ-RL
1 Z = RoHS Compliant Part.
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11197-0-5/13(0)
Rev. 0 | Page 24 of 24
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