MT8816AF1 [ZARLINK]
Cross Point Switch, 1 Func, 16 Channel, CMOS, PQFP44, LEAD FREE, MS-026CACB, TQFP-44;
| 型号： | MT8816AF1 |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | Cross Point Switch, 1 Func, 16 Channel, CMOS, PQFP44, LEAD FREE, MS-026CACB, TQFP-44 |
| 文件： | 总15页 (文件大小：287K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MT8816
ISO-CMOS 8 x 16 Analog Switch Array
Data Sheet
September 2011
Features
•
•
•
•
•
•
•
•
•
•
Internal control latches and address decoder
Ordering Information
Short set-up and hold times
MT8816AP1
44 Pin PLCC*
MT8816APR1 44 Pin PLCC*
Tubes
Tape & Reel
Tubes
Wide operating voltage: 4.5 V to 13.2 V
12Vpp analog signal capability
MT8816AE1
MT8816AF1
40 Pin PDIP*
44 Pin TQFP*
Trays
* Pb Free Matte Tin
R
ON 65 max. @ VDD = 12 V, 25C
RON 10 @ VDD = 12 V, 25C
-40C to +85C
Full CMOS switch for low distortion
Minimum feedthrough and crosstalk
Description
Separate analog and digital reference supplies
Low power consumption ISO-CMOS technology
The Zarlink MT8816 is fabricated in Zarlink’s ISO-
CMOS technology providing low power dissipation and
high reliability. The device contains a 8 x 16 array of
crosspoint switches along with a 7 to 128 line decoder
and latch circuits. Any one of the 128 switches can be
addressed by selecting the appropriate seven address
bits. The selected switch can be turned on or off by
applying a logical one or zero to the DATA input. VSS is
the ground reference of the digital inputs. The range of
the analog signal is from VDD to VEE. Chip Select (CS)
allows the crosspoint array to be cascaded for matrix
expansion.
Applications
•
•
•
•
•
•
Key systems
PBX systems
Mobile radio
Test equipment/instrumentation
Analog/digital multiplexers
Audio/Video switching
CS STROBE
DATA RESET
VDD
VEE
VSS
1
1
AX0
AX1
AX2
8 x 16
Switch
Array
7 to 128
Decoder
AX3
Xi I/O
(i=0-15)
Latches
AY0
AY1
AY2
128
128
• • • • • • • • • • • • • • • • • • •
Yi I/O (i=0-7)
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved.
MT8816
Data Sheet
Change Summary
Changes from the January 2010 issue to the September 2011 issue.
Page
Item
Change
1
Ordering Information
Removed leaded packages as per PCN notice.
1
2
3
4
5
6
7
40
39
Y3
AY2
RESET
AX3
AX0
X14
X15
X6
VDD
Y2
DATA
Y1
CS
Y0
NC
X0
X1
X2
X3
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
40
44 43 42 41
6 5 4 3 2
1
7
X14
X15
X6
39
Y0
NC
X0
X1
X2
X3
X4
8
38
37
36
35
34
33
32
31
30
29
9
8
9
10
11
12
13
14
15
16
X7
X8
X7
X8
X9
X10
X11
NC
Y7
VSS
Y6
10
11
12
13
14
15
16
17
18
19
20
X9
X10
X4
X5
X11
NC
NC
Y7
X5
X12
X13
NC
X12
X13
AY1
AY0
AX2
AX1
Y4
17
18 19 20 21 22 23 24 25 26 27 28
STROBE
Y5
VEE
40 PIN PLASTIC DIP
44 PIN PLCC
44 43 4241403938 37 363534
1
2
3
NC
X14
X15
X6
X7
X8
33
32
31
30
29
28
27
26
25
24
23
NC
Y0
X0
X1
X2
X3
X4
4
5
6
7
8
9
X9
X5
X10
X11
Y7
X12
X13
NC
10
11
NC
12 13 1415161718 19 202122
44 PIN TQFP
Figure 2 - Pin Connections
2
Zarlink Semiconductor Inc.
MT8816
Data Sheet
Pin Description
Pin #
Name
Description
TQFP
PDIP
PLCC
39
1
1
Y3
Y3 Analog (Input/Output): this is connected to the Y3 column of the
switch array.
40
42
2
3
2
3
AY2
Y2 Address Line (Input).
RESET Master RESET (Input): this is used to turn off all switches regardless
of the condition of CS. Active High.
43,44
2, 3
4,5
6,7
4,5
7,8
AX3,AX0 X3 and X0 Address Lines (Inputs).
X14, X15 X14 and X15 Analog (Inputs/Outputs): these are connected to the
X14 and X15 rows of the switch array.
4-9
8-13
9-14
X6-X11 X6-X11 Analog (Inputs/Outputs): these are connected to the X6-
X11 rows of the switch array.
41,1,11
10
14
15
6,15,16
17
NC
Y7
No Connection
Y7 Analog (Input/Output): this is connected to the Y7 column of the
switch array.
12
13
16
17
18
19
VSS
Y6
Digital Ground Reference.
Y6 Analog (Input/Output): this is connected to the Y6 column of the
switch array.
14
15
18
19
20
21
STROBE STROBE (Input): enables function selected by address and data.
Address must be stable before STROBE goes high and DATA must
be stable on the falling edge of the STROBE. Active High.
Y5
Y5 Analog (Input/Output): this is connected to the Y5 column of the
switch array.
16
17
20
21
22
23
VEE
Y4
Negative Power Supply.
Y4 Analog (Input/Output): this is connected to the Y4 column of the
switch array.
18,19
20,21
24,25
22, 23
24, 25
26, 27
24,25 AX1,AX2 X1 and X2 Address Lines (Inputs).
26,27 AY0,AY1 Y0 and Y1 Address Lines (Inputs).
30,31 X13, X12 X13 and X12 Analog (Inputs/Outputs): these are connected to the
X13 and X12 rows of the switch array.
26-31 28 - 33 32-37
X5-X0 X5-X0 Analog (Inputs/Outputs): these are connected to the X5-X0
rows of the switch array.
22,23,33
32
34
35
36
28,29,
38
NC
Y0
No Connection.
39
Y0 Analog (Input/Output): this is connected to the Y0 column of the
switch array.
34
40
CS
Chip Select (Input): this is used to select the device. Active High.
3
Zarlink Semiconductor Inc.
MT8816
Data Sheet
Pin Description (continued)
Pin #
Name
Description
TQFP
PDIP
PLCC
35
37
41
Y1
Y1 Analog (Input/Output): this is connected to the Y1 column of the
switch array.
36
37
38
38
39
40
42
43
44
DATA DATA (Input): a logic high input will turn on the selected switch and a
logic low will turn off the selected switch. Active High.
Y2
Y2 Analog (Input/Output): this is connected to the Y2 column of the
switch array.
VDD
Positive Power Supply.
4
Zarlink Semiconductor Inc.
MT8816
Data Sheet
Functional Description
The MT8816 is an analog switch matrix with an array size of 8 x 16. The switch array is arranged such that there
are 8 columns by 16 rows. The columns are referred to as the Y inputs/outputs and the rows are the X
inputs/outputs. The crosspoint analog switch array will interconnect any X I/O with any Y I/O when turned on and
provide a high degree of isolation when turned off. The control memory consists of a 128 bit write only RAM in
which the bits are selected by the address inputs (AY0-AY2, AX0-AX3). Data is presented to the memory on the
DATA input. Data is asynchronously written into memory whenever both the CS (Chip Select) and STROBE inputs
are high and are latched on the falling edge of STROBE. A logical “1” written into a memory cell turns the
corresponding crosspoint switch on and a logical “0” turns the crosspoint off. Only the crosspoint switches
corresponding to the addressed memory location are altered when data is written into memory. The remaining
switches retain their previous states. Any combination of X and Y inputs/outputs can be interconnected by
establishing appropriate patterns in the control memory. A logical “1” on the RESET input will asynchronously return
all memory locations to logical “0” turning off all crosspoint switches regardless of whether CS is high or low.
Two voltage reference pins (VSS and VEE) are provided for the MT8816 to enable switching of negative analog
signals. The range for digital signals is from VDD to VSS while the range for analog signals is from VDD to VEE. VSS
and VEE pins can be tied together if a single voltage reference is needed.
Address Decode
The seven address inputs along with the STROBE and CS (Chip Select) are logically ANDed to form an enable
signal for the resettable transparent latches. The DATA input is buffered and is used as the input to all latches. To
write to a location, RESET must be low and CS must go high while the address and data are set up. Then the
STROBE input is set high and then low causing the data to be latched. The data can be changed while STROBE is
high, however, the corresponding switch will turn on and off in accordance with the DATA input. DATA must be
stable on the falling edge of STROBE in order for correct data to be written to the latch.
Applications
Figure 3 shows a typical Operating Circuit of a video surveillance system using analog crosspoint switches which
allow multiple video sources switched to multiple output devices, e.g., video monitor, video recorder etc.
NTSC
/ PAL
Cameras
Video
Monitors
Figure 3 - Typical Video Surveillance System
5
Zarlink Semiconductor Inc.
MT8816
Data Sheet
Figure 4 illustrates the major components of a video surveillance system. In the center is the MT8816, a 16 x 8
analog cross-point IC. At the left are 16 video input buffers CLC2005 from Cadeka Microcircuits. At the right hand
side are 8 video output buffers CLC2005 and each buffer is capable of driving a 75 ohm video load directly. BNC
connectors are provided for all video inputs and video outputs.
A FT245R USB FIFO from Future Technology Devices International (FTDI) provides a standard USB interface for a
PC. Through this USB connection the PC controls the switching of the video signals.
Video In
(1 of 16)
Video Out
MT8816
(1 of 8)
16 x 8
Switch
matrix
USB
From
PC
Figure 4 - Functional Block Diagram for a 16 x 8 Video Surveillance System using MT8816
6
Zarlink Semiconductor Inc.
MT8816
Data Sheet
Absolute Maximum Ratings*- Voltages are with respect to VEE unless otherwise stated.
Parameter
Symbol
Min.
Max.
Units
1
Supply Voltage
VDD
VSS
-0.3
-0.3
16.0
V
V
VDD+0.3
VDD+0.3
VDD+0.3
15
2
3
4
5
6
Analog Input Voltage
Digital Input Voltage
VINA
VIN
I
-0.3
V
VSS-0.3
V
Current on any I/O Pin
Storage Temperature
mA
C
W
TS
PD
-65
+150
Package Power Dissipation
PLASTIC DIP
0.6
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Recommended Operating Conditions - Voltages are with respect to VEE unless otherwise stated.
Characteristics
Sym. Min.
Typ.
Max.
Units
Test Conditions
1
2
Operating Temperature
Supply Voltage
TO
-40
25
85
C
VDD
VSS
4.5
VEE
13.2
DD-4.5
V
V
V
3
4
Analog Input Voltage
Digital Input Voltage
VINA
VIN
VEE
VSS
VDD
VDD
V
V
DC Electrical Characteristics†- Voltages are with respect to VEE = VSS = 0 V, VDD =12 V unless otherwise stated.
Characteristics
Sym.
Min.
Typ.‡
Max.
Units
Test Conditions
1
Quiescent Supply Current
IDD
1
100
A
All digital inputs at VIN=VSS or
VDD
0.4
1.5
mA
All digital inputs at VIN=2.4V +
VSS; VSS=7.0 V
5
15
mA
nA
All digital inputs at VIN=3.4 V
2
3
Off-state Leakage Current
(See G.9 in Appendix)
IOFF
VIL
1
500
IVXi - VYjI = VDD - VEE
See Appendix, Fig. A.1
0.8+VS
Input Logic “0” level
V
VSS=7.5V; VEE=0 V
S
2.0+VSS
4
5
6
Input Logic “1” level
VIH
VIH
V
V
VSS=6.5V; VEE=0 V
Input Logic “1” level
3.3
Input Leakage (digital pins)
ILEAK
0.1
10
A
All digital inputs at VIN = VSS
or VDD
† DC Electrical Characteristics are over recommended temperature range.
‡ Typical figures are at 25C and are for design aid only; not guaranteed and not subject to production testing.
7
Zarlink Semiconductor Inc.
MT8816
Data Sheet
DC Electrical Characteristics- Switch Resistance - VDC is the external DC offset applied at the analog I/O pins.
Characteristics
Sym.
25C
70C
Typ. Max.
85C
Typ. Max.
Units
Test Conditions
Typ.
Max.
1
2
On-state
Resistance VDD=10V
VDD= 5V
(See G.1, G.2, G.3 in
Appendix)
VDD=12V
RON
45
55
65
75
75
85
215
80
90
225
VSS=VEE=0 V,VDC=VDD/2,
IVXi-VYjI = 0.4 V
See Appendix, Fig. A.2
120 185
Difference in on-state
resistance between
two switches
RON
5
10
10
10
VDD=12V, VSS=VEE=0,
V
DC=VDD/2,
IVXi-VYjI = 0.4 V
(See G.4 in Appendix)
See Appendix, Fig. A.2
AC Electrical Characteristics† - Crosspoint Performance-Voltages are with respect to VDD= 5 V, VSS= 0 V, VEE= -7 V, unless
otherwise stated.
Characteristics
Sym.
Min.
Typ.‡
Max. Units
Test Conditions
f=1 MHz
f=1 MHz
1
2
3
Switch I/O Capacitance
CS
CF
20
0.2
45
pF
pF
Feedthrough Capacitance
Frequency Response
Channel “ON”
F3dB
MHz Switch is “ON”; VINA = 2Vpp
sinewave; RL = 1 k
20LOG(VOUT/VXi)=-3 dB
See Appendix, Fig. A.3
4
5
Total Harmonic Distortion
(See G.5, G.6 in Appendix)
THD
FDT
0.01
-95
%
Switch is “ON”; VINA = 2Vpp
sinewave f= 1 kHz; RL=1 k
Feedthrough
dB
All Switches “OFF”; VINA=
Channel “OFF”
Feed.=20LOG (VOUT/VXi)
(See G.8 in Appendix)
2Vpp sinewave f= 1 kHz;
RL= 1 k.
See Appendix, Fig. A.4
6
Crosstalk between any two
channels for switches Xi-Yi and
Xj-Yj.
Xtalk
-45
-90
-85
-80
dB
dB
dB
dB
VINA=2Vpp sinewave
f= 10 MHz; RL = 75 .
V
INA=2Vpp sinewave
f= 10 kHz; RL = 600 .
Xtalk=20LOG (VYj/VXi).
(See G.7 in Appendix).
V
INA=2Vpp sinewave
f= 10 kHz; RL = 1 k.
V
INA=2Vpp sinewave
f= 1 kHz; RL = 10 k.
Refer to Appendix, Fig. A.5
for test circuit.
7
Propagation delay through
switch
tPS
30
ns
RL=1 k; CL=50 pF
† Timing is over recommended temperature range. See Fig. 3 for control and I/O timing details.
‡ Typical figures are at 25C and are for design aid only; not guaranteed and not subject to production testing.
Crosstalk measurements are for Plastic DIPS only, crosstalk values for PLCC packages are approximately 5 dB better.
8
Zarlink Semiconductor Inc.
MT8816
Data Sheet
AC Electrical Characteristics† - Control and I/O Timings- Voltages are with respect to VDD = 5 V, VSS = 0 V, VEE = -7V, unless
otherwise stated.
Characteristics
Sym. Min. Typ.‡ Max. Units
Test Conditions
1
Control Input crosstalk to switch
(for CS, DATA, STROBE,
Address)
CXtalk
30
mVpp VIN=3 V squarewave;
RIN=1 k, RL=10 k.
See Appendix, Fig. A.6
2
3
4
5
6
Digital Input Capacitance
Switching Frequency
CDI
FO
10
pF
MHz
ns
f=1 MHz
20
¿
¿
¿
Setup Time DATA to STROBE
Hold Time DATA to STROBE
tDS
tDH
tAS
10
10
10
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL= 50pF
ns
Setup Time Address to
STROBE
ns
¿
¿
¿
¿
¿
¿
¿
¿
7
8
9
Hold Time Address to STROBE
Setup Time CS to STROBE
Hold Time CS to STROBE
tAH
tCSS
tCSH
tSPW
tRPW
tS
10
10
10
20
40
ns
ns
ns
ns
ns
ns
ns
ns
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
RL= 1 k, CL=50 pF
10 STROBE Pulse Width
11 RESET Pulse Width
12 STROBE to Switch Status Delay
13 DATA to Switch Status Delay
14 RESET to Switch Status Delay
40
50
35
100
100
100
tD
tR
† Timing is over recommended temperature range. See Fig. 3 for control and I/O timing details.
Digital Input rise time (tr) and fall time (tf) = 5 ns.
‡ Typical figures are at 25C and are for design aid only; not guaranteed and not subject to production testing.
¿ Refer to Appendix, Fig. A.7 for test circuit.
9
Zarlink Semiconductor Inc.
MT8816
Data Sheet
tCSS
50%
tCSH
50%
tRPW
CS
50%
50%
RESET
STROBE
tSPW
50%
50%
50%
tAS
50%
ADDRESS
DATA
50%
tAH
50%
tDS
50%
tDH
ON
SWITCH*
OFF
tR
tR
tS
tD
Figure 5 - Control Memory Timing Diagram
* See Appendix, Fig. A.7 for switching waveform
10
Zarlink Semiconductor Inc.
MT8816
Data Sheet
AX0
AX1
AX2
AX3
AY0
AY1
AY2
Connection*
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X0-Y0
X1-Y0
X2-Y0
X3-Y0
X4-Y0
X5-Y0
X12-Y0
X13-Y0
X6-Y0
X7-Y0
X8-Y0
X9-Y0
X10-Y0
X11-Y0
X14-Y0
X15-Y0
0
0
0
0
1
0
0
X0-Y1
1
1
1
1
1
0
0
X15-Y1
0
0
0
0
0
1
0
X0-Y2
1
1
1
1
0
1
0
X15-Y2
0
0
0
0
1
1
0
X0-Y3
1
1
1
1
1
1
0
X15-Y3
0
0
0
0
0
0
1
X0-Y4
1
1
1
1
0
0
1
X15-Y4
0
0
0
0
1
0
1
X0-Y5
1
1
1
1
1
0
1
X15-Y5
0
0
0
0
0
1
1
X0-Y6
1
1
1
1
0
1
1
X15-Y6
0
0
0
0
1
1
1
X0-Y7
1
1
1
1
1
1
1
X15-Y7
Table 1 - Address Decode Truth Table
* Switch connections are not in ascending order
11
Zarlink Semiconductor Inc.
MT8816
Data Sheet
44 Pin TQFP
12
Zarlink Semiconductor Inc.
For more information about all Zarlink products
visit our Web Site at
www.zarlink.com
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However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
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of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a license under the Philips I2C Patent rights to use these components in an I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
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trademarks of Zarlink Semiconductor Inc.
TECHNICAL DOCUMENTATION - NOT FOR RESALE
相关型号：
MT8816AP1
Cross Point Switch, 1 Func, 16 Channel, CMOS, PQCC44, LEAD FREE, PLASTIC, MS-018AC, LCC-44
MICROSEMI
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