MT8840AE [MITEL]

ISO2-CMOS Data Over Voice Modem; ISO2 -CMOS数据超过语音调制解调器
MT8840AE
型号: MT8840AE
厂家: MITEL NETWORKS CORPORATION    MITEL NETWORKS CORPORATION
描述:

ISO2-CMOS Data Over Voice Modem
ISO2 -CMOS数据超过语音调制解调器

调制解调器
文件: 总8页 (文件大小:60K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ISO2-CMOS  
MT8840  
Data Over Voice Modem  
ISSUE 4  
November 1990  
Features  
Ordering Information  
Performs ASK (amplitude shift keyed)  
modulation and demodulation  
MT8840AE  
MT8840AS  
18 Pin Plastic DIP  
18 Pin SOIC  
32 kHz carrier frequency  
0°C to +85°C  
Up to 2 kbit/s full duplex data transfer rate  
On-chip oscillator  
Description  
On-chip tone caller for alerting functions  
Adjustable tone caller frequencies  
Selectable self-loop test mode  
5V/2.5mA power supply  
The MT8840 is a carrier over voice modem which  
allows simultaneous transfer of voice and data over  
a single pair of wires. Data is transferred on an  
amplitude shift keyed (ASK) 32 kHz carrier. On-chip  
filters remove voice frequency signals from the  
received composite voice and data signal prior to  
demodulation. The modulating signal is a bit stream  
with a typical data rate of 2 kbit/s. In addition, the  
device contains a two tone warbler which functions  
2
ISO -CMOS and switched capacitor  
technologies  
18 Pin DIP  
Applications  
as a telephone ringer. The device is fabricated in  
2
MITEL’s  
double-poly  
ISO -CMOS  
technology  
utilizing switched-capacitor techniques.  
Simultaneous data and voice communication in  
PABXs  
2 kbit/s data modem  
"Smart" telephone sets  
ETC  
MTC FATC  
OSC1  
OSC2  
CK32  
Timing  
and  
Control  
Tone  
Caller  
TCO  
R
O
U
T
I
TX Post-  
Filter  
TX Bandpass  
TxO  
TxDI  
Modulator  
Filter  
RxE  
RxI  
RX Pre-  
Filter  
RX Bandpass  
Filter  
N
G
RxDO  
AGC  
Demodulator  
DET  
CRx  
VDD  
VSS  
VRef  
LOOP  
Figure 1 - Functional Block Diagram  
5-3  
MT8840 ISO2-CMOS  
18  
17  
16  
15  
14  
13  
12  
11  
10  
1
2
3
4
5
6
7
8
9
DET  
CRx  
Rxl  
VDD  
RxDO  
OSC2  
OSC1  
CK32  
ETC  
MTC  
TCO  
FATC  
RxE  
LOOP  
VRef  
TxO  
TxDI  
VSS  
18 PIN PLASTIC DIP/SOIC  
Figure 2 - Pin Connections  
Description  
Pin Description  
Pin #  
Name  
1
DET  
Demodulator detection level adjust input (Analog). Internal resistor divider applies  
2.36V in open circuit condition. Connection of external resistor will vary detect level.  
2
3
CRx  
RxI  
External AGC time constant adjust input (Analog). Connect external capacitor to V  
.
SS  
Modulated receive signal input (Analog). Biased at V  
.
Ref  
4
RxE  
Receive enable input (Digital) with internal pull up. Active high.  
Self-test mode select input (Digital) with internal pull down. Active high.  
Internal reference supply voltage input (Analog) .  
Modulated transmit carrier output (Analog).  
5
LOOP  
6
V
Ref  
7
TxO  
8
TxDI  
Transmit data input (Digital).  
9
V
Negative power supply.  
SS  
10  
11  
12  
13  
14  
15  
16  
17  
18  
FATC  
TCO  
Tone caller center frequency adjust input (Analog).  
Tone caller output (Digital).  
MTC  
Mute tone caller input (Digital) with internal pull down. Active high.  
Enable tone caller input (Digital) with internal pull down. Active high.  
32 kHz data strobe output (Digital).  
ETC  
CK32  
OSC1  
OSC2  
RxDO  
Clock Input  
3.579545 MHz crystal connected between  
these pins completes internal oscillator.  
Clock Output to drive external devices.  
Receive data output (Digital). Synchronized to CK32.  
Positive power supply.  
V
DD  
5-4  
ISO2-CMOS MT8840  
Functional Description  
Applications  
The MT8840 contains the modulator and  
demodulator circuitry for 32 kHz ASK signalling as  
well as a two-tone warbler (tone caller) to replace the  
function of the mechanical telephone ringer.  
Figures 3 through 5 show how the MT8840 may be  
utilized to transfer data and voice simultaneously  
over a single pair of wires in digital or analog PABXs  
and "smart" telephone sets. In all three figures a  
microprocessor sends/receives data to/from the  
MT8840 via a UART which converts the data format  
A 32 kHz carrier is 100% amplitude modulated by the  
digital bit stream applied to input TxDI. This results in  
an amplitude shift keyed (ASK) 32 kHz carrier. A  
logical high at TxDI disables the carrier and a logical  
low enables it. The digitally modulated waveform is  
shaped by the Tx BANDPASS FILTER and smoothed  
by the Tx POST FILTER. The signal then enters the  
routing block where it is transferred to the TxO  
output.  
from parallel-to-serial or serial-to-parallel for  
the  
transmit and receive directions, respectively. In the  
receive direction the MT8840 has on-board filters to  
reject voice-band signals leaving only the 32 kHz  
carrier. This carrier is then demodulated to recover  
the received data. In the transmit direction the data  
to be sent is modulated and passed on to a summing  
circuit which sums the modulated 32 kHz carrier and  
voiceband signals for transmission over the  
telephone line. In the PABX the Filter/Codec has  
filters which reject the 32 kHz carrier from the  
received composite voice and data signal allowing  
only voiceband signals to pass through which are  
then PCM encoded for digital switching. However, in  
both the analog PABX and smart telephone set,  
lowpass filters could be included to bandlimit the  
received signal leaving only voice signals to be  
passed on to the switch array or handset earpiece.  
The modulated 32 kHz receive signal is applied to  
RxI. With a logical low applied to LOOP and a logical  
high applied to RxE, receive signals are routed to the  
Rx PREFILTER. High frequencies are removed by  
the Rx PREFILTER to prevent aliasing in the  
switched capacitor Rx BANDPASS FILTER. Voice  
signals are removed by the bandpass filter which is  
followed by an AGC circuit. This provides a dynamic  
range of 20dB for the receiver. An external 1µF  
capacitor connected from CRx to V  
is required to  
SS  
control the AGC attack and decay time constants.  
Data is recovered from the received signal in the  
demodulator. The minimum voltage level to which  
the demodulator responds may be adjusted by  
connecting a resistor from DET to V  
or V . Since  
DD  
Ref  
DET is the input to a comparator, noise should be  
kept to a minimum at this pin. The recovered receive  
data is synchronized to the leading edge of the 32  
kHz clock (available at CK32) before appearing at  
RxDO.  
When in loop around mode, the Rx PREFILTER  
input is internally disconnected from the RxI input pin  
and connected to TxO. The transmitter output is still  
available at TxO.  
A two tone warbling audio signal is available at TCO  
when the tone caller enable input (ETC) is high. TCO  
is internally clamped to V  
when the tone caller is  
Ref  
disabled. The tone output can be attenuated by 20dB  
if a logical high is applied to the tone caller mute  
input (MTC).  
5-5  
MT8840 ISO2-CMOS  
Tx Data  
Rx Data  
Tx  
Micro-  
processor  
UART  
MT8840  
Summing  
Circuit  
Rx  
2W/4W  
Converter  
Telephone  
line  
PCM  
Highway  
Tx  
FILTER/  
CODEC  
(MT896X)  
Rx  
Figure 3 - Digital PABX Block Diagram  
Tx Data  
Rx Data  
Tx  
Micro-  
UART  
MT8840  
processor  
Summing  
Circuit  
Rx  
(Optional)  
2W/4W  
Converter  
Telephone  
line  
Low-  
Pass  
Filter  
Rx  
Analog  
Switch  
Array  
(MT8804)  
To  
Another  
Telephone  
Extension  
SLIC  
Tx  
Figure 4 - Analog PABX Block Diagram  
5-6  
ISO2-CMOS MT8840  
Tx Data  
Rx Data  
Tx  
Micro-  
processor  
UART  
MT8840  
Summing  
Circuit  
Rx  
2W/4W  
Converter  
Telephone  
line  
Handset  
Low-  
Pass  
Filter  
(Optional)  
Figure 5 - Smart Telephone Set Block Diagram  
VDD  
OSC1  
MT8840  
OSC2  
MT8840  
MT8840  
C=33pF  
OSC1  
OSC2  
OSC1  
• • •  
C=1000pF  
OSC2  
C=1000pF  
VSS  
When a single crystal is shared among a number of MT8840 devices, OSC1 and OSC2 should be a.c. coupled with a 1000  
pF capacitor as shown above. This capacitor is not needed between the device with the crystal and the first driven device.  
A capacitor should be used in the first stage whenever such a chain of devices is driven from a clock instead of a crystal. A  
33pF capacitor should be connected between OSC1 and VSS to compensate for the load on OSC2.  
Figure 6 - Crystal Oscillator Connections for Driving Multiple MT8840s  
5-7  
MT8840 ISO2-CMOS  
Absolute Maximum Ratings*  
Parameter  
Symbol  
-V  
Min  
Max  
Unit  
1
2
3
4
5
Supply Voltage  
V
-0.3  
+7.0  
V
V
DD SS  
Voltage On Any Pin  
Current On Any Pin  
Storage Temperature  
Package Power Dissipation  
V
V
-0.3  
V
+0.3  
DD  
Max  
Max  
SS  
I
20  
mA  
°C  
T
-65  
+150  
850  
S
P
mW  
Diss  
* Exceeding these ratings may cause permanent damage. Functional operation under these conditions is not implied.  
Recommended Operating Conditions  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
1
2
3
4
5
6
7
Operating Supply Voltages  
V
V
4.75  
5
5.25  
V
V
DD  
Ref  
DD  
Ref  
0.4V  
DD  
Operating Supply Currents  
I
2.5  
5.0  
200  
+85  
50  
mA  
µA  
°C  
pF  
K  
I
Operating Temperature  
Load Capacitance (TxO)  
Load Resistance (TxO)  
T
0
O
C
R
L
L
10  
D.C. Characteristics - VDD = 5.0 V ± 5% VSS =0V T = 0 - 85oC (All voltages are referenced to VSS /GND)  
Characteristics  
Input Current  
Sym  
Min  
Typ  
Max  
Unit  
Test Conditions  
= 0 to V  
1
2
I
±10  
1.5  
5.0  
0.4  
µA  
V
V
IN  
IN  
DD  
D
I
G
I
T
A
L
Input Low Voltage  
V
0
IL  
3
Input High Voltage  
V
V
3.5  
V
IH  
4
Output Low Voltage  
Output High Voltage  
Output Drive Current  
N Channel Sink (Except OSC2)  
OSC2  
V
I
= 0.4mA  
= 0.4mA  
OL  
OL  
5
V
4.6  
V
I
OH  
OH  
6
7
I
0.4  
0.1  
0.4  
0.1  
mA  
mA  
mA  
mA  
µA  
KΩ  
KΩ  
KΩ  
pF  
pF  
pF  
V
V
V
= 0.4V  
= 4.6V  
OL  
OL  
I
/
O
8
9
P Channel Source (Except OSC2)  
OSC2  
I
OH  
OH  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Input Current (RxI, FATC)  
Input Resistance (FATC)  
I
±10  
= 0 to 5.0V  
IN  
IN  
R
500  
IN  
IN  
(DET to V  
(DET to V  
)
170  
23  
DD  
A
N
A
L
O
G
)
Ref  
Input Capacitance (RxI)  
(FATC)  
C
50  
10  
Any Digital Input  
Output Resistance (TxO)  
(TCO)  
5.0  
100  
3
7.5  
R
O
I
/
O
KΩ  
KΩ  
mV  
V
MTC = 0  
MTC = 1  
(TCO)  
30  
Output Offset Voltage (TxO)  
Output Voltage (DET)  
V
V
±25  
2.36  
±200  
2.55  
O
O
2.20  
See Note 1  
Notes: 1. Voltage specified is generated internally and measured with no external components connected to DET  
5-8  
ISO2-CMOS MT8840  
A.C. Characteristics - VDD=5.0V±5% VSS=0V T=0 - 85°C (All voltages are referenced to VSS/GND)  
Characteristics  
Sym  
Min  
Typ  
Max  
Unit  
Test Conditions  
1
Crystal/Clock Frequency  
Clock Input (OSC 1)  
Rise Time  
f
C
3.5759 3.5795 3.5831 MHz OSC1, OSC2  
2
3
t
100  
100  
60  
ns  
ns  
%
10% - 90% of (V - V  
)
LHCI  
DD  
SS  
4
Fall Time  
t
HLCI  
D
I
G
I
T
A
L
5
Duty Cycle  
DC  
40  
50  
CI  
6
Clock Output (OSC 2)  
Rise Time  
7
t
100  
100  
50  
ns  
ns  
%
C = 30pF, 3.58MHz ext.  
LHCO  
HLCO  
L
8
Fall Time  
t
clock to OSC1  
9
Duty Cycle  
DC  
CO  
LCO  
C32  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
Capacitive Load  
Clock Output (CK32)  
Rise Time  
C
F
30  
pF  
I
/
O
32508 32541 32574  
Hz fc = 3.5795MHz  
t
100  
ns  
ns  
%
10% - 90% of (V - V  
)
LH32  
DD  
SS  
Fall Time  
t
100  
C = 100pF  
L
HL32  
Duty Cycle  
DC  
50  
100  
32  
Capacitive Load  
Warbler Frequency (TCO)  
Low Tone Frequency  
C
pF  
L32  
f
7.935 7.945 7.955  
Hz fc = 3.5795MHz ± 0.1%  
Hz FATC = 0, f = 3.5795MHz  
W
f
352  
1036  
440  
390  
1148  
487  
428  
1260  
535  
LT  
c
T
O
N
E
Hz FATC = V , f = 3.5795MHz  
DD  
c
High Tone Frequency  
f
Hz FATC = 0, f = 3.5795MHz  
c
HT  
1295  
1434  
1.25  
1574  
Hz FATC = V , f = 3.5795MHz  
DD c  
Harmonic Relationship  
Warbler Output (TCO)  
Rise Time  
f
/f  
HT LT  
C
A
L
L
E
R
t
500  
500  
50  
ns  
ns  
%
100Kload to V  
Ref  
LHWO  
Fall Time  
t
C = 30pF, MTC = 0  
HLWO  
L
Duty Cycle  
DC  
WO  
Output Level (TCO)  
V
V
V
MTC = 0  
TCC  
DD  
pp  
pp  
0.625  
32541  
250  
V
MTC = 1 (100Kload to VRef)  
Modulated Frequency  
Output Level (TxO)  
Output Level (TxO)  
f
Hz  
mV  
MOD  
M
O
D
U
L
A
T
O
R
V
225  
270  
V
= 5V  
DD  
TxO  
pp  
variation vs. V  
V
100  
%
DD  
TxO  
Transmit Data Input (TxDI)  
Rise Time  
t
100  
100  
ns  
ns  
LHTxDI  
Fall Time  
t
HLTxDI  
Data Rate (TxDI)  
Input Impedance (RxI)  
Valid Input Level - Data (RxI)  
Valid Input Level - Data + Voice  
Receive Data Output (RxDO)  
Rise Time  
f
2
k/bits See Note 1  
Data  
Z
50  
K32 kHz Input Frequency  
D
E
M
O
D
U
L
A
T
O
R
IN  
V
V
40  
40  
400  
3.0  
mV  
V
See Note 2  
pp  
RxI  
RxI  
pp  
f
2
kbit/s  
ns  
Data  
100  
100  
10% - 90% of (V - V  
)
DD  
SS  
Fall Time  
ns  
C = 100pF  
L
Capacitive Load  
100  
60  
pF  
Duty Cycle  
50  
%
Notes: 1.  
2.  
All A.C. parameters are based on a typical data rate of 2 kbit/s.  
Measured with no external resistor to DET input. Detection level internally set to 2.36V typical.  
5-9  
MT8840 ISO2-CMOS  
A.C. Characteristics (Continued)  
Characteristics  
Sym  
Min  
Typ  
Max  
Unit  
Test Conditions  
44  
45  
46  
47  
Inband Noise Rejection (S/N)  
Attenuation to Voice Signals  
Detect Filter Q  
12  
40  
dB Input Sig. (RxI) = 400mV  
D
E
M
O
D
pp  
dB f = 0 - 5KHz  
in  
Q
3.8  
32  
Detector Center Frequency  
kHz  
Notes: 1.  
2.  
All A.C. parameters are based on a typical data rate of 2 kbit/s.  
Measured with no external resistor to DET input. Detection level internally set to 2.36V typical.  
5-10  

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