XC17V01VO8I [XILINX]
Configuration Memory, 1MX1, Serial, CMOS, PDSO8, PLASTIC, TSOP-8;
| 型号： | XC17V01VO8I |
| 厂家： | 
XILINX, INC |
| 描述： | Configuration Memory, 1MX1, Serial, CMOS, PDSO8, PLASTIC, TSOP-8 OTP只读存储器 时钟 光电二极管 内存集成电路 |
| 文件： | 总12页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Obsolete/Under Obsolescence
0
R
XC95288 In-System
Programmable CPLD
0
5
DS069 (v5.0) May 17, 2013
Product Specification
Features
Description
•
•
•
•
•
15 ns pin-to-pin logic delays on all pins
The XC95288 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 6,400 usable gates with
propagation delays of 15 ns. See Figure 2 for the architec-
ture overview.
fCNT to 95 MHz
288 macrocells with 6,400 usable gates
Up to 166 user I/O pins
5V in-system programmable
-
-
Endurance of 10,000 program/erase cycles
Program/erase over full commercial voltage and
temperature range
Power Management
Power dissipation can be reduced in the XC95288 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
•
•
Enhanced pin-locking architecture
Flexible 36V18 Function Block
-
90 product terms drive any or all of 18 macrocells
within Function Block
Operating current for each design can be approximated for
specific operating conditions using the following equation:
-
Global and product term clocks, output enables,
set and reset signals
I
CC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
Where:
MCHP = Macrocells in high-performance mode
•
•
Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
Programmable power reduction mode in each
macrocell
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
•
•
•
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design
protection
Figure 1 shows a typical calculation for the XC95288
device.
•
•
•
•
High-drive 24 mA outputs
3.3V or 5V I/O capability
Advanced CMOS 5V FastFLASH™ technology
Supports parallel programming of more than one
XC9500 concurrently
900
(700)
•
Available 352-pin BGA and 208-pin HQFP packages
600
(500)
(500)
300
0
50
100
Clock Frequency (MHz)
DS069_01_110101
Figure 1: Typical I vs. Frequency for XC95288
CC
© 1998–2006, 2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other
countries. All other trademarks are the property of their respective owners.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
1
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
3
JTAG
In-System Programming Controller
1
JTAG Port
Controller
36
Function
18
18
18
18
Block 1
I/O
Macrocells
1 to 18
I/O
I/O
I/O
36
36
36
Function
Block 2
Macrocells
1 to 18
I/O
Blocks
I/O
I/O
Function
Block 3
Macrocells
1 to 18
I/O
I/O
3
I/O/GCK
I/O/GSR
I/O/GTS
Function
Block 4
1
2
Macrocells
1 to 18
36
Function
Block 16
18
Macrocells
1 to 18
DS069_02_110101
Figure 2: XC95288 Architecture
Function block outputs (indicated by the bold line) drive the I/O blocks directly.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
2
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
Absolute Maximum Ratings
Symbol
Description
Value
Units
V
Supply voltage relative to GND
–0.5 to 7.0
V
V
V
CC
V
Input voltage relative to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Junction temperature
–0.5 to V + 0.5
CC
IN
V
–0.5 to V + 0.5
TS
CC
o
T
–65 to +150
+150
C
STG
o
T
C
J
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
Recommended Operation Conditions
Symbol
Parameter
Commercial T = 0 C to 70 C
Min
4.75
4.5
4.75
4.5
3.0
0
Max
5.25
5.5
Units
o
o
V
Supply voltage for internal logic
and input buffers
V
CCINT
A
o
o
Industrial T = –40 C to +85 C
A
o
o
V
Supply voltage for output drivers
for 5V operation
Commercial T = 0 C to 70 C
5.25
5.5
V
CCIO
A
o
o
Industrial T = –40 C to +85 C
A
Supply voltage for output drivers for 3.3V operation
Low-level input voltage
3.6
V
0.80
V
V
V
IL
V
High-level input voltage
2.0
0
V
+ 0.5
CCINT
IH
V
Output voltage
V
CCIO
O
Quality and Reliability Characteristics
Symbol
Parameter
Min
20
Max
Units
T
Data Retention
Program/Erase Cycles (Endurance)
-
-
Years
DR
N
10,000
Cycles
PE
DC Characteristic Over Recommended Operating Conditions
Symbol
Parameter
Test Conditions
Min
Max
-
Units
V
Output high voltage for 5V outputs
Output high voltage for 3.3V outputs
Output low voltage for 5V outputs
Output low voltage for 3.3V outputs
Input leakage current
I
I
I
I
= –4.0 mA, V = Min
2.4
V
V
OH
OH
OH
OL
OL
CC
= –3.2 mA, V = Min
2.4
-
CC
V
= 24 mA, V = Min
-
-
-
0.5
0.4
10
V
OL
CC
= 10 mA, V = Min
V
CC
I
I
V
V
= Max
CC
μA
IL
= GND or V
= Max
CC
IN
CC
CC
I/O high-Z leakage current
I/O capacitance
V
V
-
-
10
10
μA
pF
IH
= GND or V
IN
C
V
= GND
IN
IN
f = 1.0 MHz
I
Operating supply current
(low power mode, active)
V = GND, No load
f = 1.0 MHz
300 (Typical)
mA
CC
I
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
3
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
AC Characteristics
XC95288-15
XC95288-20
Symbol
Parameter
I/O to output valid
Min
Max
Min
Max
Units
ns
T
T
-
8.0
0
15.0
-
10.0
0
20.0
PD
SU
I/O setup time before GCK
I/O hold time after GCK
-
-
ns
T
-
-
ns
H
T
GCK to output valid
-
8.0
-
10.0
ns
CO
(1)
f
16-bit counter frequency
95.2
55.6
4.0
4.0
-
-
83.3
50.0
4.0
6.0
-
-
MHz
MHz
ns
CNT
(2)
f
Multiple FB internal operating frequency
I/O setup time before p-term clock input
I/O hold time after p-term clock input
P-term clock output valid
-
-
-
-
SYSTEM
T
PSU
T
-
-
ns
PH
T
12.0
11.0
11.0
14.0
14.0
-
16.0
16.0
16.0
18.0
18.0
-
ns
PCO
T
GTS to output valid
-
-
ns
OE
T
GTS to output disable
-
-
ns
OD
T
T
Product term OE to output enabled
Product term OE to output disabled
GCK pulse width (High or Low)
-
-
ns
POE
POD
WLH
-
-
ns
T
5.5
8.0
5.5
8.0
ns
T
Asynchronous preset/reset pulse width (High
or Low)
-
-
ns
APRPW
Notes:
1. fCNT is the fastest 16-bit counter frequency available, using the local feedback when applicable.
fCNT is also the Export Control Maximum flip-flop toggle rate, fTOG
2. fSYSTEM is the internal operating frequency for general purpose system designs spanning multiple FBs.
.
V
TEST
R
1
2
Output Type
V
V
R
R
C
L
CCIO
TEST
1
2
Device Output
5.0V
3.3V
5.0V
3.3V
160Ω
260Ω
120Ω
360Ω
35 pF
35 pF
C
R
L
DS067_03_110101
Figure 3: AC Load Circuit
DS069 (v5.0) May 17, 2013
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Product Specification
4
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
Internal Timing Parameters
XC95288-15
XC95288-20
Symbol
Parameter
Min
Max
Min
Max
Units
Buffer Delays
T
Input buffer delay
-
-
-
-
-
-
4.5
3.0
7.5
11.0
4.5
0
-
-
-
-
-
-
6.5
3.0
9.5
16.0
6.5
0
ns
ns
ns
ns
ns
ns
IN
T
GCK buffer delay
GCK
GSR
T
GSR buffer delay
T
GTS buffer delay
GTS
T
Output buffer delay
Output buffer enable/disable delay
OUT
T
EN
Product Term Control Delays
T
T
Product term clock delay
Product term set/reset delay
Product term 3-state delay
-
-
-
2.5
3.0
5.0
-
-
-
2.5
3.0
5.0
ns
ns
ns
PTCK
PTSR
T
PTTS
Internal Register and Combinatorial Delays
T
T
Combinatorial logic propagation delay
Register setup time
-
3.0
-
-
4.0
-
ns
ns
ns
ns
ns
ns
ns
ns
PDI
SUI
3.5
3.5
T
Register hold time
4.5
-
6.5
-
HI
T
Register clock to output valid time
Register async. S/R to output delay
Register async. S/R recover before clock
Internal logic delay
-
0.5
8.0
-
-
0.5
8.0
-
COI
T
-
-
AOI
T
10.0
10.0
RAI
T
-
-
3.0
11.5
-
-
3.0
11.5
LOGI
T
Internal low power logic delay
LOGILP
Feedback Delays
T
FastCONNECT feedback delay
-
-
11.0
3.5
-
-
13.0
5.0
ns
ns
F
T
Function block local feedback delay
LF
Time Adders
(1)
T
Incremental product term allocator delay
Slew-rate limited delay
-
-
1.0
5.0
-
-
1.5
5.5
ns
ns
PTA
T
SLEW
Notes:
1. TPTA is multiplied by the span of the function as defined in the XC9500 family data sheet.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
5
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
XC95288 I/O Pins
Function
BScan
Order
Function
Block
BScan
HQ208 BG352 Order
Block
Macrocell HQ208
BG352
–
Macrocell
1
1
2
–
28
29
–
861
858
855
852
849
846
843
840
837
834
831
828
825
822
819
816
813
810
807
804
801
798
795
792
789
786
783
780
777
774
771
768
765
762
759
756
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
1
2
–
38
39
–
–
U24
U23
–
753
750
747
744
741
738
735
732
729
1
N26
P25
–
1
3
3
1
4
4
1
5
30
31
–
P23
P24
–
5
40
41
–
Y26
W25
–
1
6
6
1
7
7
1
8
32
–
R26
R25
R24
R23
T26
–
8
43
–
AA26
Y25
1
9
9
[1]
[1]
[1]
1
10
11
12
13
14
15
16
17
18
1
33
–
10
11
12
13
44
Y24
726
1
–
45
–
AA25
AB25
–
723
720
717
714
711
708
705
702
699
696
693
690
687
684
681
678
675
672
669
666
663
660
657
654
651
648
1
34
–
1
[1]
[1]
[1]
1
35
36
–
T25
T23
–
14
46
AA24
Y23
–
1
15
16
17
18
1
47
–
1
1
37
–
V26
–
48
–
AC26
–
1
2
–
–
–
–
[1]
[1]
[1]
2
2
15
16
–
K23
K24
–
2
3
E23
2
3
3
4
4
C26
–
2
4
–
[1]
[1]
[1]
2
5
17
18
–
J25
L24
–
5
5
E24
2
6
6
7
6
F24
–
2
7
–
[1]
[1]
[1]
2
8
19
–
K25
L25
L26
M23
M24
–
8
7
E25
2
9
9
–
8
D26
G24
F25
2
10
11
12
13
14
15
16
17
18
20
–
10
2
11
–
[1]
[1]
[1]
2
21
–
12
9
F26
2
13
14
15
16
17
18
–
10
12
–
–
H23
G26
–
2
22
23
–
M25
M26
–
2
2
2
25
–
N25
–
14
–
H25
–
2
Notes:
1. Global control pin.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
6
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
XC95288 I/O Pins (Continued)
Function
BScan
Order
Function
Block
BScan
HQ208 BG352 Order
Block
Macrocell HQ208
BG352
–
Macrocell
5
1
2
3
4
5
6
–
49
50
–
645
642
639
636
633
630
627
624
621
618
615
612
609
606
603
600
597
594
591
588
585
582
579
576
573
570
567
564
561
558
555
552
549
546
543
540
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
1
2
–
62
63
–
–
AC19
AD19
–
537
534
531
528
525
522
519
516
513
510
507
504
501
498
495
492
489
486
483
480
477
474
471
468
465
462
459
456
453
450
447
444
441
438
435
432
5
AA23
AB24
–
5
3
5
4
5
51
54
–
AD25
AE24
–
5
64
66
–
AE20
AC18
–
5
6
5
7
7
[1]
[1]
[1]
5
8
55
AD23
8
67
–
AD18
AE19
AD17
AE18
AF18
–
5
9
10
11
12
13
14
15
16
17
18
1
–
56
–
AC22
AF24
AD22
AE23
–
9
5
10
11
12
13
14
15
16
17
18
1
69
–
5
5
57
–
70
–
5
5
58
60
–
AE22
AE21
–
71
72
–
AE17
AE16
–
5
5
5
61
–
AF21
–
73
–
AF16
–
5
6
–
–
–
–
6
2
197
198
–
C19
D18
–
2
186
187
–
A15
B15
–
6
3
3
6
4
4
6
5
199
200
–
A21
B20
–
5
188
189
–
C15
D15
–
6
6
6
6
7
7
6
8
201
–
C20
B21
B22
C21
D20
–
8
191
–
A16
B16
C16
B17
C17
–
6
9
9
6
10
11
12
13
14
202
–
10
11
12
13
14
15
16
17
18
192
–
6
6
203
–
193
–
6
6
205
B24
194
195
–
B18
A20
–
[1]
[1]
[1]
6
15
206
C23
6
16
17
18
–
208
–
–
D22
–
6
196
–
B19
–
6
Notes:
1. Global control pin.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
7
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
XC95288 I/O Pins (Continued)
Function
BScan
Order
Function
Block
BScan
HQ208 BG352 Order
Block
Macrocell HQ208
BG352
–
Macrocell
9
1
2
–
74
75
–
429
426
423
420
417
414
411
408
405
402
399
396
393
390
387
384
381
378
375
372
369
366
363
360
357
354
351
348
345
342
339
336
333
330
327
324
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
1
2
–
87
88
–
–
AD9
AC10
–
321
318
315
312
309
306
303
300
297
294
291
288
285
282
279
276
273
270
267
264
261
258
255
252
249
246
243
240
237
234
231
228
225
222
219
216
9
AE14
AF14
–
9
3
3
9
4
4
9
5
76
77
–
AE13
AC13
–
5
89
90
–
AF7
AE8
–
9
6
6
9
7
7
9
8
78
–
AD13
AF12
AE12
AD12
AC12
–
8
91
–
AD8
AE7
AD7
AE5
AC7
–
9
9
9
9
10
11
12
13
14
15
16
17
18
1
80
82
83
–
10
11
12
13
14
15
16
17
18
1
95
97
99
–
9
9
9
9
84
85
–
AF11
AE11
–
100
101
–
AE3
AD4
–
9
9
9
86
–
AE9
–
102
–
AC5
–
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
–
–
–
–
2
170
171
–
C10
B9
2
158
159
–
B3
A3
–
3
3
4
–
4
5
173
174
–
A9
5
160
161
–
D6
C6
–
6
D11
–
6
7
7
8
175
–
B11
A11
C12
B12
A12
–
8
162
–
B5
A4
B6
A6
D8
–
9
9
10
11
12
13
14
15
16
17
18
178
179
180
–
10
11
12
13
14
15
16
17
18
164
165
166
–
182
183
–
A13
B14
–
167
168
–
B7
A7
–
185
–
C14
–
169
–
D9
–
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
8
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
XC95288 I/O Pins (Continued)
Function
BScan
Order
Function
Block
BScan
HQ208 BG352 Order
Block
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
Macrocell HQ208
BG352
–
Macrocell
1
2
–
213
210
207
204
201
198
195
192
189
186
183
180
177
174
171
168
165
162
159
156
153
150
147
144
141
138
135
132
129
126
123
120
117
114
111
108
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
1
2
–
–
V3
W2
–
105
102
99
96
93
90
87
84
81
78
75
72
69
66
63
60
57
54
51
48
45
42
39
36
33
30
27
24
21
18
15
12
9
103
106
–
AD3
AD2
–
117
118
–
3
3
4
4
5
107
109
–
AC3
AD1
–
5
119
120
–
U4
U3
–
6
6
7
7
8
110
–
AA4
AA3
AB2
AC1
AA2
–
8
121
–
V2
V1
U2
T2
R4
–
9
9
10
11
12
13
14
15
16
17
18
1
111
112
113
–
10
11
12
13
14
15
16
17
18
1
122
123
125
–
114
115
–
AA1
Y1
–
126
127
–
R3
R2
–
116
–
V4
–
128
–
R1
–
–
–
–
–
2
144
145
–
K3
G1
–
2
131
133
–
P1
N2
–
3
3
4
4
5
146
147
–
H2
H3
–
5
134
135
–
N4
N3
–
6
6
7
7
8
148
–
J4
8
136
–
M1
M2
M3
M4
L1
–
9
F1
G2
G3
F2
–
9
10
11
12
13
14
15
16
17
18
149
150
151
–
10
11
12
13
14
15
16
17
18
137
138
139
–
152
154
–
E2
D2
–
140
142
–
L2
L3
–
6
155
–
F4
–
143
–
J1
–
3
0
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
9
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
XC95288 Global, JTAG, and Power Pins
Pin Type
I/O/GCK1
I/O/GCK2
I/O/GCK3
I/O/GTS1
I/O/GTS2
I/O/GTS3
I/O/GTS4
I/O/GSR
TCK
HQ208
BG352
Y24
44
46
AA24
AD23
E25
55
7
9
F26
3
E23
5
E24
206
C23
98
AD6
AF6
TDI
94
TDO
176
96
D12
TMS
AE6
V
CCINT 5V
11, 59, 124, 153, 204
J23, V24, AF23, AC15, AF15, AD11,
AD5, Y3, T1, J3, G4, D5, D10, B13,
D17, C22, H24
V
CCIO 3.3V/5V
1, 26, 53, 65, 79, 92, 105, 132, 157,
172, 181, 184
A10, A17, B2, B25, D7, D13, D19,
G23, H4, K1, K26, N23, P4, U1, U26,
W23, Y4, AC8, AC14, AC20, AE25,
AF10, AF17
GND
2, 13, 24, 27, 42, 52, 68, 81, 93, 104,1
A1, A2, A5, A8, A14, A19, A22, A25,
08, 129, 130, 141, 156, 163, 177, 190, A26, B1, B26, C7, C9, C13, C18, D24,
207
E1, E26, H1, H26, K4, N1, N24, P3,
P26, V23, W1, W4, W26, AB1, AB4,
AB26, AC9, AD10, AD14, AD15,
AD20, AE1, AE26, AF1, AF2, AF5,
AF8, AF13, AF19, AF22, AF25, AF26
No Connects
-
A18, A23, A24, B4, B8, B10, B23, C1,
C2, C3, C4, C5, C8, C11, C24, C25,
D1, D3, D4, D14, D16, D21, D23, D25,
E3, E4, F3, F23, G25, J2, J24, J26, K2,
L4, L23, P2, T3, T4, T24, U25, V25,
W3, W24, Y2, AB3, AB23, AC2, AC4,
AC6, AC11, AC16, AC17, AC21, AC23,
AC24, AC25, AD16, AD21, AD24,
AD26, AE2, AE4, AE10, AE15, AF3,
AF4, AF9, AF20
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
10
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
Device Part Marking and Ordering Combination Information
R
Device Type
Package
XC95xxx
TQ144
This line not
related to device
part number
Speed
7C
Operating Range
1
Sample package with part marking.
Speed
Device Ordering and
Part Marking Number
(pin-to-pin
delay)
Pkg.
Symbol
No. of
Pins
Operating
Range
(1)
Package Type
XC95288-10HQ208C
XC95288-10BG352C
XC95288-15HQ208C
XC95288-15BG352C
XC95288-15HQ208I
XC95288-15BG352I
XC95288-20HQ208C
XC95288-20BG352C
XC95288-20HQ208I
XC95288-20BG352I
Notes:
10 ns
10 ns
15 ns
15 ns
15 ns
15 ns
20 ns
20 ns
20 ns
20 ns
HQ208 208-pin
BG352 352-ball
HQ208 208-pin
BG352 352-ball
HQ208 208-pin
BG352 352-ball
HQ208 208-pin
BG352 352-ball
HQ208 208-pin
BG352 352-ball
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
C
C
C
C
I
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
I
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
C
C
I
Heat Sink Quad Flat Pack (HQFP)
Ball Grid Array (BGA)
I
1. C = Commercial: TA = 0° to +70°C; I = Industrial: TA = –40° to +85°C
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Revision History
The following table shows the revision history for this document.
Date
Version
3.1
Revision
Update AC characteristics and internal parameters.
Updated format.
12/04/1998
06/18/2003
08/21/2003
4.0
4.1
Updated Package Device Marking Pin 1 orientation.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
11
Product Obsolete/Under Obsolescence
R
XC95288 In-System Programmable CPLD
Date
Version
4.2
Revision
Added asynchronous preset/reset pulse width specification (T
Added Warranty Disclaimer.
04/15/2005
04/03/2006
05/17/2013
).
APRPW
4.3
5.0
The products listed in this data sheet are obsolete. See XCN11010 for further information.
DS069 (v5.0) May 17, 2013
www.xilinx.com
Product Specification
12
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