IRF9Z14STRLPBFA [VISHAY]
Power MOSFET;IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
Power MOSFET
FEATURES
• Advanced process technology
S
D2PAK (TO-263)
I2PAK (TO-262)
• Surface-mount (IRF9Z14S, SiHF9Z14S)
• Low-profile through-hole (IRF9Z14L, SiHF9Z14L)
Available
• 175 °C operating temperature
• Fast switching
G
G
Available
D
S
• P-channel
• Fully avalanche rated
D
S
G
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
D
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
P-Channel MOSFET
PRODUCT SUMMARY
VDS (V)
DESCRIPTION
-60
Third generation power MOSFETs from Vishay utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
Power MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use in a
wide variety of applications.
R
DS(on) (Ω)
VGS = -10 V
0.50
Qg max. (nC)
12
3.8
5.1
Q
gs (nC)
gd (nC)
Q
Configuration
Single
The D2PAK is a surface-mount power package capable of
accommodating die size up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface-mount package. The
D2PAK is suitable for high current applications because of is
low internal connection resistance and can dissipate up to
2.0 W in a typical surface mount application.
The through-hole version (IRF9Z14L, SiHF9Z14L) is
available for low-profile applications.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
D2PAK (TO-263)
SiHF9Z14S-GE3
IRF9Z14SPbF
D2PAK (TO-263)
SiHF9Z14STRL-GE3 a
IRF9Z14STRLPbF a
-
I2PAK (TO-262)
SiHF9Z14L-GE3
IRF9Z14LPbF
-
Lead (Pb)-free
IRF9Z14STRRPbF
Note
a. See device orientation
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
-60
20
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
V
T
C = 25 °C
-6.7
-4.7
-27
0.29
140
Continuous Drain Current e
VGS at -10 V
ID
TC = 100 °C
A
Pulsed Drain Current a, e
Linear Derating Factor
IDM
W/°C
mJ
A
Single Pulse Avalanche Energy b, e
Avalanche Current a
EAS
IAR
EAR
-6.7
4.3
Repetiitive Avalanche Energy a
mJ
T
C = 25 °C
43
3.7
-4.5
-55 to +175
300
Maximum Power Dissipation
PD
W
V/ns
°C
TA = 25 °C
Peak Diode Recovery dV/dt c, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak temperature) d
dV/dt
TJ, Tstg
For 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = -25 V, starting TJ = 25 °C, L = 3.6 mH, Rg = 25 Ω, IAS = -6.7 A (see fig. 12)
c. ISD ≤ -6.7 A, dI/dt ≤ 90 A/μs, VDD ≤ VDS, TJ ≤ 175 °C
d. 1.6 mm from case
e. Uses IRF9Z14, SiHF9Z14 data and test conditions
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
1
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum Junction-to-Ambient (PCB
Mounted, steady-state)a
RthJA
RthJC
-
-
°C/W
Maximum Junction-to-Case (Drain)
3.5
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material)
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0, ID = -250 μA
-60
-
-
V
V/°C
V
VDS Temperature Coefficient
Reference to 25 °C, ID = -1 mA c
VDS = VGS, ID = -250 μA
-
-0.06
-
Gate-Source Threshold Voltage
Gate-Source Leakage
-2.0
-
-
-
-
-
-
-4.0
100
-100
-500
0.5
-
VGS
=
20 V
-
-
nA
VDS = -60 V, VGS = 0 V
Zero Gate Voltage Drain Current
IDSS
μA
V
DS = -48 V, VGS = 0 V, TJ = 150 °C
-
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
VGS = -10 V
VDS = -25 V, ID = -4.0 A c
ID = -4.0 A b
-
Ω
1.4
S
Input Capacitance
Ciss
Coss
Crss
Qg
-
-
-
-
-
-
-
-
-
270
170
31
-
-
-
VGS = 0 V,
DS = -25 V,
f = 1.0 MHz, see fig. 5 c
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
V
pF
-
12
3.8
5.1
-
ID = -6.7 A, VDS = -48 V,
see fig. 6 and 13 b, c
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Qgs
Qgd
td(on)
tr
V
GS = -10 V
-
nC
-
11
63
10
-
VDD = -30 V, ID = -6.7 A,
ns
Rg = 24 Ω, RD = 4.0 Ω, see fig. 10 b
Turn-Off Delay Time
td(off)
-
Fall Time
tf
-
1.4
-
31
-
-
8.7
-
Gate Input Resistance
Rg
LS
f = 1 MHz, open drain
Ω
Internal Source Inductance
Drain-Source Body Diode Characteristics
Between lead, and center of die contact
7.5
nH
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Current a
IS
-
-
-
-
-6.7
-27
A
G
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = -6.7 A, VGS = 0 V b
-
-
-
-
-5.5
160
190
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
80
96
ns
nC
TJ = 25 °C, IF = -6.7 A, dI/dt = 100 A/μs b, c
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %
c. Uses IRF9Z14, SiHF9Z14 data and test conditions
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
2
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
3.0
VGS
ID = - 6.7 A
Top
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
VGS = - 10 V
101
2.5
2.0
Bottom - 4.5 V
1.5
1.0
0.5
0.0
100
- 4.5 V
20 µs Pulse Width
TC = 25 °C
10-1
10-1
100
101
- 60 - 40- 20
0
20 40 60
100 120140 160
80 180
- VDS, Drain-to-Source Voltage (V)
91089_01
TJ, Junction Temperature (°C)
91089_04
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
600
VGS
VGS = 0 V, f = 1 MHz
Top
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
101
480
360
Ciss
Coss
Bottom - 4.5 V
100
240
120
0
- 4.5 V
Crss
20 µs Pulse Width
TC = 175 °C
10-1
10-1
100
101
100
101
- VDS
, Drain-to-Source Voltage (V)
91089_02
- VDS, Drain-to-Source Voltage (V)
91089_05
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
101
ID = - 6.7 A
V
DS = - 48 V
16
12
8
25 °C
175 °C
V
DS = - 30 V
100
10-1
4
20 µs Pulse Width
DS = - 25 V
For test circuit
see figure 13
V
0
4
5
6
7
8
9
10
0
6
15
3
9
12
91089_03
- VGS, Gate-to-Source Voltage (V)
QG, Total Gate Charge (nC)
91089_06
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
3
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
7.5
6.0
101
175 °C
4.5
3.0
25 °C
100
1.5
VGS = 0 V
5.0
6.0
10-1
0.0
1.0
2.0
3.0
4.0
25
50
75
100
125
150
175
- VSD, Source-to-Drain Voltage (V)
91089_07
TC, Case Temperature (°C)
91089_09
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 9 - Maximum Drain Current vs. Case Temperature
RD
102
VDS
Operation in this area limited
by RDS(on)
5
VGS
D.U.T.
Rg
10 µs
-
+
VDD
2
100 µs
- 10 V
10
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
5
1 ms
Fig. 10a - Switching Time Test Circuit
td(on) tr td(off) tf
TC = 25 °C
TJ = 175 °C
Single Pulse
2
10 ms
102
1
VGS
2
5
2
5
1
10
10 %
- VDS, Drain-to-Source Voltage (V)
91089_08
Fig. 8 - Maximum Safe Operating Area
90 %
VDS
Fig. 10b - Switching Time Waveforms
10
D = 0.5
1
0.2
0.1
PDM
0.05
Single Pulse
(Thermal Response)
0.02
0.01
t1
0.1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-2
10-5
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
91089_11
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
4
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
L
Current regulator
VDS
Same type as D.U.T.
Vary tp to obtain
required IAS
50 kΩ
D.U.T.
IAS
12 V
0.2 µF
Rg
-
0.3 µF
V
+
DD
-
V
+
DS
D.U.T.
- 10 V
0.01 Ω
tp
VGS
- 3 mA
Fig. 12a - Unclamped Inductive Test Circuit
IG
ID
Current sampling resistors
IAS
Fig. 13b - Gate Charge Test Circuit
VDS
VDD
tp
VDS
Fig. 12b - Unclamped Inductive Waveforms
500
ID
Top
- 2.7 A
- 4.7 A
400
300
200
100
0
Bottom - 6.7 A
VDD = - 25 V
25
125
75
100
150
175
50
91089_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
QG
- 10 V
QGS
QGD
VG
Charge
Fig. 13a - Basic Gate Charge Waveform
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
5
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-
+
-
+
-
Rg
+
-
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
Period
D =
P.W.
V
GS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current
ISD
Ripple ≤ 5 %
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91089.
S21-0904-Rev. D, 30-Aug-2021
Document Number: 91089
6
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
B
(Datum A)
3
4
A
A
E
c2
H
L1
4
Gauge
plane
0° to 8°
4
B
5
Detail A
Seating plane
D
H
L
C
C
A1
L3
L4
Detail “A”
1
2
3
L2
Rotated 90° CW
B
B
scale 8:1
A
2 x b2
2 x b
c
E
M
M
B
0.010
A
M
0.004
B
2 x e
Base
metal
5
D1
4
Plating
(c)
b1, b3
5
c1
(b, b2)
Lead tip
4
E1
Section B - B and C - C
Scale: none
View A - A
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
A
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.38
MAX.
4.83
0.25
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.330
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
DIM.
D1
E
MIN.
6.86
MAX.
MIN.
MAX.
-
10.67
-
0.270
0.380
0.245
-
0.420
-
A1
b
9.65
6.22
E1
e
b1
b2
b3
c
2.54 BSC
0.100 BSC
H
14.61
15.88
2.79
1.65
1.78
0.575
0.625
0.110
0.066
0.070
L
1.78
0.070
L1
L2
L3
L4
-
-
-
-
c1
c2
D
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
www.vishay.com
1
Package Information
Vishay Siliconix
I2PAK (TO-262) (HIGH VOLTAGE)
A
B
A
(Datum A)
E
c2
A
E
L1
D
Seating
plane
D1
C
C
L2
B
B
L
A
c
E1
3 x b2
3 x b
A1
Section A - A
Base
metal
2 x e
b1, b3
Plating
M
M
B
0.010
A
c1
c
(b, b2)
Lead tip
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
MAX.
MILLIMETERS
INCHES
MAX.
DIM.
A
MIN.
MAX.
4.83
3.02
0.99
0.89
1.78
1.73
0.74
0.58
1.65
MIN.
0.160
0.080
0.020
0.020
0.045
0.045
0.015
0.015
0.045
DIM.
MIN.
MAX.
MIN.
0.330
0.270
0.380
0.245
4.06
2.03
0.51
0.51
1.14
1.14
0.38
0.38
1.14
0.190
0.119
0.039
0.035
0.070
0.068
0.029
0.023
0.065
D
D1
E
8.38
6.86
9.65
6.22
9.65
0.380
A1
b
-
10.67
-
-
0.420
-
b1
b2
b3
c
E1
e
2.54 BSC
0.100 BSC
L
13.46
-
14.10
1.65
3.71
0.530
-
0.555
0.065
0.146
L1
L2
c1
c2
3.56
0.140
ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.
3. Thermal pad contour optional within dimension E, L1, D1, and E1.
4. Dimension b1 and c1 apply to base metal only.
Document Number: 91367
Revision: 27-Oct-08
www.vishay.com
1
AN826
Vishay Siliconix
2
RECOMMENDED MINIMUM PADS FOR D PAK: 3-Lead
0.420
(10.668)
0.145
(3.683)
0.135
(3.429)
0.200
0.050
(5.080)
(1.257)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 73397
11-Apr-05
www.vishay.com
1
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
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with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
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Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
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Revision: 01-Jan-2022
Document Number: 91000
1
相关型号:
![](http://pdffile.icpdf.com/pdf2/p00218/img/page/IRF9531-004_1244876_files/IRF9531-004_1244876_1.jpg)
IRF9Z20-005
Power Field-Effect Transistor, 9.7A I(D), 50V, 0.28ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
![](http://pdffile.icpdf.com/pdf2/p00218/img/page/IRF9531-004_1244876_files/IRF9531-004_1244876_1.jpg)
IRF9Z20-005PBF
Power Field-Effect Transistor, 9.7A I(D), 50V, 0.28ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
![](http://pdffile.icpdf.com/pdf2/p00263/img/page/IRF9Z20PBF_1583765_files/IRF9Z20PBF_1583765_1.jpg)
![](http://pdffile.icpdf.com/pdf2/p00263/img/page/IRF9Z20PBF_1583765_files/IRF9Z20PBF_1583765_2.jpg)
IRF9Z20PBF
Power Field-Effect Transistor, 9.7A I(D), 50V, 0.28ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB,
VISHAY
![](http://pdffile.icpdf.com/pdf2/p00286/img/page/IRF9613_1723473_files/IRF9613_1723473_1.jpg)
IRF9Z22
Power Field-Effect Transistor, 8.9A I(D), 50V, 0.33ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, TO-220, 3 PIN
SAMSUNG
![](http://pdffile.icpdf.com/pdf2/p00218/img/page/IRF9531-004_1244876_files/IRF9531-004_1244876_1.jpg)
IRF9Z22-005
Power Field-Effect Transistor, 8.9A I(D), 50V, 0.33ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
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