VIV0101MHJ [VICOR]
DC to DC Voltage Transformation; 直流到直流电压转换
| 型号： | VIV0101MHJ |
| 厂家： | 
VICOR CORPORATION |
| 描述： | DC to DC Voltage Transformation |
| 文件： | 总16页 (文件大小：1429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VIV0101THJ
PRELIMINARY DATASHEET
S
C
NRTL US
TM
VTM
DC to DC
Voltage Transformation
FEATURES
DESCRIPTION
•
The V I Chip Voltage Transformation Module is a high efficiency
(>95%) Sine Amplitude Converter (SAC)TM operating from a 26 to
55 Vdc primary bus to deliver an isolated 12 V secondary. The
Sine Amplitude Converter offers a low AC impedance beyond
the bandwidth of most downstream regulators, which means
that capacitance normally at the load can be located at the
input to the Sine Amplitude Converter. Since the K factor of the
VIV0101THJ is 1/4, that capacitance value can be reduced by a
factor of 16x, resulting in savings of board area, materials and
total system cost.
• 48 Vdc – 12 Vdc 10 A Voltage Transformation Module
- Operating from standard 48 V or 24 V PRMs
• High efficiency (>95%) reduces system power
consumption
• High density (801 W/in3)
• “Half Chip” V•I Chip package enables surface mount,
low impedance interconnect to system board
• Contains built-in Protection features:
- Overvoltage lockout
- Overcurrent
•
The VIV0101THJ is provided in a V I Chip package compatible
with standard pick-and-place and surface mount assembly
•
processes. The V I Chip package provides flexible thermal
- Short circuit
management through its low junction-to-case and junction-to-
board thermal resistance. With high conversion efficiency the
VIV0101THJ increases overall system efficiency and lowers
operating costs compared to conventional approaches.
The VIV0101THJ enables the utilization of Factorized Power
Architecture providing efficiency and size benefits by lowering
conversion and distribution losses and promoting high density
point of load conversion.
- Over temperature protection
• Provides enable/disable control, internal temperature
monitoring, current monitoring
• ZVS/ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
TYPICAL APPLICATION
• High End Computing Systems
• Automated Test Equipment
• Telecom Base Stations
(NOM)
VIN = 26 – 55 V
IOUT = 10 A
VOUT = 6.5 – 13.8 V (NO LOAD)
K = 1/4
• High Density Power Supplies
• Communication Systems
TYPICAL APPLICATION
VC
PR
SG
OS
CD
PC
TM
IL
L
O
A
D
PRM
+In
+Out
+Out
+In
IM
TM
VC
PC
VTM
VIN
-Out
-Out
-In
-In
Rev. 1.3
9/2009
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Page 1 of 16
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
CONTROL PIN SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
See section 5.0 for further application details and guidelines.
+IN to –IN . . . . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc – +60 Vdc
PC to –IN . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +20 Vdc
TM to –IN . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +7.0 Vdc
+IN/-IN to +OUT/-OUT . . . . . . . . . . . . . . . . . . . 2250 V (Hi Pot)
+IN/-IN to +OUT/-OUT. . . . . . . . . . . . . . . . . . . . 60 V (working)
+OUT to –OUT . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc - +16 Vdc
Temperature during reflow . . . . . . . . . . . . . . . . . 225°C (MSL5)
•
PC (V I Chip VTM Primary Control)
The PC pin can enable and disable the VTM. When held below
2.0 V the VTM will be disabled. When allowed to float with an
impedance to –IN of greater than 60 kΩ the module will start.
The PC pin is capable of being driven high either by an external
logic signal or internal pull up to 5 V (operating).
•
TM (V I Chip VTM Temperature Monitor)
PACKAGE ORDERING INFORMATION
The TM pin monitors the internal temperature of the VTM
within an accuracy of 5°C. It has a room temperature
setpoint of ~3.0 V and an approximate gain of 10 mV/°C. It
can source up to 100 µA and may also be used as a “Power
Good” flag to verify that the VTM is operating.
4
3
2
1
A
B
C
D
+In
+Out
-Out
IM
E
F
TM
VC
PC
-In
J
K
L
G
H
IM (V•I Chip Current Monitor)
M
The IM pin provides a DC analog voltage proportional to the
output current of the VTM. This voltage varies between 0.4
and 2.4 V and represents VTM output current within 25% of
the actual value under all operating line temperature
conditions between 50% and 100% load.
Bottom View
Signal
Name
+In
–In
IM
TM
Designation
A1-B1, A2-B2
L1-M1, L2-M2
E1
VC (VTM Control)
F2
In typical applications, the VC pin of the VTM is tied to the VC
pin of the PRMTM Regulator. In these applications the PRM
provides a temporary VC voltage during startup synchronizing
the output rise of the two devices. In addition, the VC port
provides feedback to the PRM on its output resistance through
an internal resistor.
VC
PC
+Out
–Out
G1
H2
A3-D3, A4-D4
J3-M3, J4-M4
For applications which do not use a PRM, a voltage between 12 V
and 17 V must be applied to VC in order to enable the VTM.
PART NUMBER
DESCRIPTION
VIV0101THJ
-40°C – 125°C TJ, J lead
VIV0101MHJ
-55°C – 125°C TJ, J lead
Rev. 1.3
9/2009
Page 2 of 16
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
1.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the
temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted
ATTRIBUTE
Voltage range
SYMBOL
CONDITIONS / NOTES
No external VC applied
MIN
26
TYP
MAX
UNIT
55
1
2.4
3.4
Vdc
V/µs
W
VIN
dVIN/dt
dV/dt
VIN = 48 V
1.7
4.5
No load power dissipation
PNL
VIN = 26 V to 55 V
VC enable, VIN = 48 V COUT = 500 µF,
IOUT = 10 A
W
Inrush Current Peak
DC Input Current
IINR-P
12
A
A
IIN-DC
2.7
VOUT
K Factor
K
1/4
V/V
A
(
)
VIN
IOUT-AVG
IOUT-PK
POUT-AVG
VOUT
Output Current(average)
10
I
TPEAK <10 ms, OUT_AVG ≤ 10 A
I
Output Current(Peak)
Output Power (average)
Output Voltage
15
135
14.0
A
W
V
OUT_AVG ≤ 10 A
Section 3.0
5.6
93
90
VIN = 48 V, TJ =25ºC, IOUT = 10 A
VIN = 26 V to 55 V, TJ = 25ºC IOUT = 10 A
VIN = 48 V, TJ = 100° C, IOUT = 10 A
95
94
ηAMB
Efficiency (Ambient)
Efficiency (Hot)
%
%
ηHOT
92.6
η20%
Efficiency (Over load range)
Output Resistance (Ambient)
Output Resistance (Hot)
2 A < IOUT < 10 A
TJ = 25°C
TJ = 125°C
TJ = -40°C
VTM Standalone Operation.
VIN pre-applied, VC enable
88.5
32
40
%
ROUT-AMB
ROUT-HOT
ROUT-COLD
46
58
38
60
75
50
mΩ
mΩ
mΩ
Output Resistance (Cold)
26
Load Capacitance
COUT
500
µF
FSW
FSW-RP
Switching Frequency
Ripple Frequency
1.6
3.2
1.75
3.5
1.9
3.8
MHz
MHz
COUT = 0 µf, IOUT = 10 A VIN = 48 V,
20 MHz BW, Section 8.0
VOUT-PP
Output Voltage Ripple
135
350
mV
PC
VPC
PC Voltage (Operating)
PC Voltage (Enable)
PC Voltage (Disable)
PC Source Current (Startup)
PC Source Current (Operating)
PC Resistance (Internal)
4.7
2
5
2.5
5.3
3
V
V
VPC-EN
VPC-DIS
IPC-EN
IPC-OP
RPC-INT
2.0
300
2
V
50
100
150
µA
mA
kΩ
kΩ
Internal pull down resistor
Connected to –IN. Unit will not start
if below minimum value
Section 5.0
50
60
400
PC Resistance (External)
RPC-EXT
CPC-INT
TPC-DIS
TFR-PC
PC Capacitance (Internal)
PC Disable Time
PC Fault Response Time
50
pF
µs
µs
4
100
From fault to PC = 2.0 V
TJ = 27°C
TM
VTM-AMB
ATM
ITM
RTM-INT
CTM-EXT
TM Voltage (Ambient)
TM Gain
TM Source Current
TM Resistance (Internal)
TM Capacitance (External)
2.95
25
3
10
3.05
V
mV/°C
µA
100
50
50
Internal pull down resistor
40
kΩ
pF
Rev. 1.3
9/2009
Page 3 of 16
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
1.0 ELECTRICAL CHARACTERISTICS (CONT.)
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the
temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted
ATTRIBUTE
TM (CONT.)
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
200
UNIT
V
CTM = 0 uF, IN = 48 V,
VTM-PP
TFR-TM
TM Voltage Ripple
120
10
mV
µs
I
OUT = 10 A,
20 MHz BW
TM Fault Response Time
From fault to TM = 1.5 V
IM
VIM-NL
VIM-50%
VIM-FL
AIM
IM Voltage (No Load)
IM Voltage (50%)
IM Voltage (Full Load)
IM Gain
TJ = 25ºC, VIN = 48 V, IOUT = 0
TJ = 25ºC, VIN = 48 V, IOUT = 5 A
TJ = 25ºC, VIN = 48 V, IOUT = 10 A
TJ = 25ºC, VIN = 48 V, IOUT > 5 A
0.5
0.8
1.2
1.8
110
1.1
V
V
V
mV/A
MΩ
RIM-EXT
IM Resistance (External)
2.5
VC
Required for startup, and operation
below 26 V. See Section 5.0
Required for proper startup
VC = 14 V, Vin = 0
VC = 17 V, dVC/dt = 0.25 V/µs
VC = 0 V
External VC Voltage
VVC-EXT
12
17
V
VC Slew Rate
VC Current Draw (steady-state)
VC Inrush Current
dVC/dt
IVC
0.0025
0.25
125
750
V/µs
mA
mA
µF
72
IINR-VC
CVC-INT
Internal VC Capacitance
2.2
V
IN pre-applied, PC floating, VC enable,
TON
Output Turn-On Delay (VC)
500
µs
µs
CPC = 0 µF, COUT = 500 uF
VC = 10.5 V to PC high, VIN = 0 V,
dVC/dt = 0.25 V/µs
TVC-PC
VC to PC Delay
10
25
TVC-AP
RVC-INT
VC Application Time
VC Internal Resistor
Maximum application time of VC
20
ms
2.05
kΩ
PROTECTION
Positive Going OVLO
UV Turn-Off
Output Overcurrent Trip
VIN_OVLO+
VIN_UVTO
IOCP
55.5
58.6
19.2
20.5
59.8
26
32
V
V
A
10.5
15
Short Circuit Protection
Trip Current
Thermal Shutdown Setpoint
Output Overcurrent
Response Time Constant
ISCP
TJ-OTP
TOCP
40
A
125
130
4.5
135
°C
ms
Effective internal RC filter
Short Circuit Protection
Response Time
Overvoltage Lockout
Response Time Constant
TSCP
From detecton to cessation of switching
Effective internal RC filter
1
µs
µs
TOVLO
2.4
GENERAL SPECIFICATION
Isolation Voltage (Hi-Pot)
Working Voltage (IN – OUT)
Isolation Capacitance
Isolation Resistance
MTBF
VHIPOT
VIN-OUT
CIN-OUT
RIN-OUT
2,250
VDC
V
pF
60
2150
Unpowered Unit
1350
10
1750
MΩ
MIL HDBK 217F, 25ºC, Ground Benign
4.5
MHrs
cTUVus
Agency Approvals / Standards
CE Mark
ROHS 6 of 6
Rev. 1.3
9/2009
Page 4 of 16
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
No Load Power Dissipation vs. Line
Full Load Efficiency vs. Case Temperature
3
2.5
2
96
95
94
93
92
91
90
89
1.5
1
0.5
25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55
-40
-20
0
20
40
60
55 V
80
100
Input Voltage (V)
Case Temperature (C)
V
IN
:
26 V
48 V
TCASE
:
-40°C
25°C
100°C
Figure 1 – No load power dissipation vs. VIN; TCASE
Figure 2 – Full load efficiency vs. temperature; VIN
Efficiency & Power Dissipation -40°C Case
Efficiency and Power Dissipation 25°C Case
96
94
12
11
10
9
96
94
92
12
11
10
9
92
η
η
90
88
86
84
82
90
8
88
86
84
8
7
7
6
6
5
82
5
PD
80
78
76
74
72
PD
4
80
4
3
78
76
74
72
3
2
2
1
1
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
Output Current (A)
Output Current (A)
26 V
48 V 55 V 26 V
48 V
55 V
26 V
48 V 55 V 26 V
48 V
55 V
VIN:
VIN:
Figure 3a – Efficiency and power dissipation at -40°C (case); VIN
Figure 3b – Efficiency and power dissipation at 25°C (case); VIN
Efficiency & Power Dissipation 100°C Case
ROUT vs. Case Temperature
96
94
12
11
10
9
65
60
55
50
45
40
35
30
92
η
90
88
86
84
82
8
7
6
5
PD
80
78
76
74
72
4
3
2
1
0
0
1
2
3
4
5
6
7
8
9
10
-40
-20
0
20
40
60
80
100
Output Current (A)
Case Temperature (C)
26 V
48 V
55 V
26 V
48 V
55 V
VIN:
IOUT
:
1 A
10 A
Figure 3c – Efficiency and power dissipation at 100°C (case); VIN
Figure 4 – ROUT vs. temperature vs. IOUT
Rev. 1.3
9/2009
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Page 5 of 16
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
Ripple vs. Load
140
130
120
110
100
0
1
2
3
4
5
6
7
8
9
10
Load Current (A)
Vpk-pk (mV)
Figure 5 – Full load ripple, 100 µF CIN; No external COUT
Figure 6 – Vripple vs. IOUT ; 48 VIN, no external output capacitance
IM Voltage vs. Load 25°C Case
IM Voltage vs. Load 48 VIN
2.25
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
2
1.75
1.5
1.25
1
0.75
0.5
0.25
0
0
2
4
6
8
10
0
2
4
6
8
10
Load Current (A)
Load Current (A)
TCASE
:
-40°C
25°C
100°C
V :
IN
26 V
48 V
55 V
Figure 7 – IM voltage vs. load; 48 VIN
Figure 8 – IM voltage vs. load; 25°C Case
Full Load IM Voltage vs. TCASE & Line
2.50
2.25
2.00
1.75
1.50
1.25
1.00
-40
-20
:
0
20
40
60
80
100
Case Temperature (°C)
V
26 V
48 V
55 V
IN
Figure 9 – Full load IM voltage vs. TCASE & line
Figure 10 – Start up from application of VC; Vin pre-applied
COUT = 500 µF
Rev. 1.3
9/2009
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Page 6 of 16
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
Figure 11 – Start up from application of VIN; VC pre-applied
OUT = 500 µF
Figure 12 – 0 – 10 A transient response;
CIN = 100 µF, no external COUT
C
Figure 13 –10 A – 0 A transient response;
Figure 14 – PC disable waveform;
RLOAD = 1.2 Ω, COUT = 500 µF
CIN = 100 µF, no external COUT
Rev. 1.3
9/2009
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Page 7 of 16
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
2.0 PACKAGE/MECHANICAL SPECIFICATIONS
All specifications are at TJ=25ºC unless otherwise noted. See associated figures for general trend data.
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
UNIT
Length
Width
Height
Volume
Footprint
L
W
H
Vol
F
21.7 / 0.85
16.4 / 0.64
22.0 / 0.87
16.5 / 0.65
22.3 / 0.88
16.6 / 0.66
mm/in
mm/in
6.48 / 0.255 6.73 / 0.265 6.98 / 0.275 mm/in
No Heatsink
No Heatsink
No Heatsink
2.44 / 0.150
3.6 / 0.56
801
cm3/in3
cm2/in2
W/in3
oz/g
µm
µm
µm
°C
°C
°C
°C
°C/W
Ws/°C
Power Density
Weight
PD
W
0.28/8
Nickel
Palladium
Gold
VIV0101THJ (T-Grade)
VIV0101MHJ (M-Grade)
VIV0101THJ (T-Grade)
VIV0101MHJ (M-Grade)
Junction to Case
0.51
0.02
0.003
-40
-55
-40
2.03
0.15
0.05
125
125
125
125
2.7
Lead Finish
Operating Temperature (Junction)
Storage Temperature
TJ
TST
-65
Thermal Impedance
Thermal Capacity
ØJC
5
Peak Compressive Force
Applied to Case (Z-axis)
Supported by J-leads only
3.0
lbs
2.5
Moisture Sensitivity Level
MSL Level 5
Human Body Model[a]
Machine Model[b]
5
1500
400
ESDHBM
ESDMM
VDC
VDC
°C
ESD Rating
Peak Temperature During Reflow
Peak Time Above 183°C
Peak Heating Rate During Reflow
Peak Cooling Rate Post Reflow
225
150
3
s
1.5
1.5
°C/s
°C/s
6
[a]
[b]
JEDEC JESD 22-A114C.01
JEDED JESD 22-A115-A
Rev. 1.3
9/2009
Page 8 of 16
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
2.1 MECHANICAL DRAWING
mm
(inch)
2.2 RECOMMENDED LAND PATTERN
2.3 RECOMMENDED LAND PATTERN FOR PUSH PIN HEATSINK
22.52
(0.887)
21.00
(0.827)
Notes:
1. Maintain 3.50 (0.138) Dia. keep-out zone
free of copper, all PCB layers.
21.00
(0.827)
0.76
(0.030)
2.95 0.07
2.95 0.07
ø
ø
10.50
2. (A) minimum recommended pitch is 24.00 (0.945)
this provides 7.50 (0.295) component
edge–to–edge spacing, and 0.50 (0.020)
clearance between Vicor heat sinks.
(
)
10.50
Dashed lines indicates
half VIC position
(0.116 0.003)
non-plated
thru hole
(0.116 0.003)
non-plated
thru hole
Dashed lines indicates
half VIC position
(
)
(0.413)
(0.413)
See note 1
See note 1
(B) Minimum recommended pith is 25.50 (1.004).
This provides 9.00 (0.354) component
edge–to–edge spacing, and 2.00 (0.079)
clearence between Vicor heat sinks.
3.50
(0.138)
0.44
(0.017)
3.50
(0.138)
(
)
7.63
(0.300)
7.63
(0.300)
(
)
3. V•I Chip land pattern shown for reference
only, actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all half size V•I Chips.
6.12
(0.241)
22.26
7.00
(0.876) (0.276)
22.26
)
7.00
(0.876) (0.276)
(
)
(
4. RoHS complient per CST–0001 latest revision.
5. Unless otherwise specified:
Dimensions are mm (inches)
tolerances are:
x.x (x.xx) = 0.13 (0.01)
x.xx (x.xxx) = 0.13 (0.005)
2.03
ø
(0.080)
(2) Pl.
15.48
(0.609)
15.48
(0.609)
24.00
(0.945)
See Note 2A
2.76
(0.109)
(
)
(
)
plated
thru hole
See note 6
2.76
(0.109)
25.50
(1.004)
See note 2B
6. Plated through holes for grounding clips (33855)
shown for reference, Heatsink orientation and
device pitch will dictate final grounding solution.
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Rev. 1.3
9/2009
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
Page 9 of 16
vicorpower.com
VIV0101THJ
PRELIMINARY DATASHEET
3.0 POWER, VOLTAGE, EFFICIENCY RELATIONSHIPS
Because of the high frequency, fully resonant SAC topology,
power dissipation and overall conversion efficiency of VTM
converters can be estimated as shown below.
OUTPUT
POWER
INPUT
POWER
Key relationships to be considered are the following:
1. Transfer Function
a. No load condition
PR
OUT
PNL
VOUT = VIN • K
Eq. 1
Figure 15 – Power transfer diagram
Where K (transformer turns ratio) is constant
for each part number
b. Loaded condition
VOUT = VIN • K – IOUT • ROUT
Eq. 2
2. Dissipated Power
The two main terms of power losses in the
VTM module are:
- No load power dissipation (PNL) defined as the power
used to power up the module with an enabled power
train at no load.
- Resistive loss (ROUT) refers to the power loss across
the VTM modeled as pure resistive impedance.
~
~
PDISSIPATED
P
NL + PROUT
Eq. 3
Therefore, with reference to the diagram shown in Figure 15
POUT = PIN – PDISSIPATED = PIN – PNL – PROUT Eq. 4
Notice that ROUT is temperature and input voltage dependent
and PNL is temperature dependent (See Figure 15).
The above relations can be combined to calculate the overall module efficiency:
POUT
PIN
PIN – PNL – PROUT
VIN • IIN – PNL – (IOUT)2 • ROUT
PNL + (IOUT)2 • ROUT
η
=
=
=
= 1 –
Eq. 5
(
)
PIN
VIN • IIN
VIN • IIN
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PRELIMINARY DATASHEET
4.0 OPERATING
Figure 16 – Timing diagram
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5.0 USING THE CONTROL SIGNALS VC, PC, TM, IM
The Primary Control (PC) pin can be used to accomplish the
following functions:
The VTM Control VC pin is an input pin which powers the
internal VCC circuitry when within the specified voltage range
of 12 V to 17 V. This voltage is required in order for the VTM to
start, and must be applied as long as the input is below 26 V.
In order to ensure a proper start, the slew rate of the applied
voltage must be within the specified range. Depending on the
sequencing of the VC with respect to the input voltage, the
behavior during startup will vary as follows:
• Delayed start: Upon the application of VC, the PC pin will
source a constant 100 µA current to the internal RC
network. Adding an external capacitor will allow further
delay in reaching the 2.5 V threshold for module start
• Auxiliary voltage source: Once enabled in regular
operational conditions (no fault), each VTM PC provides a
regulated 5 V, 2 mA voltage source
• Normal Operation (VC applied prior to VIN): In this case
the controller is active prior to the input. When the input
voltage is applied, the VTM output voltage will track the
input allowing for a soft start (See Figure 11). If the VC
voltage is removed prior to the input reaching 26 V, the
VTM will shut down.
• Output Disable: PC pin can be actively pulled down in order
to disable the module. Pull down impedance shall be lower
than 850 Ω.
• Fault detection flag: The PC 5V voltage source is internally
turned off as soon as a fault is detected. For system
monitoring purposes (microcontroller interface) faults are
detected on falling edges of PC signal. It is important to
notice that PC doesn’t have current sink capability (only
150 kΩ pull down is present), therefore in an array PC line
will not be capable of disabling all the modules if a fault is
detected on one of them.
• Stand Alone Operation (VC applied after VIN): In this
case the VTM output will begin to rise upon the application
of the VC voltage (See Figure 10). The output rate of rise will
vary depending on the amount of output capacitance in
order to limit the inrush current. In this mode of operation,
the maximum output capacitance is 500 µF due to
limitations of the inrush limiting circuitry.
The Temperature Monitor (TM) pin provides a voltage
proportional to the absolute temperature of the converter
control IC.
Some additional notes on the using the VC pin:
• In most applications, the VTM will be powered by an
upstream PRM, in which case the PRM will provide a 10 ms VC
pulse during startup. In these applications the VC pins of the
PRM and VTM should be tied together.
It can be used to accomplish the following functions:
• Monitor the control IC temperature: The temperature in
degrees Kelvin is equal to the voltage on the TM pin scaled
by x100. (i.e. 3.0 V = 300°K = 27ºC). It is important to
• The fault response of the VTM is latching. A positive edge on
VC is required in order to restart the unit.
•
remember that V I Chips are multi-chip modules, whose
temperature distribution greatly vary for each part number as
well with input/output conditions, thermal management and
environmental conditions. Therefore, TM cannot be used to
thermally protect the system.
• The VTM is not designed for continuous operation with VC
applied. The VC voltage must be removed within 20 ms of
application.
• The VTM is capable of reverse operation. If a voltage is
present at the output of the VTM which satisfies the condition
• Fault detection flag: the TM voltage source is internally
turned off as soon as a fault is detected.
The Current Monitor (IM) pin provides a voltage proportional
to the output current of the VTM. The voltage will vary
between 0.4 V and 2.4 V over the output current range of the
VTM (See Figure 7). The accuracy of the IM pin will be within
25% under all line and temperature conditions between 50%
and 100% load. The accuracy of the pin can be improved
using a predictive algorithm based on the input voltage and
internal temperature. Please contact Applications Engineering
for more information.
VOUT > VIN • K
at the time the VC voltage is applied, then energy will be
transferred from secondary to primary. The input to output
ratio of the VTM will be maintained. The VTM will continue to
operate in reverse once the VC voltage is removed as long as
the input and output voltages are within the specified range.
The VIV0101THJ has not been qualified for continuous reverse
operation.
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6.0 FUSE SELECTION
This type of characteristic is close to the impedance
characteristic of a DC power distribution system, both in
behavior (AC dynamic) and absolute value (DC dynamic).
•
V I Chips are not internally fused in order to provide flexibility
•
in configuring power systems. Input line fusing of V I Chips is
recommended at system level, to provide thermal protection in
case of catastrophic failure.
When connected in an array (with same K factor), the VTM
module will inherently share the load current with parallel
units, according to the equivalent impedance divider that the
system implements from the power source to the point of load.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
It is important to notice that, when successfully started, VTMs
are capable of bi-directional operations (reverse power transfer
is enabled if the VTM input falls within its operating range and
the VTM is otherwise enabled). In parallel arrays, because of
the resistive behavior, circulating currents are never
• Current rating (usually greater than maximum VTM current)
• Maximum voltage rating (usually greater than the maximum
possible input voltage)
• Ambient temperature
• Nominal melting I2t
experienced, because of energy conservation law.
General recommendations to achieve matched array
impedances are (see also AN016 for further details):
7.0 CURRENT SHARING
• to dedicate common copper planes within the PCB to
deliver and return the current to the modules
The SAC topology bases its performance on efficient transfer
of energy through a transformer, without the need of closed
loop control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop
and positive temperature coefficient.
• to provide the PCB layout as symmetric as possible
• to apply same input/output filters (if present) to each unit
ZIN_EQ1
ZOUT_EQ1
VIN
VOUT
VTM1
RO_1
ZIN_EQ2
ZOUT_EQ2
VTM2
RO_2
+
Load
DC
–
ZIN_EQn
ZOUT_EQn
VTMn
RO_n
Figure 17 – VTM Array
Rev. 1.3
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8.0 INPUT AND OUTPUT FILTER DESIGN
A major advantage of a SAC systems versus conventional PWM
converter is that the former does not require large functional
filters. The resonant LC tank, operated at extreme high
frequency, is amplitude modulated as function of input voltage
and output current and efficiently transfers charge through the
isolation transformer. A small amount of capacitance embedded
in the input and output stages of the module is sufficient for
full functionality and is key to achieve power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
1.Guarantee low source impedance:
To take full advantage of the VTM dynamic response, the
impedance presented to its input terminals must be low
from DC to approximately 5 MHz. The connection of the
•
V I Chip to its power source should be implemented with
minimal distribution inductance. If the interconnect
inductance exceeds 100 nH, the input should be bypassed
with a RC damper to retain low source impedance and
stable operation. With an interconnect inductance of
200 nH, the RC damper may be as high as 47 µF in series
with 0.3 Ω. A single electrolytic or equivalent low-Q
capacitor may be used in place of the series RC bypass
2.Further reduce input and/or output voltage ripple without
sacrificing dynamic response:
Given the wide bandwidth of the VTM, the source
response is generally the limiting factor in the overall
system response. Anomalies in the response of the source
will appear at the output of the VTM multiplied by its
K factor.
3.Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
cause failures:
•
The V I Chip input/output voltage ranges shall not be
exceeded. An internal overvoltage lockout function
prevents operation outside of the normal operating input
range. Even during this condition, the powertrain is
exposed to the applied voltage and power MOSFETs must
withstand it. A criterion for protection is the maximum
amount of energy that the input or output switches can
tolerate if avalanched.
Owing to the wide bandwidth and low output impedance of
the VTM, low frequency bypass capacitance and significant en-
ergy storage may be more densely and efficiently provided by
adding capacitance at the input of the VTM.
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Figure 18 – VTM block diagram
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PRELIMINARY DATASHEET
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in
normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper applica-
tion or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the
original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this war-
ranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions.
Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in re-
turning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of
this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is
assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve
reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or
circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not
recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten
life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes
all risks of such use and indemnifies Vicor against all damages.
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for
its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or
malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are
available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent
applications) relating to the products described in this data sheet. Interested parties should contact Vicor's Intel-
lectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917;
7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for
use under 6,975,098 and 6,984,965.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
Rev. 1.3
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