V048T060T040A [VICOR]

DC DC CONVERTER 6V 240W;
V048T060T040A
型号: V048T060T040A
厂家: VICOR CORPORATION    VICOR CORPORATION
描述:

DC DC CONVERTER 6V 240W

文件: 总18页 (文件大小:1296K)
中文:  中文翻译
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Not Recommended for New Designs  
VTM Current Multiplier  
V048x060y040A  
S
C
NRTL US  
High Efficiency, Sine Amplitude Converter™  
FEATURES  
DESCRIPTION  
The VI Chip current multiplier is a high efficiency (>96%)  
Sine Amplitude Converter™ (SAC) operating from a  
26 to 55 Vdc primary bus to deliver an isolated output. The  
Sine Amplitude Converter offers a low AC impedance beyond  
the bandwidth of most downstream regulators; therefore  
capacitance normally at the load can be located at the input to  
the Sine Amplitude Converter. Since the K factor of the  
V048x060y040A is 1/8, the capacitance value can be reduced  
by a factor of 64, resulting in savings of board area, materials  
and total system cost.  
48 Vdc to 6 Vdc 40 A current multiplier  
- Operating from standard 48 V or 24 V PRM® Regulators  
High efficiency (>96%) reduces system power  
consumption  
High density (136 A/in3)  
“Full Chip” VI Chip® package enables surface mount,  
low impedance interconnect to system board  
Contains built-in protection features against:  
- Overvoltage Lockout  
- Overcurrent  
- Short Circuit  
- Overtemperature  
The V048x060y040A is provided in a VI Chip package  
compatible with standard pick-and-place and surface mount  
assembly processes. The co-molded VI Chip package provides  
enhanced thermal management due to a large thermal  
interface area and superior thermal conductivity. The high  
conversion efficiency of the V048x060y040A increases overall  
system efficiency and lowers operating costs compared to  
conventional approaches.  
Provides enable/disable control,  
internal temperature monitoring  
ZVS/ZCS resonant Sine Amplitude Converter topology  
The V048x060y040A enables the utilization of Factorized  
Power Architecture™ which provides efficiency and size  
benefits by lowering conversion and distribution losses and  
promoting high density point of load conversion.  
Less than 50ºC temperature rise at full load  
in typical applications  
TYPICAL APPLICATIONS  
(NOM)  
VIN = 26 to 55 V  
IOUT = 40 A  
K = 1/8  
High End Computing Systems  
Automated Test Equipment  
High Density Power Supplies  
Communications Systems  
(NO LOAD)  
VOUT = 3.3 to 6.9 V  
PART NUMBERING  
PART NUMBER  
PACKAGE STYLE  
PRODUCT GRADE  
T = -40 to 125°C  
M = -55 to 125°C  
F = J-Lead  
y
V048 x 060 040  
A
T = Through hole  
For Storage and Operating Temperatures see Section 6.0 General Characteristics  
TYPICAL APPLICATION  
Regulator  
Voltage Transformer  
VC  
TM  
VC  
PC  
L
PR  
SG  
OS  
CD  
PC  
TM  
IL  
VTM®  
PRM®  
Regulator  
(See Application Note AN:024)  
O
A
Transformer  
+Out  
+Out  
+In  
+In  
D
VIN  
-Out  
-Out  
-In  
-In  
Factorized Power ArchitectureTM  
VTM® Current Multiplier  
Page 1 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS  
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent  
damage to the device.  
MIN  
MAX  
60  
UNIT  
VDC  
MIN  
VC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
+ IN / - IN to + OUT / - OUT (hipot) . . .  
MAX  
20  
UNIT  
VDC  
+ IN to - IN . . . . . . . . . . . . . . . . . . . . . . . -1.0  
PC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
TM to -IN . . . . . . . . . . . . . . . . . . . . . . . . -0.3  
20  
VDC  
2250  
12  
VDC  
7
VDC  
+ OUT to - OUT....................................... -1.0  
VDC  
2.0 ELECTRICAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40°C < TJ < 125 °C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
No external VC applied  
VC applied  
MIN  
TYP  
MAX  
UNIT  
26  
0
55  
55  
1
Input voltage range  
VIN slew rate  
IN UV turn off  
VIN  
VDC  
V/µs  
V
dVIN /dt  
VIN_UV  
Module latched shutdown,  
No external VC applied, IOUT = 40A  
V
24  
26  
V
IN = 48 V  
VIN = 26 V to 55 V  
IN = 48 V, TC = 25 ºC  
0.9  
7.3  
8.4  
3.5  
5.5  
No Load power dissipation  
Inrush current peak  
PNL  
W
A
V
2.7  
12  
1/8  
VIN = 26 V to 55 V, TC = 2 ºC  
VC enable, VIN = 48 V, COUT = 4000 µF,  
RLOAD = 144 mΩ  
IINRP  
25  
DC input current  
Transfer ratio  
Output voltage  
IIN_DC  
K
VOUT  
5.5  
A
V/V  
V
K = VOUT/VIN, IOUT = 0 A  
VOUT = VIN K - IOUT ROUT, Section 11  
Output current (average)  
Output current (peak)  
Output power (average)  
IOUT_AVG  
IOUT_PK  
POUT_AVG  
40  
60  
A
A
W
TPEAK < 10 ms, IOUT_AVG 40 A  
IOUT_AVG 40 A  
264  
VIN = 48 V, IOUT = 40 A  
VIN = 26 V to 55 V, IOUT = 40 A  
VIN = 48 V, IOUT = 20 A  
94.0  
89.3  
94.7  
Efficiency (ambient)  
Efficiency (hot)  
hAMB  
%
%
94.8  
92.8  
87.5  
2.5  
3.8  
4.5  
95.6  
94.5  
hHOT  
h20%  
ROUT_COLD  
ROUT_AMB  
ROUT_HOT  
FSW  
VIN = 48 V, TC = 100°C, IOUT = 40 A  
Efficiency (over load range)  
Output resistance (cold)  
Output resistance (ambient)  
Output resistance (hot)  
Switching frequency  
8 A < IOUT < 40 A  
%
TC = -40°C, IOUT = 40 A  
TC = 25°C, IOUT = 40 A  
TC = 100°C, IOUT = 40 A  
mΩ  
mΩ  
mΩ  
MHz  
MHz  
4.5  
5.8  
6.5  
5.9  
7.1  
9.0  
1.30  
2.60  
1.10  
2.20  
1.21  
2.42  
Output ripple frequency  
FSW_RP  
COUT = 0 F, IOUT = 40 A, VIN = 48 V,  
20 MHz BW, Section 12  
Output voltage ripple  
VOUT_PP  
145  
275  
mV  
Frequency up to 30 MHz,  
Simulated J-lead model  
Effective Value at 6 VOUT  
VTM Standalone Operation.  
VIN pre-applied, VC enable  
Output inductance (parasitic)  
Output capacitance (internal)  
Output capacitance (external)  
LOUT_PAR  
COUT_INT  
COUT_EXT  
600  
45  
pH  
µF  
µF  
4000  
PROTECTION  
Overvoltage lockout  
Overvoltage lockout  
response time constant  
Output overcurrent trip  
Short circuit protection trip current  
Output overcurrent  
VIN_OVLO+  
TOVLO  
IOCP  
ISCP  
Module latched shutdown  
Effective internal RC filter  
55.1  
58.5  
8
60.0  
80  
V
µs  
47  
80  
60  
A
A
TOCP  
Effective internal RC filter (Integrative).  
7.7  
ms  
response time constant  
From detection to cessation  
of switching (Instantaneous)  
Short circuit protection response time  
TSCP  
1
µs  
ºC  
Thermal shutdown setpoint  
TJ_OTP  
125  
130  
135  
Reverse inrush current protection  
Reverse Inrush protection disabled for this product.  
VTM® Current Multiplier  
Page 2 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
3.0 SIGNAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the  
temperaturerange of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted.  
VTM CONTROL : VC  
Used to wake up powertrain circuit.  
A minimum of 11.5 V must be applied indefinitely for VIN < 26 V  
to ensure normal operation.  
PRM® VC can be used as valid wake-up signal source.  
Internal Resistance used in “Adaptive Loop” compensation  
VC voltage may be continuously applied  
VC slew rate must be within range for a succesful start.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
Required for start up, and operation  
below 26 V. See Section 7.  
VC = 11.5 V, VIN = 0 V  
VC = 11.5 V, VIN > 26 V  
VC = 16.5 V, VIN > 26 V  
External VC voltage  
VVC_EXT  
11.5  
16.5  
150  
V
66  
15  
83  
75  
100  
1
VC current draw  
IVC  
mA  
Steady  
Fault mode. VC > 11.5 V  
VC internal diode rating  
VC internal resistor  
VC internal resistor  
temperature coefficient  
VC start up pulse  
VC slew rate  
DVC_INT  
RVC-INT  
V
kΩ  
ANALOG  
INPUT  
TVC_COEFF  
900 ppm/°C  
20  
0.25 V/µs  
VVC_SP  
dVC/dt  
IINR_VC  
Tpeak <18 ms  
Required for proper start up;  
VC = 16.5 V, dVC/dt = 0.25 V/µs  
V
Start Up  
0.02  
VC inrush current  
1
A
VIN pre-applied, PC floating,  
VC enable, CPC = 0 µF  
VC to VOUT turn-on delay  
TON  
500  
µs  
Transitional  
VC = 11.5 V to PC high, VIN = 0 V,  
dVC/dt = 0.25 V/µs  
VC = 0 V  
VC to PC delay  
T
75  
125  
µs  
µF  
vc_pc  
Internal VC capacitance  
CVC_INT  
3.2  
PRIMARY CONTROL : PC  
The PC pin enables and disables the VTM.  
When held below 2 V, the VTM will be disabled.  
PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V  
during fault mode given VIN > 26 V or VC > 11.5 V.  
After successful start up and under no fault condition, PC can be used as  
a 5 V regulated voltage source with a 2 mA maximum current.  
Module will shutdown when pulled low with an impedance  
less than 400 Ω.  
In an array of VTMs, connect PC pin to synchronize start up.  
PC pin cannot sink current and will not disable other modules  
during fault mode.  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
PC voltage  
PC source current  
PC resistance (internal)  
PC source current  
PC capacitance (internal)  
PC resistance (external)  
PC voltage  
PC voltage (disable)  
PC pull down current  
PC disable time  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
VPC  
IPC_OP  
RPC_INT  
IPC_EN  
CPC_INT  
RPC_S  
VPC_EN  
VPC_DIS  
IPC_PD  
4.7  
5.0  
5.3  
2
400  
300  
1000  
V
mA  
kΩ  
µA  
pF  
kΩ  
V
Steady  
ANALOG  
OUTPUT  
Internal pull down resistor  
50  
50  
150  
100  
Start Up  
Section 7  
60  
2
Enable  
Disable  
2.5  
3
2
V
DIGITAL  
INPUT / OUPUT  
5.1  
mA  
µs  
TPC_DIS_T  
TFR_PC  
5
Transitional  
PC fault response time  
From fault to PC = 2 V  
100  
µs  
VTM® Current Multiplier  
Page 3 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
TEMPERATURE MONITOR : TM  
The TM pin monitors the internal temperature of the VTM controller IC  
within an accuracy of 5°C.  
Can be used as a "Power Good" flag to verify that the VTM is operating.  
The TM pin has a room temperature setpoint of 3 V  
and approximate gain of 10 mV/°C.  
Output drives Temperature Shutdown comparator  
SIGNAL TYPE  
STATE  
ATTRIBUTE  
TM voltage  
SYMBOL  
CONDITIONS / NOTES  
MIN TYP MAX UNIT  
VTM_AMB TJ controller = 27°C  
2.95 3.00 3.05  
V
TM source current  
TM gain  
ITM  
ATM  
100  
µA  
mV/°C  
ANALOG  
OUTPUT  
Steady  
10  
C
TM = 0 F, VIN = 48 V,  
TM voltage ripple  
VTM_PP  
120  
200  
mV  
IOUT = 40 A  
Disable  
TM voltage  
VTM_DIS  
RTM_INT  
CTM_EXT  
TFR_TM  
0
40  
V
kΩ  
pF  
µs  
TM resistance (internal)  
TM capacitance (external)  
TM fault response time  
Internal pull down resistor  
From fault to TM = 1.5 V  
25  
50  
50  
DIGITAL OUTPUT  
(FAULT FLAG)  
Transitional  
10  
4.0 TIMING DIAGRAM  
6
7
IOUT  
ISSP  
IOCP  
8
d
1
2
3
4
5
VC  
b
VVC-EXT  
a
VOVLO  
VIN  
NL  
≥ 26 V  
c
e
f
VOUT  
TM  
VTM-AMB  
PC  
g
5 V  
3 V  
a: VC slew rate (dVC/dt)  
b: Minimum VC pulse rate  
c: TOVLO  
1. Initiated VC pulse  
2. Controller start  
3. VIN ramp up  
Notes:  
– Timing and voltage is not to scale  
– Error pulse width is load dependent  
d: TOCP  
4. VIN = VOVLO  
5. VIN ramp down no VC pulse  
6. Overcurrent  
e: Output turn on delay (TON  
f: PC disable time (TPC_DIS_T  
)
)
g: VC to PC delay (TVC_PC  
)
7. Start up on short circuit  
8. PC driven low  
VTM® Current Multiplier  
Page 4 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
5.0 APPLICATION CHARACTERISTICS  
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures  
for general trend data.  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
TYP  
UNIT  
No load power dissipation  
Efficiency (ambient)  
Efficiency (hot)  
Output resistance (cold)  
Output resistance (ambient)  
Output resistance (hot)  
PNL  
hAMB  
VIN = 48 V, PC enabled  
VIN = 48 V, IOUT = 40 A  
2.7  
95.1  
94.6  
4.9  
5.8  
6.8  
W
%
%
hHOT  
VIN = 48 V, IOUT = 40 A, TC = 100ºC  
ROUT_COLD  
ROUT_AMB  
ROUT_HOT  
VIN = 48 V, IOUT = 40 A, TC = -40ºC  
VIN = 48 V, IOUT = 40 A  
mΩ  
mΩ  
mΩ  
mV  
mV  
mV  
VIN = 48 V, IOUT = 40 A, TC = 100ºC  
COUT = 0 F, IOUT = 40 A, VIN = 48 V,  
20 MHz BW, Section 12  
IOUT_STEP = 0 A TO 40 A, VIN = 48 V,  
ISLEW = 4 A/us  
IOUT_STEP = 40 A to 0 A, VIN = 48 V  
ISLEW = 0 A/us  
Output voltage ripple  
VOUT_PP  
243  
750  
750  
VOUT transient (positive)  
VOUT_TRAN+  
VOUT_TRAN-  
VOUT transient (negative)  
No Load Power Dissipation vs. Line  
Full Load Efficiency vs. TCASE  
96  
94  
92  
90  
88  
86  
7
6
5
4
3
2
1
26  
29  
32  
35  
Input Voltage (V)  
-40°C 25°C  
38  
41  
43  
46  
49  
52  
55  
-40  
-20  
0
20  
Case Temperature (C)  
26 V 48 V  
40  
60  
80  
100  
TCASE  
:
100°C  
V
:
55 V  
IN  
Figure 1 No load power dissipation vs. VIN  
Figure 2 Full load efficiency vs. temperature  
Efficiency & Power Dissipation -40°C Case  
Efficiency & Power Dissipation 25°C Case  
96  
92  
88  
84  
80  
76  
72  
30  
24  
20  
16  
12  
8
96  
92  
88  
84  
80  
76  
72  
25  
20  
15  
PD  
10  
5
PD  
4
0
0
0
5
10  
15  
20  
25  
30  
35  
40  
0
5
10  
15  
20  
25  
30  
35  
40  
Load Current (A)  
Load Current (A)  
26 V  
48 V  
55 V  
26 V  
48 V  
55 V  
VIN:  
26 V  
48 V  
55 V  
26 V  
48 V  
55 V  
VIN:  
Figure 3 Efficiency and power dissipation at –40°C  
Figure 4 Efficiency and power dissipation at 25°C  
VTM® Current Multiplier  
Page 5 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
ROUT vs. TCASE at VIN = 48 V  
Efficiency & Power Dissipation 100°C Case  
28  
24  
20  
16  
12  
8
8.0  
7.0  
6.0  
5.0  
4.0  
96  
92  
88  
84  
80  
76  
72  
PD  
4
0
-40  
-20  
0
20  
40  
60  
80  
100  
0
5
10  
15  
20  
25  
30  
35  
40  
Load Current (A)  
Case Temperature (C)  
26 V  
48 V  
55 V  
26 V  
48 V  
55 V  
Full Load  
VIN:  
Figure 5 Efficiency and power dissipation at 100°C  
Figure 6 ROUT vs. temperature  
Output Voltage Ripple vs. Load  
Safe Operating Area  
250  
10ms Max  
80  
70  
60  
50  
40  
30  
20  
10  
0
225  
200  
175  
150  
125  
100  
75  
Continuous  
50  
0
5
10  
15  
Load Current (A)  
26 V 48 V  
20  
25  
30  
35  
40  
0
1
2
3
4
5
6
7
8
Output Voltage (V)  
VIN  
:
55 V  
Figure 7 VRIPPLE vs. IOUT ; No external COUT. Board mounted  
Figure 8 Safe operating area  
module, scope setting : 20 MHz analog BW  
Figure 10 Start up from application of VIN;  
Figure 9 Full load ripple, 100 µF CIN; No external COUT. Board  
VC pre-applied COUT = 4000 µF  
mounted module, scope setting : 20 MHz analog BW  
VTM® Current Multiplier  
Page 6 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
Figure 11 Start up from application of VC;  
Figure 12 – 0 A– Full load transient response:  
CIN = 100 µF, no external COUT  
VIN pre-applied COUT = 4000 µF  
Figure 13 Full load – 0 A transient response:  
CIN = 100 µF, no external COUT  
VTM® Current Multiplier  
Page 7 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  
Not Recommended for New Designs  
V048x060y040A  
6.0 GENERAL CHARACTERISTICS  
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature  
range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted.  
ATTRIBUTE  
SYMBOL  
CONDITIONS / NOTES  
MIN  
TYP  
MAX  
UNIT  
MECHANICAL  
Length  
Width  
Height  
Volume  
Weight  
L
W
H
Vol  
W
32.25 / [1.270]  
21.75 / [0.856]  
6.48 / [0.255]  
32.5 / [1.280] 32.75 / [1.289] mm/[in]  
22.0 / [0.866] 22.25 / [0.876] mm/[in]  
6.73 / [0.265]  
4.81 / [0.294]  
15.0 / [0.53]  
6.98 / [0.275] mm/[in]  
No heat sink  
cm3/[in3]  
g/[oz]  
2.03  
Nickel  
Palladium  
Gold  
0.51  
0.02  
0.003  
Lead finish  
0.15  
µm  
0.051  
THERMAL  
V048x060y040A (T-Grade)  
-40  
-55  
-40  
-55  
125  
125  
125  
125  
°C  
°C  
°C  
°C  
VTM48EF060M040A00 (M-Grade)  
VTM48ET060T040A00 (T-Grade)  
VTM48ET060M040A00 (M-Grade)  
Operating temperature  
TJ  
Isothermal heat sink and  
isothermal internal PCB  
fJC  
Thermal resistance  
Thermal capacity  
1
5
°C/W  
Ws/°C  
ASSEMBLY  
Peak compressive force  
applied to case (Z-axis)  
6
lbs  
lbs / in2  
°C  
°C  
°C  
Supported by J-lead only  
5.41  
125  
125  
125  
125  
V048x060y040A (T-Grade)  
VTM48EF060M040A00 (M-Grade)  
VTM48ET060T040A00 (T-Grade)  
VTM48ET060M040A00 ( M-Grade)  
MSL 6, TOB = 4 hrs  
MSL 5  
Human Body Model,  
"JEDEC JESD 22-A114-F"  
-40  
-65  
-40  
-65  
Storage temperature  
Moisture sensitivity level  
ESD withstand  
TST  
°C  
MSL  
ESDHBM  
ESDCDM  
1000  
400  
VDC  
Charge Device Model,  
"JEDEC JESD 22-C101-D"  
SOLDERING  
MSL 6, TOB = 4 hrs  
MSL 5  
245  
225  
90  
3
°C  
°C  
s
°C/s  
°C/s  
Peak temperature during reflow  
Peak time above 217°C  
Peak heating rate during reflow  
Peak cooling rate post reflow  
60  
1.5  
1.5  
6
SAFETY  
Isolation voltage (hipot)  
Isolation capacitance  
Isolation resistance  
VHIPOT  
CIN_OUT  
RIN_OUT  
2250  
2500  
10  
VDC  
pF  
Unpowered unit  
3200  
3800  
MΩ  
MIL-HDBK-217 Plus Parts Count;  
25ºC Ground Benign, Stationary,  
Indoors / Computer Profile  
Telcordia Issue 2 - Method I Case 1;  
Ground Benign, Controlled  
cTUVus  
3.8  
9.5  
MHrs  
MTBF  
MHrs  
cURus  
Agency approvals / standards  
"CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable"  
VTM® Current Multiplier  
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7.0 USING THE CONTROL SIGNALS VC, PC, TM, IM  
8.0 START UP BEHAVIOR  
The VTM Control (VC) pin is an input pin which powers the  
internal VCC circuitry when within the specified voltage range  
of 11.5 V to 16.5 V. This voltage is required for VTM current  
multiplier start up and must be applied as long as the input is  
below 26 V. In order to ensure a proper start, the slew rate of  
the applied voltage must be within the specified range.  
Depending on the sequencing of the VC with respect to the  
input voltage, the behavior during start up will vary as follows:  
• Normal operation (VC applied prior to VIN): In this case the  
controller is active prior to ramping the input. When the  
input voltage is applied, the VTM module output voltage will  
track the input (See Figure 10). The inrush current is  
determined by the input voltage rate of rise and output  
capacitance. If the VC voltage is removed prior to the input  
reaching 26 V, the VTM may shut down.  
Some additional notes on the using the VC pin:  
• In most applications, the VTM module will be powered by an  
upstream PRM® regulator which provides a 10 ms  
VC pulse during start up. In these applications the VC pins  
of the PRM regulator and VTM current multiplier should be  
tied together.  
• Stand-alone operation (VC applied after VIN): In this case the  
VTM output will begin to rise upon the application of the  
VC voltage (See Figure 11). The Adaptive Soft Start Circuit  
(See Section 11) may vary the ouput rate of rise in order to  
limit the inrush current to its maximum level. When starting  
into high capacitance, or a short, the output current will be  
limited for a maximum of 120 µsec. After this period, the  
Adaptive Soft Start Circuit will time out and the VTM module  
may shut down. No restart will be attempted until VC is  
re-applied or PC is toggled. The maximum output  
• The VC voltage can be applied indefinitely allowing for  
continuous operation down to 0 VIN.  
• The fault response of the VTM module is latching. A positive  
edge on VC is required in order to restart the unit. If VC is  
continuously applied the PC pin may be toggled to restart  
the VTM module.  
Primary Control (PC) pin can be used to accomplish the  
following functions:  
capacitance is limited to 4000 µF in this mode of operation  
to ensure a sucessful start.  
• Delayed start: Upon the application of VC, the PC pin will  
source a constant 100 µA current to the internal RC  
network. Adding an external capacitor will allow further  
delay in reaching the 2.5 V threshold for module start.  
9.0 THERMAL CONSIDERATIONS  
VI Chip® products are multi-chip modules whose temperature  
distribution varies greatly for each part number as well as with  
the input/output conditions, thermal management and  
environmental conditions. Maintaining the top of the  
V048x060y040A case to less than 100ºC will keep all junctions  
within the VI Chip module below 125ºC for most applications.  
• Auxiliary voltage source: Once enabled in regular  
operational conditions (no fault), each VTM PC provides a  
regulated 5 V, 2 mA voltage source.  
• Output disable: PC pin can be actively pulled down in order  
to disable the module. Pull down impedance shall be lower  
than 400 Ω.  
The percent of total heat dissipated through the top surface  
versus through the J-lead is entirely dependent on the  
particular mechanical and thermal environment. The heat  
dissipated through the top surface is typically 60%. The heat  
dissipated through the J-lead onto the PCB board surface is  
typically 40%. Use 100% top surface dissipation when  
designing for a conservative cooling solution.  
• Fault detection flag: The PC 5 V voltage source is internally  
turned off as soon as a fault is detected. It is important to  
notice that PC doesn’t have current sink capability. Therefore,  
in an array, PC line will not be capable of disabling  
neighboring modules if a fault is detected.  
• Fault reset: PC may be toggled to restart the unit if VC  
is continuously applied.  
It is not recommended to use a VI Chip module for an  
extended period of time at full load without proper  
heat sinking.  
Temperature Monitor (TM) pin provides a voltage  
proportional to the absolute temperature of the converter  
control IC.  
It can be used to accomplish the following functions:  
• Monitor the control IC temperature: The temperature in  
Kelvin is equal to the voltage on the TM pin scaled  
by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied,  
TM can be used to thermally protect the system.  
• Fault detection flag: The TM voltage source is internally  
turned off as soon as a fault is detected. For system  
monitoring purposes (microcontroller interface) faults are  
detected on falling edges of TM signal.  
VTM® Current Multiplier  
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10.0 VTM MODULE BLOCK DIAGRAM  
VTM® Current Multiplier  
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11.0 SINE AMPLITUDE CONVERTERTM POINT OF LOAD CONVERSION  
The Sine Amplitude Converter (SAC) uses a high frequency  
resonant tank to move energy from input to output. (The  
resonant tank is formed by Cr and leakage inductance Lr in the  
power transformer windings as shown in the VTM module  
Block Diagram. See Section 10). The resonant LC tank,  
operated at high frequency, is amplitude modulated as a  
function of input voltage and output current. A small amount  
of capacitance embedded in the input and output stages of  
the module is sufficient for full functionality and is key to  
achieving power density.  
The V048x060y040A SAC can be simplified into the following  
model:  
973 pH  
IOUT  
LOUT = 600 pH  
ROUT  
L
IN = 5.7 nH  
5.8 mΩ  
+
+
RCOUT  
430 µΩ  
RCIN  
0.57 mΩ  
3.13  
Ω
V•I  
K
1/8 • IOUT  
1/8 • VIN  
+
C
IN  
2 µF  
C
45 µF  
+
OUT  
VOUT  
VIN  
IQ  
56 mA  
Figure 14 VI Chip® module AC model  
At no load:  
The use of DC voltage transformation provides additional  
interesting attributes. Assuming that ROUT = 0 Ω and IQ = 0 A,  
Eq. (3) now becomes Eq. (1) and is essentially load  
independent, resistor R is now placed in series with VIN as  
shown in Figure 15.  
VOUT = VIN  
K
(1)  
(2)  
K represents the “turns ratio” of the SAC.  
Rearranging Eq (1):  
VOUT  
K =  
R
R
VIN  
SAC™  
V
OUT
+
K = 1/32  
VIN  
In the presence of load, VOUT is represented by:  
V
OUT = VIN K – IOUT ROUT  
(3)  
(4)  
Figure 15 K = 1/32 Sine Amplitude Converter™  
with series input resistor  
and IOUT is represented by:  
The relationship between VIN and VOUT becomes:  
I
IN – IQ  
K
IOUT  
=
VOUT = (VIN – IIN R) K  
(5)  
ROUT represents the impedance of the SAC, and is a function of  
the RDSON of the input and output MOSFETs and the winding  
resistance of the power transformer. IQ represents the  
Substituting the simplified version of Eq. (4)  
(IQ is assumed = 0 A) into Eq. (5) yields:  
quiescent current of the SAC control and gate drive circuitry.  
2
VOUT = VIN K – IOUT R K  
(6)  
VTM® Current Multiplier  
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This is similar in form to Eq. (3), where ROUT is used to  
represent the characteristic impedance of the SAC™. However,  
in this case a real R on the input side of the SAC is effectively  
scaled by K2 with respect to the output.  
Low impedance is a key requirement for powering a high-  
current, low voltage load efficiently. A switching regulation  
stage should have minimal impedance while simultaneously  
providing appropriate filtering for any switched current. The  
use of a SAC between the regulation stage and the point of  
load provides a dual benefit of scaling down series impedance  
leading back to the source and scaling up shunt capacitance or  
energy storage as a function of its K factor squared. However,  
the benefits are not useful if the series impedance of the SAC  
is too high. The impedance of the SAC must be low, i.e. well  
beyond the crossover frequency of the system.  
Assuming that R = 1 Ω, the effective R as seen from the secondary  
side is 0.98 mΩ, with K = 1/32 as shown in Figure 15.  
A similar exercise should be performed with the additon of a  
capacitor or shunt impedance at the input to the SAC. A  
switch in series with VIN is added to the circuit. This is depicted  
in Figure 16.  
A solution for keeping the impedance of the SAC low involves  
switching at a high frequency. This enables small magnetic  
components because magnetizing currents remain low. Small  
magnetics mean small path lengths for turns. Use of low loss  
core material at high frequencies also reduces core losses.  
S
SAC™  
V
K = 1/32  
+
OUT  
C
VIN  
The two main terms of power loss in the VTM module are:  
- No load power dissipation (PNL): defined as the power  
used to power up the module with an enabled powertrain  
at no load.  
Figure 16 Sine Amplitude Converter™ with input capacitor  
- Resistive loss (ROUT): refers to the power loss across  
the VTM modeled as pure resistive impedance.  
A change in VIN with the switch closed would result in a  
change in capacitor current according to the following  
equation:  
PDISSIPATED = PNL + PROUT  
Therefore,  
(10)  
dVIN  
(7)  
IC(t) = C  
POUT = PIN – PDISSIPATED = PIN – PNL – PROUT  
(11)  
dt  
Assume that with the capacitor charged to VIN, the switch is  
opened and the capacitor is discharged through the idealized  
SAC. In this case,  
The above relations can be combined to calculate the overall  
module efficiency:  
POUT  
PIN  
PIN – PNL – PROUT  
=
(12)  
h =  
PIN  
IC= IOUT  
K
(8)  
Substituting Eq. (1) and (8) into Eq. (7) reveals:  
2
VIN IIN – PNL – (IOUT  
VIN IIN  
)
ROUT  
=
C
dVOUT  
dt  
(9)  
IOUT  
=
K2  
2
PNL + (IOUT  
)
ROUT  
The equation in terms of the output has yielded a K2 scaling  
factor for C, specified in the denominator of the equation.  
A K factor less than unity, results in an effectively larger  
capacitance on the output when expressed in terms of the  
input. With a K=1/32 as shown in Figure 16,  
C=1 µF would appear as C=1024 µF when viewed  
from the output.  
= 1 –  
(
)
VIN IIN  
VTM® Current Multiplier  
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12.0 INPUT AND OUTPUT FILTER DESIGN  
13.0 CAPACITIVE FILTERING CONSIDERATIONS  
FOR A SINE AMPLITUDE CONVERTER™  
A major advantage of a SAC system versus a conventional  
PWM converter is that the former does not require large  
functional filters. The resonant LC tank, operated at extreme  
high frequency, is amplitude modulated as a function of input  
voltage and output current and efficiently transfers charge  
through the isolation transformer. A small amount of  
capacitance embedded in the input and output stages of the  
module is sufficient for full functionality and is key to achieving  
high power density.  
It is important to consider the impact of adding input and  
output capacitance to a Sine Amplitude Converter on the  
system as a whole. Both the capacitance value and the  
effective impedance of the capacitor must be considered.  
A Sine Amplitude Converter has a DC ROUT value which has  
already been discussed in section 11. The AC ROUT of the  
SAC contains several terms:  
• Resonant tank impedance  
This paradigm shift requires system design to carefully evaluate  
external filters in order to:  
• Input lead inductance and internal capacitance  
• Output lead inductance and internal capacitance  
1.Guarantee low source impedance.  
To take full advantage of the VTM module dynamic  
response, the impedance presented to its input terminals  
must be low from DC to approximately 5 MHz. Input  
capacitance may be added to improve transient  
The values of these terms are shown in the behavioral model in  
section 11. It is important to note on which side of the  
transformer these impedances appear and how they reflect  
across the transformer given the K factor.  
performance or compensate for high source impedance.  
The overall AC impedance varies from model to model. For  
most models it is dominated by DC ROUT value from DC to  
beyond 500 KHz. The behavioral model in section 11 should be  
used to approximate the AC impedance of the specific model.  
2.Further reduce input and/or output voltage ripple without  
sacrificing dynamic response.  
Given the wide bandwidth of the VTM module, the source  
response is generally the limiting factor in the overall  
system response. Anomalies in the response of the source  
will appear at the output of the VTM module multiplied  
by its K factor.  
Any capacitors placed at the output of the VTM module reflect  
back to the input of the module by the square of the K factor  
(Eq. 9) with the impedance of the module appearing in series.  
It is very important to keep this in mind when using a PRM®  
regulator to power the VTM module. Most PRM modules have  
a limit on the maximum amount of capacitance that can be  
applied to the output. This capacitance includes both the PRM  
output capacitance and the VTM module output capacitance  
reflected back to the input. In PRM module remote sense  
applications, it is important to consider the reflected value of  
VTM module output capacitance when designing and  
compensating the PRM module control loop.  
3.Protect the module from overvoltage transients imposed  
by the system that would exceed maximum ratings and  
cause failures.  
The VI Chip® module input/output voltage ranges must  
not be exceeded. An internal overvoltage lockout function  
prevents operation outside of the normal operating input  
range. Even during this condition, the powertrain is  
exposed to the applied voltage and power MOSFETs must  
withstand it.  
Capacitance placed at the input of the VTM module appear to  
the load reflected by the K factor with the impedance of the  
VTM module in series. In step-down ratios, the effective  
capacitance is increased by the K factor. The effective ESR of  
the capacitor is decreased by the square of the K factor, but  
the impedance of the module appears in series. Still, in most  
step-down VTM modules an electrolytic capacitor placed at the  
input of the module will have a lower effective impedance  
compared to an electrolytic capacitor placed at the output. This  
is important to consider when placing capacitors at the output  
of the module. Even though the capacitor may be placed at  
the output, the majority of the AC current will be sourced from  
the lower impedance, which in most cases will be the module.  
This should be studied carefully in any system design using a  
module. In most cases, it should be clear that electrolytic  
output capacitors are not necessary to design a stable,  
well-bypassed system.  
VTM® Current Multiplier  
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14.0 CURRENT SHARING  
16.0 REVERSE OPERATION  
The SAC topology bases its performance on efficient transfer  
of energy through a transformer without the need of closed  
loop control. For this reason, the transfer characteristic can be  
approximated by an ideal transformer with some resistive drop  
and positive temperature coefficient.  
The V048x060y040A is capable of reverse operation.  
If a voltage is present at the output which satisfies the  
condition VOUT > VIN K at the time the VC voltage is applied,  
or after the unit has started, then energy will be transferred  
from secondary to primary. The input to output ratio will be  
maintained. The V048x060y040A will continue to operate in  
reverse as long as the input and output are within the specified  
limits. The V048x060y040A has not been qualified for  
continuous operation (>10 ms) in the reverse direction.  
This type of characteristic is close to the impedance  
characteristic of a DC power distribution system, both in  
behavior (AC dynamic) and absolute value (DC dynamic).  
When connected in an array with the same K factor, the VTM  
module will inherently share the load current (typically 5%)  
with parallel units according to the equivalent impedance  
divider that the system implements from the power source to  
the point of load.  
Some general recommendations to achieve matched array  
impedances:  
• Dedicate common copper planes within the PCB  
to deliver and return the current to the modules.  
• Provide the PCB layout as symmetric as possible.  
• Apply same input / output filters (if present) to each unit.  
For further details see AN:016 Using BCM® Bus Converters  
in High Power Arrays.  
ZIN_EQ1  
ZOUT_EQ1  
VTM®1  
RO_1  
VIN  
VOUT  
ZIN_EQ2  
ZOUT_EQ2  
VTM®2  
RO_2  
+
Load  
DC  
ZIN_EQn  
ZOUT_EQn  
VTM®n  
RO_n  
Figure 17 VTM module array  
15.0 FUSE SELECTION  
In order to provide flexibility in configuring power systems  
VI Chip® products are not internally fused. Input line fusing  
of VI Chip products is recommended at system level to provide  
thermal protection in case of catastrophic failure.  
The fuse shall be selected by closely matching system  
requirements with the following characteristics:  
• Current rating  
(usually greater than maximum current of VTM module)  
• Maximum voltage rating  
(usually greater than the maximum possible input voltage)  
• Ambient temperature  
• Nominal melting I2t  
VTM® Current Multiplier  
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17.1 J-LEAD PACKAGE MECHANICAL DRAWING  
mm  
(inch)  
NOTES:  
mm  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
4
. PRODUCT MARKING ON TOP SURFACE  
DXF and PDF files are available on vicorpower.com  
17.2 J-LEAD PACKAGE RECOMMENDED LAND PATTERN  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
4. PRODUCT MARKING ON TOP SURFACE  
mm  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
DXF and PDF files are available on vicorpower.com  
VTM® Current Multiplier  
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17.3 THROUGH-HOLE PACKAGE MECHANICAL DRAWING  
mm  
(inch)  
NOTES:  
mm  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
4
. PRODUCT MARKING ON TOP SURFACE  
DXF and PDF files are available on vicorpower.com  
17.4 THROUGH-HOLE PACKAGE RECOMMENDED LAND PATTERN  
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]  
mm  
4
. PRODUCT MARKING ON TOP SURFACE  
2. DIMENSIONS ARE  
.
inch  
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:  
DXF and PDF files are available on vicorpower.com  
VTM® Current Multiplier  
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17.5 RECOMMENDED HEAT SINK PUSH PIN LOCATION  
(NO GROUNDING CLIPS)  
(WITH GROUNDING CLIPS)  
Notes:  
5. Unless otherwise specified:  
Dimensions are mm (inches)  
tolerances are:  
1. Maintain 3.50 (0.138) Dia. keep-out zone  
free of copper, all PCB layers.  
2. (A) Minimum recommended pitch is 39.50 (1.555).  
This provides 7.00 (0.275) component  
edge-to-edge spacing, and 0.50 (0.020)  
clearance between Vicor heat sinks.  
(B) Minimum recommended pitch is 41.00 (1.614).  
This provides 8.50 (0.334) component  
edge-to-edge spacing, and 2.00 (0.079)  
clearance between Vicor heat sinks.  
3. VI Chip® module land pattern shown for reference  
only; actual land pattern may differ.  
Dimensions from edges of land pattern  
to push–pin holes will be the same for  
all full-size VI Chip® products.  
x.x (x.xx) = 0.3 (0.01)  
x.xx (x.xxx) = 0.13 (0.005)  
4. RoHS compliant per CST–0001 latest revision.  
6. Plated through holes for grounding clips (33855)  
shown for reference, heat sink orientation and  
device pitch will dictate final grounding solution.  
17.6 VTMMODULE PIN CONFIGURATION  
4
3
2
1
A
B
C
D
A
B
C
D
E
+Out  
-Out  
+In  
Signal Name  
Pin Designation  
A1-E1, A2-E2  
L1-T1, L2-T2  
H1, H2  
J1, J2  
E
F
+In  
–In  
TM  
VC  
PC  
G
H
TM  
VC  
PC  
H
J
J
K
L
K
+Out  
-Out  
L
M
N
P
R
T
M
K1, K2  
N
P
R
T
-In  
+Out  
–Out  
A3-D3, A4-D4, J3-M3, J4-M4  
E3-H3, E4-H4, N3-T3, N4-T4  
Bottom View  
VTM® Current Multiplier  
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accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom  
power systems.  
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used to the extent Vicor deems necessary to support Vicors product warranty. Except where mandated by government requirements, testing of all  
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Specifications are subject to change without notice.  
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In Vicors standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the  
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when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the  
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the  
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granted by this document. Interested parties should contact Vicor's Intellectual Property Department.  
The products described on this data sheet are protected by the following U.S. Patents Numbers:  
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Vicor Corporation  
25 Frontage Road  
Andover, MA, USA 01810  
Tel: 800-735-6200  
Fax: 978-475-6715  
email  
Customer Service: custserv@vicorpower.com  
Technical Support: apps@vicorpower.com  
VTM® Current Multiplier  
Page 18 of 18  
Rev 1.0  
vicorpower.com  
800 927.9474  
01/2014  

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