V048T120T25 [VICOR]
DC-DC Regulated Power Supply Module, 1 Output, Hybrid, ROHS COMPLIANT PACKAGE-9;型号: | V048T120T25 |
厂家: | VICOR CORPORATION |
描述: | DC-DC Regulated Power Supply Module, 1 Output, Hybrid, ROHS COMPLIANT PACKAGE-9 |
文件: | 总11页 (文件大小:1129K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Not recommended for New Designs
Replaced by VTM48EF120T025A00
V048F120T025
V048F120M025
VTM
VTM™
Current Multiplier
• 48 V to 12 V V•I Chip™ Converter
• 125°C operation (TJ)
©
• 25 A (37.5 A for 1 ms)
• 1 µs transient response
• 3.5 million hours MTBF
• Typical efficiency 96%
• No output filtering required
Vf = 26 - 55 V
VOUT = 6.50 - 13.8 V
IOUT = 25 A
• High density – 1017 W/in3
• Small footprint – 260 W/in2
• Low weight – 0.5 oz (15 g)
K = 1/4
ROUT = 13.9 mΩ max
• Pick & Place / SMD
or Through hole
Product Description
Absolute Maximum Ratings
Parameter
Values
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
A
Notes
The V048F120T025 V•I Chip current multiplier excels at
speed, density and efficiency to meet the demands of
advanced power applications while providing isolation
from input to output. It achieves a response time of less
than 1 µs and delivers up to 25 A in a volume of less than
0.295 in3 with unprecedented efficiency. It may be
paralleled to deliver higher power levels at an output
voltage settable from 6.50 to 13.8 Vdc.
-1.0 to 60
100
+In to -In
For 100 ms
PC to -In
-0.3 to 7.0
-0.3 to 19.0
-0.5 to 30
2,250
VC to -In
+Out to -Out
Isolation voltage
Output current
Peak output current
Output power
Peak output power
Input to output
Continuous
For 1 ms
25
The VTM V048F120T025’s nominal output voltage is 12
Vdc from a 48 Vdc input Factorized Bus, Vf, and is
controllable from 6.50 to 13.8 Vdc at no load, and from
6.16 to 13.4 Vdc at full load, over a Vf input range of 26
to 55 Vdc. It can be operated either open- or closed-loop
depending on the output regulation needs of the
application. Operating open-loop, the output voltage
tracks its Vf input voltage with a transformation ratio,
K = 1/4 , for applications requiring an isolated output
voltage with high efficiency. Closing the loop back to an
input PRMTM regulator or DC-DC converter enables tight
load regulation.
37.5
A
335
W
Continuous
For 1 ms
503
W
225
245
°C
°C
MSL 5
Case temperature during reflow[a]
MSL 6, TOB = 4 hrs
Operating junction temperature[b]
-40 to 125
-55 to 125
°C
°C
T-Grade
M-Grade
-40 to 125
-65 to 125
°C
°C
T-Grade
Storage temperature
M-Grade
Notes:
[a] 245°C reflow capability applies to product with manufacturing date code 1001 and greater.
[b] The referenced junction is defined as the semiconductor having the highest temperature.
This temperature is monitored by a shutdown comparator.
The 12 V VTM module achieves a power density
of 1017 W/in3 in a V•I Chip package compatible with
standard pick-and-place and surface mount assembly
processes. The VTM modules fast dynamic response and
low noise eliminate the need for bulk capacitance at the
load, substantially increasing system density while
improving reliability and decreasing cost.
Part Numbering
V
048
F
120 T
025
Output Voltage
Designator
(=VOUT x10)
Output Current
Designator
VTM™
Module
Input Voltage
Designator
(=IOUT
)
Configuration
F = J-lead
T = Through hole
Product Grade Temperatures (°C)
Grade
Storage Operating (TJ)
-40 to125 -40 to125
-65 to125 -55 to125
T
M
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VTM™ Current Multiplier
V048F120T025
Rev. 3.1
Page 1 of 11
Input Specs (Conditions are at 48 VIN, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
55
Unit
Vdc
V/µs
Vdc
Vdc
Adc
mA p-p
W
Note
Input voltage range
Input dV/dt
26
48
Max Vin = 53 V, operating from -55°C to -40°C
1
Input overvoltage turn on
Input overvoltage turn off
Input current
55.0
59.7
6.8
Input reflected ripple current
No load power dissipation
Internal input capacitance
Internal input inductance
115
4.8
1.9
Using test circuit in Figure 15; See Figure 1
6.6
5
µF
nH
Output Specs (Conditions are at 48 VIN, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
6.50
6.16
0
Typ
Max
13.8
13.4
25
Unit
Vdc
Vdc
Adc
Note
No load
Output voltage
Full load
Rated DC current
26 - 55 VIN
Max pulse width 1ms, max duty cycle 10%,
baseline power 50%
Module will shut down
See Parallel Operation on Page 9
Peak repetitive current
37.5
A
Short circuit protection set point
Current share accuracy
Efficiency
25.8
Adc
%
5
10
Half load
94.5
95.0
95.8
96.2
1.1
%
%
See Figure 3
See Figure 3
Full load
Internal output inductance
Internal output capacitance
Output overvoltage set point
Output ripple voltage
No external bypass
10 µF bypass capacitor
Effective switching frequency
Line regulation
nH
µF
55
Effective value
13.8
Vdc
Module will shut down
150
13
285
3.9
mVp-p
mVp-p
MHz
See Figures 2 and 5
See Figure 6
3.3
3.7
Fixed, 1.9 MHz per phase
K
0.2475
1/4
0.2525
13.9
VOUT = K•VIN at no load
See Figure 16
Load regulation
ROUT
11.5
mΩ
Transient response
Voltage overshoot
Response time
355
200
1
mV
ns
25 A load step with 100 µF CIN; See Figures 7 and 8
See Figures 7 and 8
Recovery time
µs
See Figures 7 and 8
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 2 of 11
Waveforms
Ripple vs. Output Current
160
140
120
100
80
60
40
0
2.5
5
7.5
10 12.5 15 17.5 20 22.5 25
Output Current (A)
Figure 1 — Input reflected ripple current at full load and 48 Vf.
Figure 2 — Output voltage ripple vs. output current at 48 Vf with no POL
bypass capacitance.
Efficiency vs. Output Current
Power Dissipation
98
16
96
94
92
90
88
86
84
82
14
12
10
8
6
4
0
2.5
5
7.5
10 12.5 15 17.5 20 22.5 25
0
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25
Output Current (A)
Output Current (A)
Figure 3 — Efficiency vs. output current.
Figure 4 — Power dissipation vs. output current.
Figure 5 — Output voltage ripple at full load and 48 Vf with no POL bypass
Figure 6 — Output voltage ripple at full load and 48 Vf with 10 µF ceramic
capacitance.
POL bypass capacitance and 20 nH distribution inductance.
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 3 of 11
Figure 7 — 0-25 A load step with 100 µF input capacitance and no output
Figure 8 — 25-0 A load step with 100 µF input capacitance and no output
capacitance.
capacitance.
General
Parameter
Min
Typ
Max
Unit
Note
MTBF
MIL-HDBK-217F
3.5
Mhrs
25°C, GB
Isolation specifications
Voltage
2,250
10
Vdc
pF
Input to output
Capacitance
Resistance
3,000
Input to output
MΩ
Input to output
cTÜVus
CE Mark
RoHS
UL/CSA 60950-1, EN 60950-1
Low voltage directive
Agency approvals
Mechanical
See Mechanical Drawings, Figures 10 – 13
Weight
0.53/15
oz/g
Dimensions
Length
1.28/32,5
0.87/22
0.265/6,73
5
in/mm
in/mm
in/mm
lbs.
Width
Height
Peak compressive force applied to case (Z axis)
Thermal
6
Supported by J-leads only
Over temperature shutdown
Thermal capacity
125
130
9.3
1.1
2.1
135
°C
Junction temperature
Ws/°C
°C/W
°C /W
Junction-to-case thermal impedance (RθJC
)
See Thermal Considerations on Page 9
Junction-to-board thermal impedance (RθJB
)
Auxiliary Pins (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Min
Typ
Max
Unit
Note
Primary Control (PC)
DC voltage
4.8
2.4
5.0
2.5
2.5
2.5
50
5.2
Vdc
Vdc
Vdc
mA
µs
Module disable voltage
Module enable voltage
Current limit
2.6
2.9
VC voltage must be applied when module is enabled using PC
2.4
Source only
Disable delay time
PC low to Vout low
VTM Control (VC)
Required for VTM current multiplier
start up without PRM regulator
External boost voltage
External boost duration
12
14
10
19
Vdc
ms
Maximum duration of VC pulse = 20 ms
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 4 of 11
Pin / Control Functions
+In / -In DC Voltage Ports
The VTM™ current multiplier input should be connected to the
PRM™ regulator output terminals. Given that both the regulator and
current multiplier have high switching frequencies, it is often good
practice to use a series inductor to limit high frequency currents
between the PRM module output and VTM module input capacitors.
The input voltage should not exceed the maximum specified. If the
input voltage exceeds the overvoltage turn-off, the VTM module will
shutdown. The VTM module does not have internal input reverse
polarity protection. Adding a properly sized diode in series with the
positive input or a fused reverse-shunt diode will provide reverse polarity
protection.
4
3
2
1
A
B
C
D
A
B
C
D
E
+Out
-Out
+In
E
F
G
H
TM
VC
PC
H
J
J
K
L
K
+Out
-Out
L
M
N
P
R
T
M
N
P
R
T
-In
TM – For Factory Use Only
VC – VTM Control
Bottom View
The VC port is multiplexed. It receives the initial VCC voltage from an
upstream PRM regulator, synchronizing the output rise of the VTM
module with the output rise of the regulator. Additionally, the VC port
provides feedback to the PRM to compensate for the current multiplier
output resistance. In typical applications using VTM modules powered
from PRM regulators, the regulators VC port should be connected to
the VTM module VC port.
Signal Name
Pin Designation
A1-E1, A2-E2
L1-T1, L2-T2
H1, H2
J1, J2
K1, K2
+In
–In
TM
VC
PC
A3-D3, A4-D4,
J3-M3, J4-M4
E3-H3, E4-H4,
N3-T3, N4-T4
+Out
The VC port is not intended to be used to supply VCC voltage to the
VTM module for extended periods of time. If VC is being supplied from
a source other than the PRM regulators, the voltage should be removed
after 20 ms.
–Out
PC – Primary Control
Figure 9 — VTM™ current multiplier pin configuration
The Primary Control (PC) port is a multifunction port for controlling the
current multiplier as follows:
Disable – If PC is left floating, the VTM module output is enabled.
To disable the output, the PC port must be pulled lower than 2.4 V,
referenced to -In. Optocouplers, open collector transistors or relays
can be used to control the PC port. Once disabled, 14 V must be
re-applied to the VC port to restart the VTM module.
Primary Auxiliary Supply – The PC port can source up to 2.4 mA
at 5 Vdc.
+Out / -Out DC Voltage Output Ports
The output and output return are through two sets of contact
locations. The respective +Out and –Out groups must be connected in
parallel with as low an interconnect resistance as possible. Within the
specified input voltage range, the Level 1 DC behavioral model shown
in Figure 16 defines the output voltage of the VTM module. The
current source capability of the VTM module is shown in the
specification table.
To take full advantage of the VTM current multiplier, the user should
note the low output impedance of the device. The low output
impedance provides fast transient response without the need for bulk
POL capacitance. Limited-life electrolytic capacitors required with
conventional converters can be reduced or even eliminated, saving cost
and valuable board real estate.
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 5 of 11
Mechanical Drawings
TOP VIEW ( COMPONENT SIDE)
NOTES:
mm
BOTTOM VIEW
1. DIMENSIONS ARE
.
inch
2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Figure 10 —VTM™ module J-Lead mechanical outline; Onboard mounting
RECOMMENDED LAND PATTERN
( COMPONENT SIDE SHOWN )
NOTES:
mm
1. DIMENSIONS ARE
.
inch
2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Figure 11 — VTM J-Lead PCB land layout information; Onboard mounting
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 6 of 11
Mechanical Drawings (continued)
TOP VIEW ( COMPONENT SIDE )
BOTTOM VIEW
NOTES:
(mm)
1. DIMENSIONS ARE
.
inch
2. UNLESS OTHERWISE SPECIFIED TOLERANCES ARE:
X.X [X.XX] = 0.25 [0.01]; X.XX [X.XXX] = 0.13 [0.005]
3. RoHS COMPLIANT PER CST-0001 LATEST REVISION
DXF and PDF files are available on vicorpower.com
Figure 12 —VTM™ through-hole module mechanical outline
RECOMMENDED HOLE PATTERN
( COMPONENT SIDE SHOWN )
NOTES:
(mm)
1. DIMENSIONS ARE
.
inch
2. UNLESS OTHERWISE SPECIFIED TOLERANCES ARE:
X.X [X.XX] = 0.25 [0.01]; X.XX [X.XXX] = 0.13 [0.005]
3. RoHS COMPLIANT PER CST-0001 LATEST REVISION
DXF and PDF files are available on vicorpower.com
Figure 13 — VTM™ through-hole PCB layout information
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 7 of 11
Mechanical Drawings (continued)
RECOMMENDED LAND PATTERN
(NO GROUNDING CLIPS)
TOP SIDE SHOWN
NOTES: 1. MAINTAIN 3.50 [0.138] DIA. KEEP-OUT ZONE
FREE OF COPPER, ALL PCB LAYERS.
2. (A) MINIMUM RECOMMENDED PITCH IS 39.50 [1.555],
THIS PROVIDES 7.00 [0.275] COMPONENT
EDGE-TO-EDGE SPACING, AND 0.50 [0.020]
CLEARANCE BETWEEN VICOR HEAT SINKS.
(B) MINIMUM RECOMMENDED PITCH IS 41.00 [1.614],
THIS PROVIDES 8.50 [0.334] COMPONENT
EDGE-TO-EDGE SPACING, AND 2.00 [0.079]
CLEARANCE BETWEEN VICOR HEAT SINKS.
3. V•I CHIP™ MODULE LAND PATTERN SHOWN FOR REFERENCE ONLY;
ACTUAL LAND PATTERN MAY DIFFER.
DIMENSIONS FROM EDGES OF LAND PATTERN
TO PUSH-PIN HOLES WILL BE THE SAME FOR
ALL FULL SIZE V•ICHIP PRODUCTS.
RECOMMENDED LAND PATTERN
(With GROUNDING CLIPS)
TOP SIDE SHOWN
4. RoHS COMPLIANT PER CST-0001 LATEST REVISION.
5. UNLESS OTHERWISE SPECIFIED:
DIMENSIONS ARE MM [INCH].
TOLERANCES ARE:
X.X [X.XX] = 0.3 [0.01]
X.XX [X.XXX] = 0.13 [0.005]
6. PLATED THROUGH HOLES FOR GROUNDING CLIPS (33855)
SHOWN FOR REFERENCE. HEATSINK ORIENTATION AND
DEVICE PITCH WILL DICTATE FINAL GROUNDING SOLUTION.
•
Figure 14 — Hole location for push pin heat sink relative to V I Chip™ module
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 8 of 11
Application Note
Parallel Operation
Input Impedance Recommendations
In applications requiring higher current or redundancy, VTM™ current
multipliers can be operated in parallel without adding control circuitry
or signal lines. To maximize current sharing accuracy, it is imperative
that the source and load impedance on each VTM™ module in a
parallel array be equal. If the modules are being fed by an upstream
PRM™ regulator, the VC nodes of all VTM modules must be connected
to the PRM module VC.
To take full advantage of the current multiplier’s capabilities, the
impedance of the source (input source plus the PC board impedance)
must be low over a range from DC to 5 MHz. Input bypass capacitance
may be added to improve transient performance or compensate for
high source impedance. The VTM module has extremely wide
bandwidth so the source response to transients is usually the limiting
factor in overall output response of the module.
To achieve matched impedances, dedicated power planes within the PC
board should be used for the output and output return paths to the
array of paralleled VTMs. This technique is preferable to using traces of
varying size and length.
Anomalies in the response of the source will appear at the output of
the VTM module, multiplied by its K factor of 1/4 . The DC resistance
of the source should be kept as low as possible to minimize voltage
deviations on the input to the module. If the module is going to be
operating close to the high limit of its input range, make sure input
voltage deviations will not trigger the input overvoltage turn-off
threshold.
The VTM module power train and control architecture allow
bi-directional power transfer when the module is operating within its
specified ranges. Bi-directional power processing improves transient
response in the event of an output load dump. The module may
operate in reverse, returning output power back to the input source. It
does so efficiently.
Input Fuse Recommendations
V•I Chip products are not internally fused in order to provide flexibility
in configuring power systems. However, input line fusing of V•I Chip
modules must always be incorporated within the power system. A fast
acting fuse is required to meet safety agency Conditions of
Acceptability. The input line fuse should be placed in series with the +In
port.
Thermal Considerations
•
V I Chip™ products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with the
input/output conditions, thermal management and environmental
conditions. Maintaining the top of the V048F120T025 case to less than
Application Notes
•
100°C will keep all junctions within the V I Chip module below 125°C
For application notes on soldering, thermal management, board layout,
and system design click on the link below:
for most applications. The percent of total heat dissipated through the
top surface versus through the J-lead is entirely dependent on the
particular mechanical and thermal environment. The heat dissipated
through the top surface is typically 60%. The heat dissipated through
the J-lead onto the PCB board surface is typically 40%. Use 100% top
surface dissipation when designing for a conservative cooling solution.
http://www.vicorpower.com/technical_library/application_information/chips/
•
It is not recommended to use a V I Chip module for an extended
period of time at full load without proper heat sinking.
Input reflected ripple
measurement point
F1
+O ut
10A
Fuse
+In
+
R3
10 mΩ
-O ut
TM
VC
PC
Load
VTM ™
C2
F
C1
47 µF
Al electrolytic
C3
10 µF
0.47
+O ut
+
ceramic
14 V
–
K
Ro
Notes:
C3 should be placed close
to the load
-In
–
-O ut
R3 may be ESR of C3 or a
separate damping resistor.
Figure 15 — VTM™ module test circuit
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 9 of 11
Application Note (continued)
VTM™ Current Multiplier Level 1 DC Behavioral Model for 48 V to 12 V, 25 A
ROUT
IOUT
+
+
11.5 mΩ
•
V I
1/4 • Iout
1/4 • Vin
+
–
+
–
VOUT
VIN
Q
I
100 mA
K
–
–
©
Figure 16 — This model characterizes the DC operation of the V•I Chip VTM, including the converter transfer function and its losses. The model enables
estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation.
V•I Chip VTM™ Current Multiplier Level 2 Transient Behavioral Model for 48 V to 12 V, 25 A
8.5 nH
LOUT = 1.1 nH
ROUT
IOUT
IN
L
= 5 nH
+
+
11.5 mΩ
RCIN
R
RCOUT
40 mΩ
1/4 • Vin
1.3 mΩ
V•I
K
1.0 mΩ
1/4 • Iout
+
–
+
–
CIN
55 µF
1.9 µF IQ
COUT
VOUT
VIN
100 mA
–
–
©
Figure 17 — This model characterizes the AC operation of the V•I Chip VTM including response to output load or input voltage transients or steady state
modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load
with or without external filtering elements.
In figures below;
K = VTM™ current multiplier transformation ratio
RO = VTM output resistance
Vf = PRM output (Factorized Bus Voltage)
VO = VTM output
VL = Desired load voltage
FPA™ Adaptive Loop
VH
SC
SG
VC
PC
TM
IL
+Out
+Out
VTM™
Modul–eOut
+In
0.01 μF
10 kΩ
Factorized
Bus (Vf)
OS
NC
CD
ROS
RCD
L
O
A
D
NC
PR
PRM™-AL
+InModule
TM
VC
+Out
PC
0.4 μH
10 Ω
Vin
K
Ro
– In
–In
–Out
– Out
Figure 18 — The PRM™ regulator controls the factorized bus voltage, Vf, in proportion to output current to compensate for the output resistance, Ro, of the
VTM™ current multipler. The VTM module output voltage is typically within 1% of the desired load voltage (VL) over all line and load conditions.
vicorpower.com
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V•I Chip Transformer
V048F120T025
Rev. 3.1
Page 10 of 11
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in
normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper
application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended
to the original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this
warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping
instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges
incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within
the terms of this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is
assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve
reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or
circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not
recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten
life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes
all risks of such use and indemnifies Vicor against all damages.
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for
its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or
malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are
available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent
applications) relating to the products described in this data sheet. Interested parties should contact Vicor's
Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917;
7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for
use under 6,975,098 and 6,984,965
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
vicorpower.com
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V•I Chip Transformer
V048F120T025
Rev. 3.1
3/11
相关型号:
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