UC1711JE883B [TI]

Dual Ultra High-Speed FET Driver 16-CDIP -55 to 125;


型号：	UC1711JE883B
厂家：	TEXAS INSTRUMENTS
描述：	Dual Ultra High-Speed FET Driver 16-CDIP -55 to 125 CD
文件：	总5页 (文件大小：73K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UC1711

UC3711

Dual Ultra High-Speed FET Driver

BLOCK DIAGRAM

FEATURES

• 25ns Rise and Fall into 1000pF

7.5V REG

V_CC

• 15ns Propagation Delay

• 1.5A Source or Sink Output Drive

• Operation with 5V to 35V Supply

• High-Speed Schottky NPN Process

• 8-PIN MINIDIP Package

2.5k

A Out

A_IN

CONNECTION DIAGRAM

2.5k

DIL-8 (Top View)

J or N Package

B_IN

B Out

Gnd

UDG-99078

DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

Input Supply Voltage, V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . 40V

Output Current (Source or Sink)

The UC1711 family of FET drivers are made with an

all-NPN Schottky process in order to optimize switching

speed, temperature stability, and radiation resistance.

The cost for these benefits is a quiescent supply current

which varies with both output state and supply voltage.

For lower power requirements, refer to the the UC1709

family which is both pin compatible with, and functionally

equivalent to the UC1711.

Steady State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 500mA

Peak Transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1.5A

Maximum Forced Voltage . . . . . . . . . . . . . . . . . . . . -0.3V to 7V

Maximum Forced Current . . . . . . . . . . . . . . . . . . . . . . . ± 10mA

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W

Operating Junction Temperature . . . . . . . . . . –55°C to +150°C

Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Note 1: Unless otherwise indicated, voltages are reference to

ground and currents are positive into, negative out of, the spec-

ified terminals. All reliability information for this device has been

gathered at an ambient air temperature of 125°C, and a supply

voltage of 25V.

These devices implement inverting logic with TTL com-

patible inputs, and output stages which will either source,

or sink in excess of 1.5A of load current with minimal

cross-conduction charge. Due to their monolithic con-

struction, the channels are well matched and can be par-

alleled for doubled output current capability.

Note 2: Consult Unitrode databook for information regarding

thermal specifications and limitations of packages.

ORDERING INFORMATION

TEMPERATURE RANGE

–55°C to +125°C

0°C to +70°C

PACKAGE

Ceramic DIP

Plastic DIP

UC1711J

UC3711J

UC3711N

0°C to +70°C

03/99

UC1711

UC3711

ELECTRICAL CHARACTERISTICS: Unless otherwise stated, V_CC= 15V. T_A=TJ.

PARAMETER TEST CONDITIONS

MIN

TYP

MAX UNITS

Input Supply

Supply Current (Note 3)

Both inputs = 0V; V_CC= 15V

Both inputs = 5V; V_{CC= 15V}

Both inputs = 0V; V_{CC= 35V}

Both inputs = 5V; V_{CC= 35V}

Logic Inputs

Logic 0 Input Voltage

Logic 1 Input Voltage

Input Current

0.8

2.0

2.2

V_IN= 0V

V_IN= 5V

-5.0

-2.7

0.5

Output Stages

Output High Level

I_SOURCE= 20mA, below V_CC

I_SOURCE= 200mA, below V_CC

I_SINK= 20mA

1.5

2.0

.25

0.4

2.0

3.0

0.4

1.0

Output Low Level

I_SINK= 200mA

Switching Characteristics (Note 4)

Rise Time Delay, TPLH

C_LOAD= 0

C_LOAD= 1000pF, (Note 5)

C_LOAD= 2200pF

Fall Time Delay, TPHL

Rise Time, TLH

C_LOAD= 0

C_LOAD= 1000pf, (Note 5)

C_LOAD= 2200pF

C_LOAD= 0, (Note 5)

C_LOAD= 1000pF, (Note 5)

C_LOAD= 2200pF

Fall Time, THL

C_LOAD= 0, (Note 5)

C_LOAD= 1000pF, (Note 5)

C_LOAD= 2200pF

Total Supply Current

Freq = 200kHz, 50% Duty-cycle

Both Channels Switching

C_LOAD= 0

C_LOAD= 2200pF

Note 3: Supply currents at other input supply votages can be calculated by extrapolating the 15V and 35V supply currents. The im-

pedance of the chip at the V_CCpin is linear for supply voltages from 8V to 35V, the approximate value of this impedance is 4.3k for

both inputs low, 0.94k for both inputs high, and 1.54k for one input high and one low.

Note 4: Switching test conditions are, V_CC= 15V, Input voltage waveform levels are 0V and 5V, with transition times of <3ns. The

timing terms are defined as : TPHL Propagation delay 50% V_INto 90% V_OUT; TPLH Propogation delay 50% V_INto 10% V_OUT; THL

90% V_OUTto 10% V_OUT; TLH 10% V_OUTto 90% V_OUT

Note 5: This specification not tested in production.Unless otherwise stated specifications hold for T_A= 0 to 70°C for the UC3711,

and T_A= -55 to 125°C for the UC1711, V_CC= 15V. T_A= T_J.

UNITRODE CORPORATION

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054

TEL. (603) 424-2410 FAX (603) 424-3460

PACKAGE OPTION ADDENDUM

www.ti.com

9-May-2012

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

Add to cart

UC1711J

UC1711J883B

UC1711JE

OBSOLETE

CDIP

TBD

Call TI

CDIP

UC1711JE883B

UC1711L883B

UC3711N

CDIP

TO/SOT

PDIP

UC3711Q

PLCC

UC3711QTR

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

9-May-2012

OTHER QUALIFIED VERSIONS OF UC1711, UC3711 :

Catalog: UC3711

•

Military: UC1711

•

NOTE: Qualified Version Definitions:

Catalog - TI's standard catalog product

•

Military - QML certified for Military and Defense Applications

•

Addendum-Page 2

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UC1711JE883B [TI]

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