TPS3600D25PWR_技术文档

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SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

features

typical applications

D

Supply Current of 40 µA (Max)

Precision Supply Voltage Monitor

− 2.0 V, 2.5 V, 3.3 V, 5.0 V

D

Fax Machines

D

Set-Top Boxes

Advanced Voice Mail Systems

Portable Battery Powered Equipment

Computer Equipment

− Other Versions on Request

D

Watchdog Timer With 800-ms Time-Out

Backup-Battery Voltage Can Exceed V

DD

Advanced Modems

Power-On Reset Generator With Fixed

100-ms Reset Delay Time

Automotive Systems

Portable Long-Time Monitoring Equipment

Point of Sale Equipment

D

Battery OK Output

D

Voltage Monitor for Power-Fail or

Low-Battery Monitoring

TSSOP (PW) Package

(TOP VIEW)

D

Manual Switchover to Battery-Backup

Mode

V

1

2

3

4

5

6

7

14

13

12

11

10

9

V

BAT

RESET

OUT

Chip-Enable Gating −3 ns (at V

Max. Propagation Delay

= 5 V)

V

DD

GND

MSWITCH

CEIN

WDI

MR

CEOUT

BATTOK

PFO

Manual Reset

BATTON

PFI

8

Battery Freshness Seal

14-Pin TSSOP Package

Temperature Range . . . −40°C to 85°C

ACTUAL SIZE

(5,10mm x 6,60mm)

typical operating circuit

Address

Decoder

Power

Supply

0.1 µF

External

Source

CE

CMOS

RAM

CE

CMOS

RAM

CEIN

CEOUT

Address Bus

Real-

Time

Clock

Backup

Battery

V

DD

V

BAT

R

x

y

TPS3600

uC

V

CC

V

CC

V

CC

PFI

8

RESET

I/O

RESET

WDI

Data Bus

16

I/O

PFO

I/O

BATTOK

BATTON

I/O

MR

Switchover

Capacitor

Manual

Reset

MSWITCH

GND

V

OUT

V

CC

0.1 µF

GND

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

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Copyright  2000−2007, Texas Instruments Incorporated

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www.ti.com

1

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

description

The TPS3600 family of supervisory circuits monitor and control processor activity. In case of power-fail or

brownout conditions, the backup-battery switchover function of TPS3600 allows to run a low-power processor

and its peripherals from the installed backup battery without asserting a reset beforehand.

During power on, RESET is asserted when the supply voltage (V

or V

) becomes higher than V

.

DD

BAT

res

Thereafter, the supply voltage supervisor monitors V

and keeps RESET output active as long as V

OUT

remains below the threshold voltage (V ). An internal timer delays the return of the output to the inactive state

IT

(high) to ensure proper system reset. This delay timer starts its time-out, after V

has risen above the

OUT

threshold voltage (V ). In case of a brownout or power failure of both supply sources, a voltage drop below the

IT

threshold voltage (V ) get detected and the output becomes active (low) again.

IT

The product spectrum is designed for supply voltages of 2 V, 2.5 V, 3.3 V, and 5 V. The circuits are available

in a 14-pin TSSOP package. They are characterized for operation over a temperature range of −40°C to 85°C.

PACKAGE INFORMATION

T

DEVICE NAME

TPS3600D20

TPS3600D25

TPS3600D33

TPS3600D50

A

−40°C to 85°C

ordering information application specific versions (see Note)

TPS360

0

D

20

PW

R

Reel

Package

Nominal Supply Voltage

Nominal BATTOK Threshold Voltage

Functionality

Family

DEVICE NAME

TPS3600x20 PW

TPS3600x25 PW

TPS3600x33 PW

TPS3600x50 PW

NOMINAL VOLTAGE, V

NOM

2.0 V

2.5 V

3.3 V

5.0 V

NOMINAL BATTOK

THRESHOLD VOLTAGE, V

DEVICE NAME

BOK

TPS3600Dxx PW

V

+ 7%

+ 6%

+ 8%

+ 10%

IT

{

TPS3600Fxx PW

{

TPS3600Hxx PW

{

TPS3600Jxx PW

V

IT

†

For the application specific versions, please contact the local TI sales

office for availability and lead time.

www.ti.com

2

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

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SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

FUNCTION TABLES

V

DD

> V

0

1

V

> V

IT

V

DD

> V

0

1

0

1

0

1

MSWITCH

MR

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

V

OUT

BATTON

RESET

CEOUT

DIS

EN

SW

OUT

BAT

0

1

0

1

0

1

0

1

0

1

0

1

V

BAT

V

BAT

V

BAT

V

BAT

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

V

DD

V

DD

V

BAT

V

BAT

V

BAT

V

BAT

V

BAT

V

BAT

DIS

EN

V

DD

DIS

EN

V

DD

V

DIS

EN

BAT

V

DD

DIS

EN

V

DD

V

DIS

EN

BAT

V

DD

DIS

EN

V

DD

V

DIS

EN

BAT

V

BAT

> V

0

BATTOK

BOK

0

1

CONDITION: V

> V

DD(min)

OUT

CEIN

CEOUT

0

1

0

1

CONDITION: Enabled

PFI > V

PFO

PFI

0

1

0

1

CONDITION: V

OUT

> V

DD(min)

www.ti.com

3

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

functional schematic

TPS3600

MR

MSWITCH

V

BAT

+

Switch

Control

V

OUT

_

Internal

Supply

Voltage

V

DD

BATTON

BATTOK

+

Reference

Voltage

_

or 1.15 V

R1

R2

GND

RESET

Logic

and

_

+

Timer

RESET

PFO

_

+

PFI

WDI

Oscillator

Watchdog

Logic

Transition

Detector

V

OUT

and

Control

40 kΩ

CEOUT

CEIN

www.ti.com

4

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

timing diagram

V

BAT

V

(BOK)

V

(SWP)

(SWN)

V

(IT)

V

DD

t

V

OUT

V

(SWN)

RESET

t

BATTOK

1

0

t

BATTON

V

BAT

V

DD

V

BAT

V

DD

V

BAT

NOTES: A. MSWITCH = 0, MR = 1

NOTES: B. Timing diagram shown under normal operation, not in freshness seal mode.

www.ti.com

5

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

BATTOK

NO.

9

O

I

Battery status output

BATTON

CEIN

6

Logic output/external bypass switch driver output

Chip-enable input

5

CEOUT

GND

10

3

O

I

Chip-enable output

Ground

MR

11

4

I

Manual reset input

MSWITCH

PFI

I

Manual switch to force device into battery-backup mode (connect to GND if not used)

7

I

Power-fail comparator input (connect to GND if not used)

Power-fail comparator output

Active-low reset output

PFO

8

O

I

RESET

13

14

2

V

Backup-battery input

BAT

I

Input supply voltage

DD

1

O

I

Supply output

OUT

WDI

12

Watchdog timer input

detailed description

battery freshness seal

The battery freshness seal of the TPS3600 family disconnects the backup battery from the internal circuitry until

it is needed. This ensures that the backup battery connected to V should be fresh when the final product is

BAT

put to use. The following steps explain how to enable the freshness seal mode:

1. Connect V

(V

> V

)

BAT BAT

BAT(min)

2. Ground PFO

3. Connect PFI to V

or PFI > V

(PFI)

DD

4. Connect V

to power supply (V > V )

DD IT

DD

5. Ground MR

6. Power down V

DD

7. The freshness seal mode is entered and pins PFO and MR can be disconnected.

The battery freshness seal mode is disabled by the positive-going edge of RESET when V

is applied.

DD

BATTOK output

This is a logic feedback of the device to indicate the status of the backup battery. The supervisor checks the

battery voltage every 200 ms with a voltage divider load of approximately 100 KΩ and a measure cycle on-time

of 25 µs. This measurement cycle starts after the reset is released. If the battery voltage V

is below the

BAT

negative-going threshold voltage V

, the indicator BATTOK does a high-to-low transition. Otherwise, its

(BOK)

status remains to the V

level.

OUT

Table 1. Typical Values for BATTOK Indication

SUPERVISOR TYPE

V

TYP

V

MIN

V

TYP

V

MAX

IT

BOK

1.97 V

TPS3600D20

TPS3600D25

TPS3600D33

TPS3600D50

1.78 V

2.22 V

2.93 V

4.40 V

1.84 V

2.3 V

1.91 V

2.38 V

3.14 V

4.71 V

2.46 V

3.24 V

4.86 V

3.04 V

4.56 V

www.ti.com

6

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

detailed description (continued)

I

BAT

200 ms

25 µs

100 µA

t

Figure 1. BATTOK Timing

chip-enable signal gating

The internal gating of chip-enable signals (CE) prevents erroneous data from corrupting CMOS RAM during

an under-voltage condition. The TPS3600 use a series transmission gate from CEIN to CEOUT. During normal

operation (reset not asserted), the CE transmission gate is enabled and passes all CE transitions. When reset

is asserted, this path becomes disabled, preventing erroneous data from corrupting the CMOS RAM. The short

CE propagation delay from CEIN to CEOUT enables the TPS3600 devices to be used with most processors.

The CE transmission gate is disabled and CEIN is high impedance (disable mode) while reset is asserted.

During a power-down sequence when V

crosses the reset threshold, the CE transmission gate will be

DD

disabled and CEIN immediately becomes high impedance if the voltage at CEIN is high. If CEIN is low during

reset is asserted, the CE transmission gate will be disabled same time when CEIN goes high, or 15 µs after reset

asserts, whichever occurs first. This will allow the current write cycle to complete during power down. When the

CE transmission gate is enabled, the impedance of CEIN appears as a resistor in series with the load at CEOUT.

The overall device propagation delay through the CE transmission gate depends on V

, the source

OUT

impedance of the device connected to CEIN and the load at CEOUT. To achieve minimum propagation delay,

the capacitive load at CEOUT should be minimized, and a low-output-impedance driver be used.

During disable mode, the transmission gate is off and an active pullup connects CEOUT to V

turns off when the transmission gate is enabled.

. This pullup

OUT

CEIN

t

CEOUT

15 µs

t

RESET

t

Figure 2. Chip-Enable Timing

www.ti.com

7

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

detailed description (continued)

power-fail comparator (PFI and PFO)

An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail

input (PFI) will be compared with an internal voltage reference of 1.15 V. If the input voltage falls below the

power-fail threshold, V

, of 1.15 V typical, the power-fail output (PFO) goes low. If it goes above V

plus

(PFI)

about 12-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to

supervise any voltages above V . The sum of both resistors should be about 1 MΩ, to minimize power

(PFI)

consumption and also to ensure that the current in the PFI pin can be neglected compared with the current

through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure

minimal variation of sensed voltage.

If the power-fail comparator is unused, connect PFI to ground and leave PFO unconnected.

BATTON

Most often BATTON is used as a gate drive for an external pass transistor for high-current applications. In

addition it can be also used as a logic output to indicate the battery switchover status. BATTON is high when

V

is connected to V

.

OUT

BAT

BATTON can be directly connected to the gate of a PMOS transistor (see Figure 3). No current-limiting resistor

is required. When using a PMOS transistor, it must be connected backwards from the traditional method (see

Figure 3). This method orients the body diode from V

discharging through the FET when its gate is high.

to V

and prevents the backup battery from

DD

OUT

PMOS FET

Body Diode

D

S

G

V

DD

BATTON V

TPS3600

GND

OUT

Figure 3. Driving an External MOSFET Transistor With BATTON

backup-battery switchover

In the event of a brownout or power failure, it may be necessary to keep a processor running. If a backup battery

is installed at V , the devices automatically connect the processor to backup power when V fails. In order

BAT

DD

to allow the backup battery (e.g., a 3.6-V lithium cell) to have a higher voltage than V , this family of supervisors

DD

OUT

will not connect V

to V

when V

and V

is greater than V . V

only connects to V

(through a 2-Ω switch)

BAT

OUT

BAT

DD BAT

when V

until V

falls below V

crosses V

is greater than V . When V

recovers, switchover is deferred either

. (See the timing diagram)

OUT

(SWN)

DD

(SWP)

, or when V

rises above the threshold V

DD

BAT

DD

V

DD

> V

BAT

V

DD

> V

1

V

OUT

(SW)

1

0

V

DD

0

V

1

V

0

V

BAT

www.ti.com

8

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

detailed description (continued)

manual switchover (MSWITCH)

While operating in the normal mode from V , the device can be manually forced to operate in the

DD

battery-backup mode by connecting MSWITCH to V . The table below shows the different switchover modes.

DD

MSWITCH

STATUS

GND

V

mode

DD

V

mode

DD

V

DD

GND

Switch to battery-backup mode

Battery-backup mode

V

DD

Battery-backup mode

If the manual switchover feature is not used, MSWITCH must be connected to ground.

watchdog

In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also

important to ensure the correct program execution. The task of a watchdog is to ensure that the program is not

stalled in an indefinite loop. The microprocessor, microcontroller, or the DSP have to toggle the watchdog input

within typically 0.8 s to avoid a time-out from occurring. Either a low-to-high or a high-to-low transition resets

the internal watchdog timer. If the input is unconnected the watchdog is disabled and will be retriggered

internally.

saving current while using the watchdog

The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily

pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power

consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once

within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead, WDI is externally driven high

for the majority of the time-out period, a current of e.g. 5 V/40 kΩ ≈ 125 µA can flow into WDI.

V

OUT

V

IT

WDI

t

(tout)

RESET

t

d

Undefined

Figure 4. Watchdog Timing

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ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

†

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage: V

(see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

DD

MR and WDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V

+ 0.3 V)

DD

All other pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V

Continuous output current at V : I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA

OUT O

All other pins, I

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA

O

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C

A

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

stg

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000h

continuously.

DISSIPATION RATING TABLE

PACKAGE

T

< 25°C

DERATING FACTOR

T

= 70°C

T = 85°C

A

POWER RATING

A

POWER RATING

ABOVE T = 25°C

POWER RATING

A

PW

700 mW

5.6 mW/°C

448 mW

364 mW

recommended operating conditions at specified temperature range

MIN

MAX

UNIT

V

Supply voltage, V

DD

1.65

1.5

0

5.5

Battery supply voltage, V

BAT

5.5

V

Input voltage, V

V

+ 0.3

V

I

OUT

High-level input voltage, V

IH

0.7 x V

V

OUT

Low-level input voltage, all other pins, V

IL

0.3 x V

V

OUT

200

Continuous output current at V

, I

mA

ns/V

OUT O

Input transition rise and fall rate at WDI, MSWITCH, ∆t/∆V

Slew rate at V or V

100

34 mV/µs

85 °C

DD BAT

Operating free-air temperature range, T

−40

A

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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

− 0.2 V

TYP

MAX

UNIT

V

= 2.0 V,

= 3.3 V,

= 5.0 V,

= 1.8 V,

= 3.3 V,

= 5.0 V,

= 2.0 V,

= 3.3 V,

= 5.0 V,

I

= −400 µA

= −2 mA

= −3 mA

= −20 µA

= −80 µA

= −120 µA

= −1 mA

= −2 mA

= −5 mA

V

OUT

OH

OUT

RESET,

BATTOK,

BATTON

− 0.4 V

− 0.3 V

− 0.4 V

− 0.2 V

− 0.3 V

PFO

High-level output

voltage

V

OH

V

CEOUT

Enable mode

CEIN = V

OUT

CEOUT

Disable mode

V

OUT

= 3.3 V,

I

= −0.5 mA

V

OUT

− 0.4 V

OH

V

= 2.0 V,

= 3.3 V,

= 5.0 V,

= 1.8 V,

= 3.3 V,

= 5.0 V,

= 2.0 V,

= 3.3 V,

= 5.0 V,

I

= 400 µA

= 2 mA

= 3 mA

= 500 µA

= 3 mA

= 5 mA

= 1 mA

= 2 mA

= 5 mA

0.2

OUT

BAT

OL

RESET,

PFO,

BATTOK

0.4

0.2

0.4

0.2

0.3

Low-level output

voltage

V

OL

BATTON

V

CEOUT

Enable mode

CEIN = 0 V

V

> 1.1 V OR

> 1.4 V,

V

res

Power-up reset voltage (see Note 2)

0.4

V

Ω

I

= 20 µA

DD

OL

I

O

I

O

I

O

I

O

I

O

= 5 mA,

V

= 1.8 V

= 3.3 V

= 5 V

V − 50 mV

DD

= 75 mA,

= 150 mA,

= 4 mA,

V

DD

− 150 mV

Normal mode

DD

V

DD

− 250 mV

V

OUT

DD

V

= 1.5 V

= 3.3 V

V

BAT

− 50 mV

BAT

Battery-backup mode

= 75 mA,

V

− 150 mV

BAT

V

to V

OUT

on-resistance

TPS3600x20

V

= 3.3 V

1

2

DD

r

ds(on)

to V

OUT

= 3.3 V

BAT

1.74

2.17

2.57

2.87

4.31

1.13

1.78

2.22

1.82

2.27

2.69

2.99

4.49

1.17

+ 8.3%

TPS3600x25

TPS3600x30

TPS3600x33

TPS3600x50

PFI

2.63

V

IT

Negative-going input

threshold voltage

(see Notes 3 and 4)

2.93

T

A

= −40°C to 85°C

V

4.40

V

1.15

(PFI)

TPS3600Dxx

V

IT

+ 5.8%

V

IT

+ 7.1%

V

(BOK)

IT

Battery switch threshold voltage

negative-going V

V

IT

+ 1%

V + 2%

IT

+ 3.2%

(SWN)

IT

OUT

NOTES: 2. The lowest supply voltage at which RESET becomes active. t

r(VDD)

≥ 15 µs/V.

3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminal.

4. Voltage is sensed at V

OUT

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ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

electrical characteristics over recommended operating conditions (unless otherwise noted)

(continued)

PARAMETER

TEST CONDITIONS

MIN TYP

MAX

UNIT

1.65 V < V < 2.5 V

20

40

IT

2.5 V < V < 3.5 V

V

IT

3.5 V < V < 5.5 V

IT

50

1.65 V < V

2.5 V < V

< 2.5 V

30

(BOK)

< 3.5 V

< 5.5 V

60

BATTOK

PFI

(BOK)

3.5 V < V

(BOK)

100

12

V

hys

Hysteresis

mV

V

DD

= 1.8 V

66

(BSW)

1.65 V < V

2.5 V < V

< 2.5 V

85

(SWN)

< 3.5 V

< 5.5 V

100

110

V

(SWN)

3.5 V < V

(SWN)

WDI (see Note 5) WDI = V

DD

= 5 V

150

I

High-level input current

IH

MR

MR = 0.7 × V , V

DD DD

= 5 V

−33

−76

−150

−255

25

µA

WDI (see Note 5) WDI = 0 V,

V

DD

I

Low-level input current

Input current

IL

MR

MR = 0 V,

V < V

V

DD

−110

−25

PFI, MSWITCH

nA

I

DD

PFO = 0 V,

V

= 1.8 V

= 3.3 V

= 5 V

−0.3

−1.1

−2.4

40

DD

V

DD

V

DD

I

Short-circuit current

PFO

mA

OS

V

OUT

V

OUT

= V

DD

V

supply current

µA

DD

8

BAT

V

OUT

V

OUT

= V

−0.1

0.1

40

1

DD

I

supply current

(BAT)

BAT

CEIN leakage current

Input capacitance

Disable mode, V < V

µA

lkg

I

DD

C

V = 0 V to 5.0 V

I

5

pF

i

NOTE 5: For details on how to optimize current consumption when using WDI, see the detailed description section.

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12

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

timing requirements at R = 1 MΩ, C = 50 pF, T = −40°C to 85°C

L

A

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V

= V + 0.2 V, V = V − 0.2 V

IT IL IT

5

1

µs

DD

IH

MR

t

w

Pulse width

> V + 0.2 V, V = 0.3 x V , V = 0.7 x V

IT IL DD IH DD

100

ns

DD

WDI

switching characteristics at R = 1 MΩ, C = 50 pF, T = −40°C to 85°C

L

A

PARAMETER

TEST CONDITIONS

MIN

TYP

100

MAX

UNIT

V

DD

≥ V + 0.2 V,

IT

t

d

Delay time

MR ≥ 0.7 x V

,

60

140

ms

DD

See timing diagram

V

> V + 0.2 V,

IT

DD

See timing diagram

t

Watchdog time-out

0.48

0.8

15

2

1.12

s

(tout)

Propagation (delay) time,

low-to-high-level output

50% RESET to 50% CEOUT

to RESET

V

OUT

= V

IT

µs

PLH

V

= V − 0.2 V,

IT

IL

IH

V

DD

5

= V + 0.2 V

IT

V

= V

(PFI)

− 0.2 V,

+ 0.2 V

IL

IH

(PFI)

PFI to PFO

3

V

≥ V + 0.2 V,

IT

Propagation (delay) time,

high-to-low-level output

DD

IL

IH

t

PHL

MR to RESET

= 0.3 x V

,

0.1

1

µs

DD

= 0.7 x V

DD

V

DD

V

DD

V

DD

= 1.8 V

= 3.3 V

= 5 V

5

1.6

1

15

5

ns

50% CEIN to 50% CEOUT

CL = 50 pF only (see Note 6)

3

V

= V

− 0.2 V,

+ 0.2 V,

IL

IH

BAT

< V

Transition time

V

DD

to BATTON

3

µs

(BAT)

IT

NOTE 6: Ensured by design.

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Static Drain-source on-state resistance V

Static Drain-source on-state resistance

Supply current

to V

OUT

5

6

DD

vs Output current

to V

OUT

r

BAT

DS(on)

vs Chip enable input voltage

vs Supply voltage

7

I

8, 9

10

DD

V

Normalized threshold voltage

vs Free-air temperature

IT

High-level output voltage at RESET

High-level output voltage at PFO

High-level output voltage at CEOUT

Low-level output voltage at RESET

Low-level output voltage at CEOUT

Low-level output voltage at BATTON

11, 12

13, 14

V

vs High-level output current

vs Low-level output current

OH

15, 16, 17, 18

19, 20

21, 22

23, 24

25

V

OL

Minimum Pulse Duration at V

DD

vs Threshold voltage overdrive at V

DD

t

p(min)

Minimum Pulse Duration at PFI

vs Threshold voltage overdrive at PFI

26

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13

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

STATIC DRAIN SOURCE ON-STATE RESISTANCE

(V

TO V

vs

)

(V

TO V

vs

)

BAT

OUT

DD

OUT

OUTPUT CURRENT

1.5

1.4

1.6

1.5

1.4

1.3

1.2

1.1

V

= 3.3 V

BAT

MSWITCH = V

DD

T

= 85°C

A

T

A

= 85°C

1.3

1.2

1.1

1

T

= 25°C

A

T

A

= 25°C

T

= 0°C

A

T

A

= 0°C

T

= −40°C

A

T

A

= −40°C

V

= 3.3 V

DD

0.9

0.8

1

= GND

BAT

MSWITCH = GND

0.9

50

75

100

125

150

175

200

50

76

100

125

150

175

200

I

O

− Output Current − mA

I

O

− Output Current − mA

Figure 5

Figure 6

STATIC DRAIN SOURCE ON-STATE RESISTANCE

SUPPLY CURRENT

vs

(CEIN to CEOUT)

vs

SUPPLY VOLTAGE

CHIP-ENABLE INPUT VOLTAGE

40

7

6

5

4

3

2

V

Mode

= 5 V

BAT

35

MSWITCH = GND

T

= 25°C

A

30

T

A

= 85°C

T

A

= −40°C

25

20

15

10

T

A

= 0°C

T

A

= 25°C

T

= 0°C

A

T

= −40°C

A

T

= 85°C

A

I

V

= 5 mA

CEOUT

= 5 V

1

0

5

0

DD

MSWITCH = GND

0

1

2

3

4

5

0

0.5

1

1.5

DD

2

2.5

3

3.5

4

4.5

5

V

CEIN

− Chip-Enable Input Voltage − V

V

− Supply Voltage − V

Figure 7

Figure 8

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14

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

NORMALIZED THRESHOLD VOLTAGE

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

vs

FREE-AIR TEMPERATURE

30

25

20

15

10

5

1.001

1

V

Mode

V

Mode

DD

BAT

= GND

V

BAT

= GND

or

DD

MSWITCH = GND

= 0°C

T

A

0.999

0.998

0.997

T

A

= 25°C

T

= 85°C

A

T

= −40°C

A

0.996

0.995

0

−40 −30 −20 −10

0

10 20 30 40 50 60 70 80

0

1

2

3

4

5

6

T

A

− Free-Air Temperature − °C

V

DD

− Supply Voltage − V

Figure 9

Figure 10

HIGH-LEVEL OUTPUT VOLTAGE AT RESET

vs

HIGH-LEVEL OUTPUT CURRENT

5.1

5

6

5

4

3

2

1

0

V

= 5 V

DD

Expanded View

= GND

BAT

MSWITCH = GND

T

= −40°C

A

T

A

= −40°C

T

= 25°C

A

4.9

T

A

= 25°C

T

A

= 0°C

T

A

= 0°C

4.8

4.7

T

A

= 85°C

T

A

= 85°C

V

= 5 V

= GND

MSWITCH = GND

DD

BAT

4.6

4.5

0

−0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5 −5

0

−5

−10

−15

−20

−25

−30

−35

I − High-Level Output Current − mA

OH

I

− High-Level Output Current − mA

OH

Figure 11

Figure 12

www.ti.com

15

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE AT PFO

vs

HIGH-LEVEL OUTPUT CURRENT

5.55

5.50

5.45

5.40

5.35

5.30

5.25

5.20

6

5

4

3

2

Expanded View

T

= −40°C

A

T

= −40°C

A

T

A

= 25°C

T

A

= 25°C

T

A

= 0°C

T

A

= 0°C

T

A

= 85°C

T

= 85°C

A

V

= 5.5 V

DD

PFI = 1.4 V

= GND

V

= 5.5 V

DD

PFI = 1.4 V

= GND

1

0

V

BAT

MSWITCH = GND

5.15

5.10

V

BAT

MSWITCH = GND

0

−20 −40 −60 −80 −100 −120 −140−160−180 −200

0

−0.5 −1

−1.5

−2

−2.5

I − High-Level Output Current − µA

OH

I

− High-Level Output Current − mA

OH

Figure 13

Figure 14

HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT

vs

HIGH-LEVEL OUTPUT CURRENT

3.35

3.30

3.25

3.20

3.5

V

= 3.3 V

Expanded View

Enable Mode

V

= 3.3 V

(CEIN)

= 5 V

DD

Enable Mode

V

DD

= 5 V

MSWITCH = GND

3

2.5

2

MSWITCH = GND

T

A

= −40°C

T

= −40°C

A

T

A

= 25°C

T

A

= 0°C

T

A

= 25°C

T

= 0°C

A

1.5

1

T

A

= 85°C

T

A

= 85°C

3.15

3.10

0.5

0

−0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5 −5

−10

−30

−50 −70 −90 −110 −130 −150

I − High-Level Output Current − mA

OH

I

− High-Level Output Current − mA

OH

Figure 15

Figure 16

www.ti.com

16

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢊꢋꢀꢀ ꢌ ꢍꢎꢏꢊꢋ ꢐꢑꢒꢁ ꢂꢒꢁ ꢌꢍꢓꢔ ꢂꢕ ꢍꢂ ꢖ ꢕꢍ ꢗ ꢕꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍꢕ ꢐ ꢌꢂ ꢂ ꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT

vs

HIGH-LEVEL OUTPUT CURRENT

3.5

3.4

3.3

3.2

3.1

3.5

V

= open

Expanded View

Disable Mode

(CEIN)

= 1.65 V

DD

MSWITCH = GND

3

T

A

= −40°C

T = −40°C

A

2.5

T

A

= 25°C

T

A

= 25°C

T

A

= 0°C

2

T

A

= 0°C

1.5

T

= 85°C

A

3

2.9

2.8

2.7

T

= 85°C

A

1

0.5

0

Disable Mode

V

= open

(CEIN)

= 1.65 V

DD

MSWITCH = GND

0 −0.1 −0.2 −0.3 −0.4 −0.5 −0.6 −0.7 −0.8 −0.9 −1

0

−0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5

I − High-Level Output Current − mA

OH

I

− High-Level Output Current − mA

OH

Figure 17

Figure 18

LOW-LEVEL OUTPUT VOLTAGE AT RESET

vs

LOW-LEVEL OUTPUT CURRENT

500

3.5

3

Expanded View

V

= 3.3 V

= GND

DD

BAT

T = 85°C

A

V

= 3.3 V

DD

MSWITCH = GND

400

300

200

100

0

= GND

BAT

MSWITCH = GND

2.5

2

T

= 25°C

A

T

= 0°C

A

T

A

= 0°C

T

= 25°C

A

1.5

1

T

= 85°C

A

T

A

= −40°C

T

= −40°C

A

0.5

0

1

2

3

4

5

0

5

10

15

20

25

I − Low-Level Output Current − mA

OL

I

− Low-Level Output Current − mA

OL

Figure 19

Figure 20

www.ti.com

17

ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢅ ꢆ ꢇ ꢅꢈ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢇ ꢉ ꢈ ꢀꢁ ꢂ ꢃ ꢄ ꢅ ꢅ ꢆꢃ ꢃ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢉꢅ

ꢊ ꢋꢀ ꢀ ꢌꢍꢎꢏꢊ ꢋ ꢐꢑ ꢒꢁ ꢂ ꢒꢁ ꢌꢍꢓ ꢔ ꢂꢕ ꢍꢂ ꢖꢕ ꢍ ꢗ ꢕ ꢘꢏꢁꢕ ꢘ ꢌꢍ ꢁꢍ ꢕꢐꢌ ꢂꢂꢕ ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

LOW-LEVEL OUTPUT VOLTAGE AT CEOUT

vs

LOW-LEVEL OUTPUT CURRENT

140

120

3.5

3

V

= GND

Enable Mode

Expanded View

(CEIN)

= 5 V

Enable Mode

DD

V

= GND

MSWITCH = GND

(CEIN)

= 5 V

DD

T

A

= 85°C

MSWITCH = GND

2.5

2

100

80

T

= 85°C

A

T

= 25°C

A

T

A

= 25°C

T

A

= 0°C

T

A

= 0°C

60

1.5

1

T

A

= −40°C

T

A

= −40°C

40

20

0

0.5

0

1

2

3

4

5

10 20 30 40 50 60 70 80 90 100

0

I − Low-Level Output Current − mA

OL

I

− Low-Level Output Current − mA

OL

Figure 21

Figure 22

LOW-LEVEL OUTPUT VOLTAGE AT BATTON

vs

LOW-LEVEL OUTPUT CURRENT

3.5

3

400

350

300

250

200

150

100

Enable Mode

V

= 3.3 V

Enable Mode

Expanded View

DD

V

= 3.3 V

DD

= GND

BAT

= GND

BAT

MSWITCH = GND

T

A

= 85°C

2.5

2

T

= 85°C

A

T

= 25°C

A

T

= 0°C

A

T

A

= 0°C

T

A

= 25°C

1.5

1

T

A

= −40°C

T

A

= −40°C

0.5

0

50

0

5

10

15

20

25

30

0

1

2

3

4

5

I

− Low-Level Output Current − mA

OL

I

− Low-Level Output Current − mA

OL

Figure 23

Figure 24

www.ti.com

18

ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢅ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢇꢉ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢅ ꢆ ꢃꢃ ꢈ ꢀ ꢁ ꢂꢃ ꢄꢅ ꢅꢆ ꢉꢅ

ꢁ

ꢊ

ꢋꢀꢀ

ꢌ

ꢍꢎꢏ

ꢊ

ꢋ

ꢐ

ꢑ

ꢒ

ꢁ

ꢂ

ꢒ

ꢁ

ꢌ

ꢍꢓ

ꢔ

ꢂ

ꢕ

ꢍ

ꢂ

ꢖ

ꢕꢍ

ꢗ

ꢕꢘꢏ

ꢕ

ꢘ

ꢌ

ꢍ

ꢁ

ꢍ

ꢕ

ꢐ

ꢌꢂ

ꢂ

ꢕ

ꢍꢂ

SLVS336B − DECEMBER 2000 − REVISED JANUARY 2007

TYPICAL CHARACTERISTICS

TPS3600D50

MINIMUM PULSE DURATION AT V

vs

DD

THRESHOLD OVERDRIVE AT V

DD

10

9

8

7

6

5

4

3

2

1

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

1

V

T(0)

− Threshold Overdrive at V

− V

DD

Figure 25

TPS3600D50

MINIMUM PULSE DURATION AT PFI

vs

THRESHOLD OVERDRIVE AT PFI

5

4.6

4.2

3.8

3.4

3

V

DD

= 1.65 V

2.6

2.2

1.8

1.4

1

0.6

1

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

Threshold Overdrive at PFI − V

Figure 26

www.ti.com

19

PACKAGE OPTION ADDENDUM

www.ti.com

29-Nov-2006

PACKAGING INFORMATION

Orderable Device

TPS3600D20PW

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

TSSOP

PW

14

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS3600D20PWG4

TPS3600D20PWR

TPS3600D20PWRG4

TPS3600D25PW

TSSOP

PW

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS3600D25PWG4

TPS3600D25PWR

TPS3600D25PWRG4

TPS3600D33PW

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS3600D33PWG4

TPS3600D33PWR

TPS3600D33PWRG4

TPS3600D50PW

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS3600D50PWG4

TPS3600D50PWR

TPS3600D50PWRG4

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

29-Nov-2006

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

21-May-2007

TAPE AND REEL INFORMATION

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

21-May-2007

Device

Package Pins

Site

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) (mm) Quadrant

(mm)

TPS3600D20PWR

TPS3600D25PWR

TPS3600D33PWR

TPS3600D50PWR

PW

14

FRB

0

7.0

5.6

1.6

8

12

Q1

TAPE AND REEL BOX INFORMATION

Device

Package

Pins

Site

Length (mm) Width (mm) Height (mm)

TPS3600D20PWR

TPS3600D25PWR

TPS3600D33PWR

TPS3600D50PWR

PW

14

FRB

342.9

336.6

20.6

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

21-May-2007

Pack Materials-Page 3

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,

improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.

Customers should obtain the latest relevant information before placing orders and should verify that such information is current and

complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s

standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this

warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily

performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask

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Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is

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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products

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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products

Amplifiers

Data Converters

DSP

Applications

Audio

amplifier.ti.com

dataconverter.ti.com

dsp.ti.com

www.ti.com/audio

Automotive

Broadband

Digital Control

Military

www.ti.com/automotive

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

interface.ti.com

logic.ti.com

Logic

Power Mgmt

Microcontrollers

RFID

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

www.ti-rfid.com

www.ti.com/lpw

Telephony

Low Power

Wireless

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TPS3600D25PWR
厂家：	TEXAS INSTRUMENTS
描述：	BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS 电池备份监事低功耗处理器电池
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