TPS3600D33 [TI]
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS; 电池备份监事低功耗处理器
| 型号： | TPS3600D33 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS |
| 文件： | 总21页 (文件大小：453K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
features
typical applications
Supply Current of 40 µA (Max)
Precision Supply Voltage Monitor
Fax Machines
Set-Top Boxes
– 2.0 V, 2.5 V, 3.3 V, 5.0 V
– Other Versions on Request
Advanced Voice Mail Systems
Portable Battery Powered Equipment
Computer Equipment
Watchdog Timer With 800-ms Time-Out
Backup-Battery Voltage Can Exceed V
DD
Advanced Modems
Power-On Reset Generator With Fixed
100-ms Reset Delay Time
Automotive Systems
Portable Long-Time Monitoring Equipment
Point of Sale Equipment
Battery OK Output
Voltage Monitor for Power-Fail or
Low-Battery Monitoring
TSSOP (PW) Package
(TOP VIEW)
Manual Switchover to Battery-Backup
Mode
V
1
2
3
4
5
6
7
14
13
12
11
10
9
V
BAT
RESET
OUT
Chip-Enable Gating –3 ns (at V
Max. Propagation Delay
= 5 V)
V
DD
DD
GND
MSWITCH
CEIN
WDI
MR
CEOUT
BATTOK
PFO
Manual Reset
BATTON
PFI
8
Battery Freshness Seal
14-Pin TSSOP Package
Temperature Range . . . –40°C to 85°C
ACTUAL SIZE
(5,10mm x 6,60mm)
typical operating circuit
Address
Power
Decoder
Supply
0.1 µF
External
Source
CE
CMOS
RAM
CE
CMOS
RAM
CEIN
CEOUT
Address Bus
uC
Real-
Time
Clock
Backup
Battery
V
DD
V
BAT
R
R
x
y
TPS3600
V
CC
V
CC
V
CC
PFI
8
8
RESET
I/O
RESET
WDI
Data Bus
16
I/O
I/O
I/O
PFO
BATTOK
BATTON
MR
Switchover
Capacitor
Manual
Reset
MSWITCH
GND
V
OUT
V
CC
0.1 µF
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
description
The TPS3600 family of supervisory circuits monitor and control processor activity. In case of power-fail or
brownout conditions, the backup-battery switchover function of TPS3600 allows to run a low-power processor
and its peripherals from the installed backup battery without asserting a reset beforehand.
During power on, RESET is asserted when the supply voltage (V
or V
) becomes higher than V
.
DD
BAT
res
Thereafter, the supply voltage supervisor monitors V
and keeps RESET output active as long as V
OUT
OUT
remains below the threshold voltage (V ). An internal timer delays the return of the output to the inactive state
IT
(high) to ensure proper system reset. This delay timer starts its time-out, after V
has risen above the
OUT
threshold voltage (V ). In case of a brownout or power failure of both supply sources, a voltage drop below the
IT
threshold voltage (V ) get detected and the output becomes active (low) again.
IT
The product spectrum is designed for supply voltages of 2 V, 2.5 V, 3.3 V, and 5 V. The circuits are available
in a 14-pin TSSOP package. They are characterized for operation over a temperature range of –40°C to 85°C.
PACKAGE INFORMATION
T
DEVICE NAME
TPS3600D20
TPS3600D25
TPS3600D33
TPS3600D50
A
–40°C to 85°C
ordering information application specific versions (see Note)
TPS360
0
D
20
PW
R
Reel
Package
Nominal Supply Voltage
Nominal BATTOK Threshold Voltage
Functionality
Family
DEVICE NAME
TPS3600x20 PW
TPS3600x25 PW
TPS3600x33 PW
TPS3600x50 PW
NOMINAL VOLTAGE, V
NOM
2.0 V
2.5 V
3.3 V
5.0 V
NOMINAL BATTOK
DEVICE NAME
TPS3600Dxx PW
TPS3600Fxx PW
TPS3600Hxx PW
TPS3600Jxx PW
THRESHOLD VOLTAGE, V
BOK
V
IT
V
IT
V
IT
+ 7%
+ 6%
+ 8%
+ 10%
V
IT
†
For the application specific versions, please contact the local TI sales
office for availability and lead time.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
FUNCTION TABLES
V
DD
> V
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
V
> V
V
DD
> V
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
MSWITCH
MR
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
V
OUT
BATTON
RESET
CEOUT
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
EN
SW
OUT
IT
BAT
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
V
BAT
V
BAT
V
BAT
V
BAT
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
V
DD
DD
V
V
BAT
V
BAT
V
BAT
V
BAT
V
BAT
V
BAT
DIS
EN
V
DIS
EN
DD
DD
V
V
BAT
V
BAT
DIS
EN
V
DD
DIS
EN
V
DD
V
V
DIS
EN
BAT
BAT
V
DD
DIS
EN
V
DD
V
V
DIS
EN
BAT
BAT
V
BAT
> V
0
BATTOK
BOK
0
1
1
CONDITION: V
> V
DD(min)
OUT
CEIN
CEOUT
0
1
0
1
CONDITION: Enabled
PFI > V
PFO
PFI
0
1
0
1
CONDITION: V
OUT
> V
DD(min)
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
functional schematic
TPS3600
MR
MSWITCH
V
BAT
+
_
Switch
Control
V
OUT
Internal
Supply
Voltage
V
DD
BATTON
BATTOK
+
Reference
Voltage
_
or 1.15 V
R1
R2
GND
RESET
Logic
and
_
+
Timer
RESET
PFO
_
+
PFI
WDI
Oscillator
Watchdog
Logic
Transition
Detector
V
OUT
and
Control
40 kΩ
CEOUT
CEIN
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
timing diagram
V
BAT
V
(BOK)
V
V
(SWP)
(SWN)
V
(IT)
V
DD
t
t
V
OUT
V
(SWN)
RESET
t
BATTOK
1
0
t
t
BATTON
V
BAT
V
DD
V
BAT
V
DD
V
BAT
NOTES: A. MSWITCH = 0, MR = 1
NOTES: B. Timing diagram shown under normal operation, not in freshness seal mode.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
BATTOK
NO.
9
O
O
I
Battery status output
BATTON
CEIN
6
Logic output/external bypass switch driver output
5
Chip-enable input
CEOUT
GND
10
3
O
I
Chip-enable output
Ground
MR
11
4
I
Manual reset input
MSWITCH
PFI
I
Manual switch to force device into battery-backup mode (connect to GND if not used)
7
I
Power-fail comparator input (connect to GND if not used)
Power-fail comparator output
Active-low reset output
PFO
8
O
O
I
RESET
13
14
2
V
V
V
Backup-battery input
BAT
I
Input supply voltage
DD
1
O
I
Supply output
OUT
WDI
12
Watchdog timer input
detailed description
battery freshness seal
The battery freshness seal of the TPS3600 family disconnects the backup battery from the internal circuitry until
it is needed. This ensures that the backup battery connected to V should be fresh when the final product is
BAT
put to use. The following steps explain how to enable the freshness seal mode:
1. Connect V
(V
> V
)
BAT BAT
BAT(min)
2. Ground PFO
3. Connect PFI to V
or PFI > V
(PFI)
DD
4. Connect V
to power supply (V
> V )
DD IT
DD
5. Ground MR
6. Power down V
DD
7. The freshness seal mode is entered and pins PFO and MR can be disconnected.
The battery freshness seal mode is disabled by the positive-going edge of RESET when V
is applied.
DD
BATTOK output
This is a logic feedback of the device to indicate the status of the backup battery. The supervisor checks the
battery voltage every 200 ms with a voltage divider load of approximately 100 KΩ and a measure cycle on-time
of 25 µs. This measurement cycle starts after the reset is released. If the battery voltage V
is below the
BAT
negative-going threshold voltage V
, the indicator BATTOK does a high-to-low transition. Otherwise, its
(BOK)
status remains to the V
level.
OUT
Table 1. Typical Values for BATTOK Indication
SUPERVISOR TYPE
V
TYP
V
MIN
V
TYP
V
MAX
IT
BOK
BOK
BOK
1.97 V
TPS3600D20
TPS3600D25
TPS3600D33
TPS3600D50
1.78 V
2.22 V
2.93 V
4.40 V
1.84 V
2.3 V
1.91 V
2.38 V
3.14 V
4.71 V
2.46 V
3.24 V
4.86 V
3.04 V
4.56 V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
detailed description (continued)
I
BAT
200 ms
25 µs
100 µA
t
Figure 1. BATTOK Timing
chip-enable signal gating
The internal gating of chip-enable signals (CE) prevents erroneous data from corrupting CMOS RAM during
an under-voltage condition. The TPS3600 use a series transmission gate from CEIN to CEOUT. During normal
operation (reset not asserted), the CE transmission gate is enabled and passes all CE transitions. When reset
is asserted, this path becomes disabled, preventing erroneous data from corrupting the CMOS RAM. The short
CE propagation delay from CEIN to CEOUT enables the TPS3600 devices to be used with most processors.
The CE transmission gate is disabled and CEIN is high impedance (disable mode) while reset is asserted.
During a power-down sequence when V
crosses the reset threshold, the CE transmission gate will be
DD
disabled and CEIN immediately becomes high impedance if the voltage at CEIN is high. If CEIN is low during
reset is asserted, the CE transmission gate will be disabled same time when CEIN goes high, or 15 µs after reset
asserts, whichever occurs first. This will allow the current write cycle to complete during power down. When the
CE transmission gate is enabled, the impedance of CEIN appears as a resistor in series with the load at CEOUT.
The overall device propagation delay through the CE transmission gate depends on V
, the source
OUT
impedance of the device connected to CEIN and the load at CEOUT. To achieve minimum propagation delay,
the capacitive load at CEOUT should be minimized, and a low-output-impedance driver be used.
During disable mode, the transmission gate is off and an active pullup connects CEOUT to V
turns off when the transmission gate is enabled.
. This pullup
OUT
CEIN
t
CEOUT
15 µs
t
RESET
t
Figure 2. Chip-Enable Timing
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
detailed description (continued)
power-fail comparator (PFI and PFO)
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail
input (PFI) will be compared with an internal voltage reference of 1.15 V. If the input voltage falls below the
power-fail threshold, V
, of 1.15 V typical, the power-fail output (PFO) goes low. If it goes above V
plus
(PFI)
(PFI)
about 12-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to
supervise any voltages above V . The sum of both resistors should be about 1 MΩ, to minimize power
(PFI)
consumption and also to ensure that the current in the PFI pin can be neglected compared with the current
through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure
minimal variation of sensed voltage.
If the power-fail comparator is unused, connect PFI to ground and leave PFO unconnected.
BATTON
Most often BATTON is used as a gate drive for an external pass transistor for high-current applications. In
addition it can be also used as a logic output to indicate the battery switchover status. BATTON is high when
V
is connected to V
.
OUT
BAT
BATTON can be directly connected to the gate of a PMOS transistor (see Figure 3). No current-limiting resistor
is required. When using a PMOS transistor, it must be connected backwards from the traditional method (see
Figure 3). This method orients the body diode from V
discharging through the FET when its gate is high.
to V
and prevents the backup battery from
DD
OUT
PMOS FET
Body Diode
D
S
G
V
DD
BATTON V
TPS3600
GND
OUT
Figure 3. Driving an External MOSFET Transistor With BATTON
backup-battery switchover
In the event of a brownout or power failure, it may be necessary to keep a processor running. If a backup battery
is installed at V , the devices automatically connect the processor to backup power when V fails. In order
BAT
DD
toallowthebackupbattery(e.g., a3.6-Vlithiumcell)tohaveahighervoltagethanV , thisfamilyofsupervisors
DD
OUT
willnotconnectV
toV
whenV
andV
isgreaterthanV .V
onlyconnectstoV
(througha2-Ωswitch)
BAT
OUT
BAT
BAT
DD BAT
whenV
until V
fallsbelowV
crosses V
isgreaterthanV .WhenV recovers, switchoverisdeferredeither
OUT
(SWN)
DD DD
rises above the threshold V
, or when V
. (See the timing diagram)
(SWP)
DD
BAT
DD
V
DD
> V
V
DD
> V
1
V
OUT
BAT
(SW)
1
1
0
0
V
DD
DD
DD
0
V
1
V
0
V
BAT
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
detailed description (continued)
manual switchover (MSWITCH)
While operating in the normal mode from V , the device can be manually forced to operate in the
DD
battery-backup mode by connecting MSWITCH to V . The table below shows the different switchover modes.
DD
MSWITCH
STATUS
GND
V
mode
DD
V
mode
DD
V
DD
GND
Switch to battery-backup mode
Battery-backup mode
Battery-backup mode
V
DD
Battery-backup mode
If the manual switchover feature is not used, MSWITCH must be connected to ground.
watchdog
In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also
important to ensure the correct program execution. The task of a watchdog is to ensure that the program is not
stalled in an indefinite loop. The microprocessor, microcontroller, or the DSP have to toggle the watchdog input
within typically 0.8 s to avoid a time-out from occurring. Either a low-to-high or a high-to-low transition resets
the internal watchdog timer. If the input is unconnected the watchdog is disabled and will be retriggered
internally.
saving current while using the watchdog
The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily
pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power
consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once
within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead, WDI is externally driven high
for the majority of the time-out period, a current of e.g. 5 V/40 kΩ ≈ 125 µA can flow into WDI.
V
OUT
V
IT
WDI
t
(tout)
RESET
t
t
t
d
d
d
Undefined
Figure 4. Watchdog Timing
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage:
V
(see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
DD
All other pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Continuous output current at V : I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
OUT O
All other pins, I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000h
continuously.
DISSIPATION RATING TABLE
PACKAGE
T
< 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
POWER RATING
A
A
POWER RATING
ABOVE T = 25°C
POWER RATING
A
PW
700 mW
5.6 mW/°C
448 mW
364 mW
recommended operating conditions at specified temperature range
MIN
MAX
UNIT
V
Supply voltage, V
DD
1.65
1.5
0
5.5
Battery supply voltage, V
5.5
V
BAT
Input voltage, V
V
+ 0.3
V
I
OUT
High-level input voltage, V
IH
0.7 x V
V
OUT
Low-level input voltage, all other pins, V
IL
0.3 x V
V
OUT
200
Continuous output current at V
, I
mA
ns/V
OUT O
Input transition rise and fall rate at WDI, MSWITCH, ∆t/∆V
Slew rate at V or V
100
34 mV/µs
85 °C
DD
BAT
Operating free-air temperature range, T
–40
A
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
– 0.2 V
TYP
MAX
UNIT
V
V
V
V
V
V
V
V
V
= 2.0 V,
= 3.3 V,
= 5.0 V,
= 1.8 V,
= 3.3 V,
= 5.0 V,
= 2.0 V,
= 3.3 V,
= 5.0 V,
I
I
I
I
I
I
I
I
I
= –400 µA
= –2 mA
= –3 mA
= –20 µA
= –80 µA
= –120 µA
= –1 mA
= –2 mA
= –5 mA
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OH
OH
OH
OH
OH
OH
OH
OH
OH
OUT
OUT
OUT
OUT
OUT
OUT
RESET,
BATTOK,
BATTON
– 0.4 V
– 0.3 V
– 0.4 V
– 0.2 V
– 0.3 V
PFO
High-level output
voltage
V
OH
V
CEOUT
Enable mode
CEIN = V
OUT
CEOUT
Disable mode
V
OUT
= 3.3 V,
I
= –0.5 mA
V
OUT
– 0.4 V
OH
V
V
V
V
V
V
V
V
V
= 2.0 V,
= 3.3 V,
= 5.0 V,
= 1.8 V,
= 3.3 V,
= 5.0 V,
= 2.0 V,
= 3.3 V,
= 5.0 V,
I
I
I
I
I
I
I
I
I
= 400 µA
= 2 mA
= 3 mA
= 500 µA
= 3 mA
= 5 mA
= 1 mA
= 2 mA
= 5 mA
0.2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BAT
OL
OL
OL
OL
OL
OL
OL
OL
OL
RESET,
PFO,
BATTOK
0.4
0.2
0.4
0.2
0.3
Low-level output
voltage
V
OL
BATTON
V
CEOUT
Enable mode
CEIN = 0 V
V
V
> 1.1 V OR
> 1.4 V,
V
res
Power-up reset voltage (see Note 2)
Normal mode
0.4
V
V
I
= 20 µA
OL
DD
I
O
I
O
I
O
I
O
I
O
= 5 mA,
V
V
= 1.8 V
= 3.3 V
= 5 V
V – 50 mV
DD
DD
DD
= 75 mA,
= 150 mA,
= 4 mA,
V
DD
– 150 mV
V
OUT
V
V
DD
– 250 mV
DD
V
= 1.5 V
= 3.3 V
V
BAT
– 50 mV
BAT
BAT
Battery-backup mode
= 75 mA,
V
V
– 150 mV
BAT
V
V
to V
on-resistance
V
V
= 3.3 V
1
1
2
2
DD
OUT
to V
DD
r
Ω
V
V
ds(on)
on-resistance
= 3.3 V
BAT
OUT
BAT
TPS3600x20
1.74
2.17
2.57
2.87
4.31
1.13
1.78
2.22
1.82
2.27
2.69
2.99
4.49
1.17
+ 8.3%
TPS3600x25
TPS3600x30
TPS3600x33
TPS3600x50
PFI
V
2.63
IT
Negative-going input
threshold voltage
(see Notes 3 and 4)
T
A
= –40°C to 85°C
2.93
4.40
V
V
1.15
(PFI)
TPS3600Dxx
V
IT
+ 5.8%
V
IT
+ 7.1%
V
V
(BOK)
IT
Battery switch threshold voltage
negative-going V
V
V
IT
+ 1%
V + 2%
IT
+ 3.2%
(SWN)
IT
OUT
NOTES: 2. The lowest supply voltage at which RESET becomes active. t
≥ 15 µs/V.
r(VDD)
3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminal.
4. Voltage is sensed at V
OUT
11
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TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
electrical characteristics over recommended operating conditions (unless otherwise noted)
(continued)
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
1.65 V < V < 2.5 V
20
40
IT
V
IT
2.5 V < V < 3.5 V
IT
3.5 V < V < 5.5 V
IT
50
1.65 V < V
< 2.5 V
30
(BOK)
BATTOK
PFI
2.5 V < V
3.5 V < V
< 3.5 V
< 5.5 V
60
(BOK)
(BOK)
V
hys
Hysteresis
mV
100
12
V
V
DD
= 1.8 V
66
(BSW)
1.65 V < V
2.5 V < V
< 2.5 V
85
(SWN)
V
< 3.5 V
100
110
(SWN)
(SWN)
3.5 V < V
< 5.5 V
(SWN)
= 5 V
WDI (see Note 5) WDI = V
150
DD
I
High-level input current
IH
MR
WDI (see Note 5) WDI = 0 V,
MR = 0.7 × V , V
= 5 V
= 5 V
= 5 V
–33
–76
–150
–255
25
DD DD
µA
V
DD
I
I
Low-level input current
Input current
IL
MR
MR = 0 V,
V < V
V
–110
–25
DD
PFI, MSWITCH
nA
I
I
DD
PFO = 0 V,
PFO = 0 V,
PFO = 0 V,
V
= 1.8 V
= 3.3 V
= 5 V
–0.3
–1.1
–2.4
40
DD
I
I
Short-circuit current
PFO
mA
V
V
OS
DD
DD
V
OUT
V
OUT
= V
= V
DD
V
V
supply current
µA
µA
DD
DD
8
BAT
V
OUT
V
OUT
= V
= V
–0.1
0.1
40
±1
DD
I
I
supply current
(BAT)
BAT
BAT
CEIN leakage current
Input capacitance
Disable mode, V < V
µA
lkg
I
DD
C
V = 0 V to 5.0 V
I
5
pF
i
NOTE 5: For details on how to optimize current consumption when using WDI, see the detailed description section.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
timing requirements at R = 1 MΩ, C = 50 pF, T = –40°C to 85°C
L
L
A
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
V
= V + 0.2 V, V = V – 0.2 V
5
1
µs
DD
IH
IT IL IT
Pulse width
MR
t
w
> V + 0.2 V, V = 0.3 x V , V = 0.7 x V
IT IL DD IH DD
100
ns
DD
WDI
switching characteristics at R = 1 MΩ, C = 50 pF, T = –40°C to 85°C
L
L
A
PARAMETER
TEST CONDITIONS
MIN
TYP
100
MAX
UNIT
V
DD
≥ V + 0.2 V,
IT
t
d
Delay time
MR ≥ 0.7 x V
,
DD
60
140
ms
See timing diagram
V
> V + 0.2 V,
IT
DD
See timing diagram
t
t
Watchdog time-out
0.48
0.8
15
2
1.12
s
(tout)
Propagation (delay) time,
low-to-high-level output
50% RESET to 50% CEOUT
to RESET
V
OUT
= V
µs
µs
µs
PLH
IT
V
V
= V – 0.2 V,
IL
IH
IT
= V + 0.2 V
V
DD
5
5
IT
V
V
= V
– 0.2 V,
+ 0.2 V
(PFI)
IL
IH
(PFI)
= V
PFI to PFO
3
V
V
V
≥ V + 0.2 V,
IT
Propagation (delay) time,
high-to-low-level output
DD
IL
IH
t
PHL
MR to RESET
= 0.3 x V
,
0.1
1
µs
DD
= 0.7 x V
DD
V
DD
V
DD
V
DD
= 1.8 V
= 3.3 V
= 5 V
5
1.6
1
15
5
ns
ns
ns
50% CEIN to 50% CEOUT
CL = 50 pF only (see Note 6)
3
V
V
V
= V
= V
– 0.2 V,
+ 0.2 V,
IL
IH
BAT
BAT
< V
Transition time
V
DD
to BATTON
3
µs
(BAT)
IT
NOTE 6: Ensured by design.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Static Drain-source on-state resistance V
Static Drain-source on-state resistance V
Static Drain-source on-state resistance
Supply current
to V
5
6
DD
OUT
to V
OUT
vs Output current
r
DS(on)
BAT
vs Chip enable input voltage
vs Supply voltage
7
I
8, 9
10
DD
V
Normalized threshold voltage
vs Free-air temperature
IT
High-level output voltage at RESET
High-level output voltage at PFO
High-level output voltage at CEOUT
Low-level output voltage at RESET
Low-level output voltage at CEOUT
Low-level output voltage at BATTON
11, 12
13, 14
V
vs High-level output current
vs Low-level output current
OH
15, 16, 17, 18
19, 20
21, 22
23, 24
25
V
OL
Minimum Pulse Duration at V
DD
vs Threshold voltage overdrive at V
DD
vs Threshold voltage overdrive at PFI
t
p(min)
Minimum Pulse Duration at PFI
26
13
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TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
STATIC DRAIN SOURCE ON-STATE RESISTANCE
STATIC DRAIN SOURCE ON-STATE RESISTANCE
(V
TO V
vs
)
(V
TO V
vs
)
BAT
OUT
DD
OUT
OUTPUT CURRENT
OUTPUT CURRENT
1.5
1.4
1.6
1.5
1.4
1.3
1.2
1.1
V
= 3.3 V
BAT
MSWITCH = V
DD
T
= 85°C
A
T
A
= 85°C
1.3
1.2
1.1
1
T
= 25°C
A
T
A
= 25°C
T
= 0°C
A
T
A
= 0°C
T
= –40°C
A
T
A
= –40°C
V
V
= 3.3 V
DD
0.9
0.8
1
= GND
BAT
MSWITCH = GND
0.9
50
75
100
125
150
175
200
50
76
100
125
150
175
200
I
O
– Output Current – mA
I
O
– Output Current – mA
Figure 5
Figure 6
STATIC DRAIN SOURCE ON-STATE RESISTANCE
SUPPLY CURRENT
vs
(CEIN to CEOUT)
vs
SUPPLY VOLTAGE
CHIP-ENABLE INPUT VOLTAGE
40
7
6
5
4
3
2
V
V
Mode
= 5 V
BAT
BAT
35
MSWITCH = GND
T
= 25°C
A
30
T
A
= 85°C
T
A
= –40°C
25
20
15
10
T
A
= 0°C
T
A
= 25°C
T
= 0°C
A
T
= –40°C
A
T
= 85°C
A
I
= 5 mA
CEOUT
V = 5 V
1
0
5
0
DD
MSWITCH = GND
0
1
2
3
4
5
0
0.5
1
1.5
DD
2
2.5
3
3.5
4
4.5
5
V
CEIN
– Chip-Enable Input Voltage – V
V
– Supply Voltage – V
Figure 7
Figure 8
14
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TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
NORMALIZED THRESHOLD VOLTAGE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
30
25
20
15
10
5
1.001
1
V
V
Mode
V
Mode
DD
BAT
= GND
V
BAT
= GND
or
DD
MSWITCH = GND
MSWITCH = GND
= 0°C
T
A
0.999
0.998
0.997
T
A
= 25°C
T
= 85°C
A
T
= –40°C
A
0.996
0.995
0
–40 –30 –20 –10
0 10 20 30 40 50 60 70 80
0
1
2
3
4
5
6
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 9
Figure 10
HIGH-LEVEL OUTPUT VOLTAGE AT RESET
HIGH-LEVEL OUTPUT VOLTAGE AT RESET
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
5.1
5
6
5
4
3
2
1
0
V
V
= 5 V
DD
Expanded View
= GND
BAT
MSWITCH = GND
T
= –40°C
A
T
A
= –40°C
T
= 25°C
A
4.9
T
A
= 25°C
T
A
= 0°C
T
A
= 0°C
4.8
4.7
T
A
= 85°C
T
A
= 85°C
V
V
= 5 V
= GND
MSWITCH = GND
DD
BAT
4.6
4.5
0
–0.5 –1 –1.5 –2 –2.5 –3 –3.5 –4 –4.5 –5
0
–5
–10
–15
–20
–25
–30
–35
I – High-Level Output Current – mA
OH
I
– High-Level Output Current – mA
OH
Figure 11
Figure 12
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE AT PFO
HIGH-LEVEL OUTPUT VOLTAGE AT PFO
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
5.55
5.50
5.45
5.40
5.35
5.30
5.25
5.20
6
5
4
3
2
Expanded View
T
= –40°C
A
T
= –40°C
A
T
A
= 25°C
T
A
= 25°C
T
A
= 0°C
T
A
= 0°C
T
A
= 85°C
T
= 85°C
A
V
= 5.5 V
DD
PFI = 1.4 V
= GND
V
= 5.5 V
DD
PFI = 1.4 V
= GND
1
0
V
BAT
MSWITCH = GND
5.15
5.10
V
BAT
MSWITCH = GND
0
–20 –40 –60 –80 –100 –120 –140 –160 –180 –200
0
–0.5 –1
–1.5
–2
–2.5
I – High-Level Output Current – µA
OH
I
– High-Level Output Current – mA
OH
Figure 13
Figure 14
HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT
HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
3.35
3.30
3.25
3.20
3.5
V
V
= 3.3 V
Expanded View
Enable Mode
V
= 3.3 V
(CEIN)
(CEIN)
= 5 V
DD
Enable Mode
V
DD
= 5 V
MSWITCH = GND
3
2.5
2
MSWITCH = GND
T
A
= –40°C
T
= –40°C
A
T
A
= 25°C
T
A
= 0°C
T
A
= 25°C
T
= 0°C
A
1.5
1
T
A
= 85°C
T
A
= 85°C
3.15
3.10
0.5
0
0
–0.5 –1 –1.5 –2 –2.5 –3 –3.5 –4 –4.5 –5
–10
–30
–50 –70 –90 –110 –130 –150
I – High-Level Output Current – mA
OH
I
– High-Level Output Current – mA
OH
Figure 15
Figure 16
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT
HIGH-LEVEL OUTPUT VOLTAGE AT CEOUT
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
3.5
3.4
3.3
3.2
3.1
3.5
V
V
= open
Expanded View
Disable Mode
(CEIN)
= 1.65 V
DD
MSWITCH = GND
3
T
A
= –40°C
T
= –40°C
2.5
T
A
= 25°C
A
T
A
= 25°C
T
A
= 0°C
2
T
A
= 0°C
1.5
T
= 85°C
A
3
2.9
2.8
2.7
T
= 85°C
A
1
0.5
0
Disable Mode
V
V
= open
(CEIN)
= 1.65 V
DD
MSWITCH = GND
0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –0.7 –0.8 –0.9 –1
0
–0.5 –1 –1.5 –2 –2.5 –3 –3.5 –4 –4.5
I – High-Level Output Current – mA
OH
I
– High-Level Output Current – mA
OH
Figure 17
Figure 18
LOW-LEVEL OUTPUT VOLTAGE AT RESET
LOW-LEVEL OUTPUT VOLTAGE AT RESET
vs
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
500
3.5
3
Expanded View
V
V
= 3.3 V
= GND
DD
BAT
T = 85°C
A
V
V
= 3.3 V
DD
MSWITCH = GND
400
300
200
100
0
= GND
BAT
MSWITCH = GND
2.5
2
T
= 25°C
A
T
= 0°C
A
T
A
= 0°C
T
= 25°C
A
1.5
1
T
= 85°C
A
T
A
= –40°C
T
= –40°C
A
0.5
0
1
2
3
4
5
0
0
5
10
15
20
25
I – Low-Level Output Current – mA
OL
I
– Low-Level Output Current – mA
OL
Figure 19
Figure 20
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE AT CEOUT
LOW-LEVEL OUTPUT VOLTAGE AT CEOUT
vs
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
140
120
3.5
3
V
V
= GND
Enable Mode
Expanded View
(CEIN)
= 5 V
Enable Mode
DD
V
V
= GND
MSWITCH = GND
(CEIN)
= 5 V
DD
T
A
= 85°C
MSWITCH = GND
2.5
2
100
80
T
= 85°C
A
T
= 25°C
A
T
A
= 25°C
T
A
= 0°C
T
A
= 0°C
60
1.5
1
T
A
= –40°C
T
A
= –40°C
40
20
0
0.5
0
0
1
2
3
4
5
10 20 30 40 50 60 70 80 90 100
0
I – Low-Level Output Current – mA
OL
I
– Low-Level Output Current – mA
OL
Figure 21
Figure 22
LOW-LEVEL OUTPUT VOLTAGE AT BATTON
LOW-LEVEL OUTPUT VOLTAGE AT BATTON
vs
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3.5
3
400
350
300
250
200
150
100
Enable Mode
V
V
= 3.3 V
Enable Mode
Expanded View
DD
V
V
= 3.3 V
DD
= GND
BAT
= GND
BAT
MSWITCH = GND
MSWITCH = GND
T
A
= 85°C
2.5
2
T
= 85°C
A
T
= 25°C
A
T
= 0°C
A
T
A
= 0°C
T
A
= 25°C
1.5
1
T
A
= –40°C
T
A
= –40°C
0.5
0
50
0
5
10
15
20
25
30
0
0
1
2
3
4
5
I
– Low-Level Output Current – mA
OL
I
– Low-Level Output Current – mA
OL
Figure 23
Figure 24
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
TYPICAL CHARACTERISTICS
TPS3600D50
MINIMUM PULSE DURATION AT V
vs
DD
THRESHOLD OVERDRIVE AT V
DD
10
9
8
7
6
5
4
3
2
1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
V
T(0)
– Threshold Overdrive at V
– V
DD
Figure 25
TPS3600D50
MINIMUM PULSE DURATION AT PFI
vs
THRESHOLD OVERDRIVE AT PFI
5
4.6
4.2
3.8
3.4
3
V
DD
= 1.65 V
2.6
2.2
1.8
1.4
1
0.6
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Threshold Overdrive at PFI – V
Figure 26
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS3600D20, TPS3600D25, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336A – DECEMBER 2000 – REVISED APRIL 2001
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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pertaining to warranty, patent infringement, and limitation of liability.
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Customers are responsible for their applications using TI components.
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Also see: Standard Terms and Conditions of Sale for Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
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