TPS2012PWLE [TI]

POWER-DISTRIBUTION; 配电
TPS2012PWLE
型号: TPS2012PWLE
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

POWER-DISTRIBUTION
配电

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TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
D PACKAGE  
(TOP VIEW)  
95-mMax (5.5-V Input) High-Side MOSFET  
Switch With Logic Compatible Enable Input  
Short-Circuit and Thermal Protection  
GND  
IN  
OUT  
OUT  
OUT  
OUT  
1
2
3
4
8
7
6
5
Typical Short-Circuit Current Limits:  
0.4 A, TPS2010; 1.2 A, TPS2011;  
2 A, TPS2012; 2.6 A, TPS2013  
IN  
EN  
Electrostatic-Discharge Protection, 12-kV  
Output, 6-kV All Other Terminals  
PW PACKAGE  
(TOP VIEW)  
Controlled Rise and Fall Times to Limit  
Current Surges and Minimize EMI  
GND  
IN  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
SOIC-8 Package Pin Compatible With the  
Popular Littlefoot Series When GND Is  
Connected  
IN  
IN  
2.7-V to 5.5-V Operating Range  
IN  
10-µA Maximum Standby Current  
IN  
Surface-Mount SOIC-8 and TSSOP-14  
Packages  
EN  
8
40°C to 125°C Operating Junction  
Temperature Range  
description  
The TPS201x family of power-distribution switches is intended for applications where heavy capacitive loads  
and short circuits are likely to be encountered. The high-side switch is a 95-mN-channel MOSFET. Gate drive  
is provided by an internal driver and charge pump designed to control the power switch rise times and fall times  
to minimize current surges during switching. The charge pump operates at 100 kHz, requires no external  
components, and allows operation from supplies as low as 2.7 V. When the output load exceeds the current-limit  
threshold or a short circuit is present, the TPS201x limits the output current to a safe level by switching into a  
constant-current mode. Continuous heavy overloads and short circuits increase power dissipation in the switch  
and cause the junction temperature to rise. If the junction temperature reaches approximately 180°C, a thermal  
protection circuit shuts the switch off to prevent damage. Recovery from thermal shutdown is automatic once  
the device has cooled sufficiently.  
The members of the TPS201x family differ only in short-circuit current threshold. The TPS2010 is designed to  
limit at 0.4-A load; the other members of the family limit at 1.2 A, 2 A, and 2.6 A (see the available options table).  
The TPS201x family is available in 8-pin small-outline integrated circuit (SOIC) and 14-pin thin shink  
small-outline (TSSOP) packages and operates over a junction temperature range of 40°C to 125°C. Versions  
in the 8-pin SOIC package are drop-in replacements for Siliconix’s Littlefoot power PMOS switches, except  
that GND must be connected.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
RECOMMENDED MAXIMUM  
CONTINUOUS LOAD CURRENT  
(A)  
TYPICAL SHORT-CIRCUIT  
OUTPUT CURRENT LIMIT AT 25°C  
CHIP  
FORM  
(Y)  
T
J
SOIC  
TSSOP  
(A)  
(D)  
(PW)  
0.2  
0.6  
1
0.4  
1.2  
2
TPS2010D TPS2010PWLE TPS2010Y  
TPS2011D TPS2011PWLE TPS2011Y  
TPS2012D TPS2012PWLE TPS2012Y  
TPS2013D TPS2013PWLE TPS2013Y  
40°C to 125°C  
1.5  
2.6  
The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2010DR).  
The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TPS2010PWLE).  
functional block diagram  
Power Switch  
CS  
IN  
OUT  
Charge  
Pump  
Current  
Limit  
Driver  
EN  
GND  
Thermal  
Sense  
Current sense  
Terminal Functions  
TERMINAL  
NO.  
I/O  
DESCRIPTION  
NAME  
D
4
PW  
7
EN  
I
I
Enable input. Logic low turns power switch on.  
GND  
IN  
1
1
Ground  
2, 3  
5–8  
2–6  
8–14  
I
Input voltage  
Power-switch output  
OUT  
O
detailed description  
power switch  
The power switch is an N-channel MOSFET with a maximum on-state resistance of 95 m(V  
configured as a high-side switch.  
= 5.5 V),  
I(IN)  
charge pump  
An internal 100-kHz charge pump supplies power to the driver circuit and provides the necessary voltage to pull  
the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and  
requires very little supply current.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
detailed description (continued)  
driver  
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated  
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and  
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range instead of the  
microsecond or nanosecond range for a standard FET.  
enable (EN)  
AlogichighontheENinputturnsoffthepowerswitchandthebiasforthechargepump, driver, andothercircuitry  
to reduce the supply current to less than 10 µA. A logic zero input restores bias to the drive and control circuits  
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.  
current sense  
A sense FET monitors the current supplied to the load. The sense FET is a much more efficient way to measure  
current than conventional resistance methods. When an overload or short circuit is encountered, the  
current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives  
the power FET into its linear region, which switches the output into a constant current mode and simply holds  
the current constant while varying the voltage on the load.  
thermal sense  
An internal thermal-sense circuit shuts the power switch off when the junction temperature rises to  
approximately 180°C. Hysteresis is built into the thermal sense, and after the device has cooled approximately  
20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed.  
TPS201xY chip information  
This chip, when properly assembled, displays characteristics similar to the TPS201xC. Thermal compression  
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chip may be mounted with  
conductive epoxy or a gold-silicon preform.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
BONDING PAD ASSIGNMENTS  
(1)  
(2)  
(3)  
(4)  
(8)  
(7)  
(6)  
(5)  
(8)  
(7)  
(1)  
GND  
OUT  
IN  
IN  
OUT  
OUT  
TPS201xY  
EN  
OUT  
(2)  
(3)  
81  
CHIP THICKNESS: 15 MILS TYPICAL  
BONDING PADS: 4 × 4 MILS MINIMUM  
T max = 150°C  
J
TOLERANCES ARE ±10%  
(4)  
(5)  
(6)  
ALL DIMENSIONS ARE IN MILS  
72  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Input voltage range, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V  
I(IN)  
O
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to V  
Input voltage range, V at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 7 V  
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
+0.3 V  
I(IN)  
O
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 125°C  
J
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: All voltages are with respect to GND.  
DISSIPATION RATING TABLE  
DERATING FACTOR  
T
25°C  
T
A
= 70°C  
T = 125°C  
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING  
A
D
PW  
725 mW  
700 mW  
5.8 mW/°C  
5.6 mW/°C  
464 mW  
448 mW  
145 mW  
140 mW  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
recommended operating conditions  
MIN  
2.7  
0
MAX  
5.5  
5.5  
0.2  
0.6  
1
UNIT  
V
Input voltage, V  
I(IN)  
Input voltage, V at EN  
I
V
TPS2010  
TPS2011  
TPS2012  
TPS2013  
0
0
Continuous output current, I  
A
O
0
0
1.5  
Operating virtual junction temperature, T  
40  
125  
°C  
J
electrical characteristics over recommended operating junction temperature range, V  
O
= 5.5 V,  
I(IN)  
I = rated current, EN = 0 V (unless otherwise noted)  
power switch  
TPS2010, TPS2011  
TPS2012, TPS2013  
PARAMETER  
UNIT  
TEST CONDITIONS  
MIN  
TYP  
75  
MAX  
95  
V
V
V
V
= 5.5 V,  
= 4.5 V,  
= 3 V,  
T = 25°C  
J
I(IN)  
I(IN)  
I(IN)  
I(IN)  
T = 25°C  
J
80  
110  
175  
215  
1
On-state resistance  
m  
T = 25°C  
J
120  
140  
0.001  
= 2.7 V,  
T = 25°C  
J
T = 25°C  
J
Output leakage current  
Output rise time  
µA  
ms  
ms  
EN = V  
I(IN)  
40°C T 125°C  
10  
J
V
I(IN)  
V
I(IN)  
V
I(IN)  
V
I(IN)  
= 5.5 V,  
= 2.7 V,  
= 5.5 V,  
= 2.7 V,  
T = 25°C,  
J
C
C
C
C
= 1 µF  
= 1 µF  
= 1 µF  
= 1 µF  
4
3.8  
3.9  
3.5  
L
L
L
L
t
t
r
T = 25°C,  
J
T = 25°C,  
J
Output fall time  
f
T = 25°C,  
J
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
enable input (EN)  
TPS2010, TPS2011  
TPS2012, TPS2013  
PARAMETER  
High-level input voltage  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
MAX  
2.7 V V  
4.5 V V  
2.7 V V  
5.5 V  
5.5 V  
< 4.5 V  
2
V
V
I(IN)  
I(IN)  
I(IN)  
0.8  
0.4  
0.5  
20  
Low-level input voltage  
Input current  
0.5  
µA  
ms  
EN = 0 V or EN = V  
I(IN)  
t
t
Propagation (delay) time, low-to-high-level output  
Propagation (delay) time, high-to-low-level output  
C
C
= 1 µF  
= 1 µF  
PLH  
L
L
40  
PHL  
current limit  
TPS2010, TPS2011  
TPS2012, TPS2013  
PARAMETER  
UNIT  
TEST CONDITIONS  
MIN  
0.22  
0.66  
1.1  
TYP  
0.4  
1.2  
2
MAX  
0.6  
1.8  
3
TPS2010  
TPS2011  
TPS2012  
TPS2013  
T = 25°C,  
J
V
I(IN)  
= 5.5 V,  
Short-circuit current  
A
OUT connected to GND, device  
enabled into short circuit  
1.65  
2.6  
4.5  
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
electrical characteristics over recommended operating junction temperature range, V  
O
= 5.5 V,  
I(IN)  
I = rated current, EN = 0 V (unless otherwise noted) (continued)  
supply current  
TPS2010, TPS2011  
TPS2012, TPS2013  
PARAMETER  
TEST CONDITIONS  
T = 25°C  
UNIT  
MIN  
TYP  
MAX  
1
0.015  
J
Supply current, low-level output  
µA  
µA  
EN = V  
I(IN)  
40°C T 125°C  
10  
J
T = 25°C  
J
73  
100  
100  
EN = 0 V  
Supply current, high-level output  
40°C T 125°C  
J
electrical characteristics over recommended operating junction temperature range, V  
= 5.5 V,  
I(IN)  
I = rated current, EN = 0 V, T = 25°C (unless otherwise noted)  
O
J
power switch  
TPS2010Y, TPS2011Y  
TPS2012Y, TPS2013Y  
PARAMETER  
UNIT  
TEST CONDITIONS  
= 5.5 V,  
MIN  
TYP  
75  
MAX  
V
V
V
V
I(IN)  
I(IN)  
I(IN)  
I(IN)  
= 4.5 V,  
= 3 V,  
80  
On-state resistance  
mΩ  
120  
140  
0.001  
4
= 2.7 V,  
Output leakage current  
Output rise time  
µA  
EN = V  
I(IN)  
V
I(IN)  
V
I(IN)  
V
I(IN)  
V
I(IN)  
= 5.5 V,  
= 2.7 V,  
= 5.5 V,  
= 2.7 V,  
C
C
C
C
= 1 µF  
= 1 µF  
= 1 µF  
= 1 µF  
L
L
L
L
ms  
3.8  
3.9  
3.5  
Output fall time  
ms  
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
current limit  
TPS2010Y, TPS2011Y  
TPS2012Y, TPS2013Y  
PARAMETER  
UNIT  
TEST CONDITIONS  
= 5.5 V,  
MIN  
TYP  
MAX  
V
I(IN)  
Short-circuit current  
OUT connected to GND,  
0.4  
A
Device enabled into short circuit  
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
supply current  
TPS2010Y, TPS2011Y  
TPS2012Y, TPS2013Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
0.015  
73  
MAX  
Supply current, low-level output  
Supply current, high-level output  
µA  
µA  
EN = V  
I(IN)  
EN = 0 V  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
6
4
6
4
2
0
2
0
6
4
6
4
2
2
0
0
–1  
–1  
0
1
2
3
4
5
6
7
8
9
0
5
10 15 20 25 30 35 40 45  
t – Time – ms  
t – Time – ms  
Figure 1. Propagation Delay and  
Rise Time With 1-µF Load, V = 5.5 V  
Figure 2. Propagation Delay and  
Fall Time With 1-µF Load, V = 5.5 V  
I(IN)  
I(IN)  
4
4
2
0
2
0
4
2
0
4
2
0
–1  
–1  
0
1
2
3
4
5
6
7
8
9
0
5
10 15 20 25 30 35 40 45  
t – Time – ms  
t – Time – ms  
Figure 3. Propagation Delay and  
Rise Time With 1-µF Load, V = 2.7 V  
Figure 4. Propagation Delay and  
Fall Time With 1-µF Load, V = 2.7 V  
I(IN)  
I(IN)  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
5
0
8
5
0
8
6
6
4
2
4
2
0
0
–1  
–1  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
t – Time – ms  
t – Time – ms  
Figure 6. TPS2011, Short-Circuit Current.  
Figure 5. TPS2010, Short-Circuit Current.  
Short is Applied to Enabled Device, V  
= 5.5 V  
Short is Applied to Enabled Device, V  
= 5.5 V  
I(IN)  
I(IN)  
5
0
8
5
0
8
6
4
2
6
4
2
0
0
–1  
–1  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
t – Time – ms  
t – Time – ms  
Figure 7. TPS2012, Short-Circuit Current.  
Short is Applied to Enabled Device, V = 5.5 V  
Figure 8. TPS2013 – Short-Circuit Current.  
Short is Applied to Enabled Device, V = 5.5 V  
I(IN)  
I(IN)  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
5
0
5
0
4
3
2
1
3
2
1
0
0
–1  
–1  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
t – Time – ms  
t – Time – ms  
Figure 9. TPS2010 – Threshold Current,  
Figure 10. TPS2011 – Threshold Current,  
V
= 5.5 V  
V
= 5.5 V  
I(IN)  
I(IN)  
5
5
0
8
0
4
3
2
6
4
2
1
0
0
–1  
–1  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
t – Time – ms  
t – Time – ms  
Figure 11. TPS2012 – Threshold Current,  
= 5.5 V  
Figure 12. TPS2013 – Threshold Current,  
= 5.5 V  
V
V
I(IN)  
I(IN)  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
3
2.5  
2
TPS2013  
TPS2012  
1.5  
1
TPS2011  
TPS2010  
0.5  
0
–1  
0
1
2
3
4
5
6
7
8
9
10  
t – Time – ms  
Figure 13. Turned-On (Enabled) Into Short Circuit, V  
= 5.5 V  
I(IN)  
V
I
V
I(EN)  
V
IN  
IN  
V
O
OUT  
OUT  
I
50% 50%  
GND  
TPS201x  
GND  
OUT  
OUT  
t
t
PHL  
PLH  
V
I
90% 90%  
ENABLE  
EN  
C
L
10%  
10%  
t
V
O
GND  
t
r
f
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
Figure 14. Test Circuit and Voltage Waveforms  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
TURN-ON DELAY TIME  
vs  
TURN-OFF DELAY TIME  
vs  
INPUT VOLTAGE  
INPUT VOLTAGE  
4.9  
4.7  
4.5  
4.3  
4.1  
3.9  
25  
20  
15  
10  
5
T
R
C
= 25°C  
= 50 Ω  
= 1 µF  
J
L
L
T
R
C
= 25°C  
= 50 Ω  
= 1 µF  
J
L
L
3.7  
3.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
V – Input Voltage – V  
I
V – Input Voltage – V  
I
Figure 15  
Figure 16  
FALL TIME  
vs  
RISE TIME  
vs  
OUTPUT CURRENT  
OUTPUT CURRENT  
4
3.8  
3.6  
3.4  
3.2  
3
5
4.5  
4
T
C
= 25°C  
= 1 µF  
T
C
= 25°C  
= 1 µF  
J
L
J
L
V = 5.5 V  
I
3.5  
3
V = 5.5 V  
I
2.8  
2.6  
V = 2.7 V  
I
V = 2.7 V  
I
2.4  
2.2  
2
2.5  
2
0
0.3  
0.6  
0.9  
1.2  
1.5  
0
0.3  
0.6  
0.9  
1.2  
1.5  
I
O
– Output Current – A  
I
O
– Output Current – A  
Figure 17  
Figure 18  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
SUPPLY CURRENT (OUTPUT DISABLED)  
SUPPLY CURRENT (OUTPUT ENABLED)  
vs  
vs  
JUNCTION TEMPERATURE  
JUNCTION TEMPERATURE  
10  
1
80  
70  
60  
50  
40  
30  
20  
I
O
= 0 A  
V = 5.5 V  
I
0.1  
V = 5.5 V  
I
0.01  
V = 2.7 V  
I
V = 2.7 V  
I
0.001  
50 25  
0
25  
50  
75  
100  
125  
50 25  
0
25  
50  
75  
100  
125  
T
J
– Junction Temperature – °C  
T
J
– Junction Temperature – °C  
Figure 19  
Figure 20  
SUPPLY CURRENT (OUTPUT DISABLED)  
SUPPLY CURRENT (OUTPUT ENABLED)  
vs  
vs  
INPUT VOLTAGE  
INPUT VOLTAGE  
10  
1
80  
70  
60  
I
O
= 0 A  
T
J
= 125°C  
0.1  
T
J
= 125°C  
50  
40  
30  
T
J
= 25°C  
0.01  
T
J
= 25°C  
0.001  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
V – Input Voltage – V  
I
V – Input Voltage – V  
I
Figure 21  
Figure 22  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
ON-STATE RESISTANCE  
vs  
JUNCTION TEMPERATURE  
ON-STATE RESISTANCE  
vs  
INPUT VOLTAGE  
190  
170  
150  
130  
110  
90  
140  
130  
120  
110  
100  
90  
T
J
= 25°C  
V = 2.7 V  
I
V = 3 V  
I
80  
V = 4.5 V  
I
70  
50  
70  
60  
V = 5.5 V  
I
50 25  
0
25  
50  
75  
100  
125  
2.5  
3
3.5  
4
4.5  
5
5.5  
T
J
– Junction Temperature – °C  
V – Input Voltage – V  
I
Figure 24  
Figure 23  
SHORT-CIRCUIT CURRENT  
INPUT VOLTAGE TO OUTPUT VOLTAGE  
vs  
vs  
INPUT VOLTAGE  
INPUT VOLTAGE  
3
0.25  
0.2  
TPS2013  
2.5  
2
TPS2012  
TPS2011  
0.15  
0.1  
I
= 1.5 A  
O
1.5  
I
= 1 A  
O
1
I
= 600 mA  
= 200 mA  
O
0.05  
0
0.5  
0
I
O
TPS2010  
2.5  
3
3.5  
4
4.5  
5
5.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
V – Input Voltage – V  
I
V – Input Voltage – V  
I
Figure 25  
Figure 26  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
TYPICAL CHARACTERISTICS  
THRESHOLD TRIP CURRENT  
SHORT-CIRCUIT CURRENT  
vs  
JUNCTION TEMPERATURE  
vs  
INPUT VOLTAGE  
5.5  
5
3
V
I(IN)  
= 5.5 V  
TPS2013  
TPS2012  
TPS2013  
2.5  
2
4.5  
TPS2012  
4
3.5  
1.5  
TPS2011  
TPS2011  
3
1
0.5  
0
2.5  
TPS2010  
TPS2010  
50  
2
1.5  
2.5  
3
3.5  
4
4.5  
5
5.5  
50  
25  
0
25  
75  
100  
125  
V – Input Voltage – V  
I
T
J
– Junction Temperature – °C  
Figure 27  
Figure 28  
APPLICATION INFORMATION  
TPS2010D  
External Load  
2
3
5
6
Power Supply  
2.7 V – 5.5 V  
IN  
IN  
OUT  
OUT  
OUT  
OUT  
+
0.1 µF  
7
8
1 µF  
0.1 µF  
4
EN  
Load Enable  
GND  
1
Figure 29. Typical Application  
power supply considerations  
The TPS201x family has multiple inputs and outputs, which must be connected in parallel to minimize voltage  
drop and prevent unnecessary power dissipation.  
A 0.047-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.  
A high-value electrolytic capacitor is also desirable when the output load is heavy or has large paralleled  
capacitors. Bypassing the output with a 0.1-µF ceramic capacitor improves the immunity of the device to  
electrostatic discharge (ESD).  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
APPLICATION INFORMATION  
overcurrent  
A sense FET is employed to check for overcurrent conditions. Unlike sense resistors and polyfuses, sense FETs  
do not increase series resistance to the current path. When an overcurrent condition is detected, the device  
maintains a constant output current and reduces the output voltage accordingly. Shutdown only occurs if the  
fault is present long enough to activate thermal limiting.  
Three possible overload conditions can occur. In the first condition, the output has been shorted before the  
device is enabled or before V  
immediately switches into a constant-current output.  
has been applied (see Figure 30). The TPS201x senses the short and  
I(IN)  
Under the second condition, the short occurs while the device is enabled. At the instant the short occurs, very  
high currents flow for a short time before the current-limit circuit can react (see Figures 5, 6, 7, and 8). After the  
current-limit circuit has tripped, the device limits normally.  
Under the third condition, the load has been gradually increased beyond the recommended operating current.  
The current is permitted to rise until the current-limit threshold is reached (see Figures 9, 10, 11, and 12). The  
TPS201x family is capable of delivering currents up to the current-limit threshold without damage. Once the  
threshold has been reached, the device switches into its constant-current mode.  
3
2.5  
2
TPS2013  
TPS2012  
1.5  
TPS2011  
TPS2010  
1
0.5  
0
0
1
2
3
4
5
6
7
8
9
10  
t – Time – ms  
Figure 30. Turned-On (Enabled) Into Short Circuit, V  
= 5.5 V  
I(IN)  
15  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS2010, TPS2011, TPS2012, TPS2013  
POWER-DISTRIBUTION  
SLVS097A – DECEMBER 1994 – REVISED AUGUST 1995  
APPLICATION INFORMATION  
power dissipation and junction temperature  
The low on resistance of the N-channel MOSFET allows small surface-mount packages, such as SOIC or  
TSSOP to pass large currents. The thermal resistances of these packages are high compared to that of power  
packages; it is good design practice to check power dissipation and junction temperature. The first step is to  
find r at the input voltage and operating temperature. As an initial estimate, use the highest operating ambient  
on  
temperature of interest and read r from Figure 23. Next calculate the power dissipation using:  
on  
2
P
r
I
on  
D
Finally, calculate the junction temperature:  
T
P
R
T
J
D
JA  
A
Where:  
T = Ambient temperature  
A
R
= Thermal resistance SOIC = 172°C/W, TSSOP = 179°C/W  
θJA  
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,  
repeat the calculation using the calculated value as the new estimate. Two or three iterations are generally  
sufficient to get a reasonable answer.  
thermal protection  
Thermal protection is provided to prevent damage to the IC when heavy-overload or short-circuit faults are  
present for extended periods of time. The faults force the TPS201x into its constant current mode, which causes  
the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch  
is equal to the input voltage. The increased dissipation causes the junction temperature to rise to dangerously  
high levels. The protection circuit senses the junction temperature of the switch and shuts it off. The switch  
remains off until the junction has dropped approximately 20°C. The switch continues to cycle in this manner until  
the load fault or input power is removed.  
ESD protection  
All TPS201x terminals incorporate ESD-protection circuitry designed to withstand a 6-kV human-body-model  
discharge as defined in MIL-STD-883C. Additionally, the output is protected from discharges up to 12 kV.  
16  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Aug-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
TPS2010D  
TPS2010DG4  
TPS2010DR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
SOIC  
D
D
D
D
8
8
8
8
75  
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Purchase Samples  
Purchase Samples  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
TPS2010DRG4  
Green (RoHS  
& no Sb/Br)  
TPS2010PWLE  
TPS2010PWR  
OBSOLETE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
14  
14  
TBD  
Call TI  
Call TI  
Replaced by TPS2010PWR  
Purchase Samples  
2000  
2000  
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
TPS2010PWRG4  
TPS2011D  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
SOIC  
SOIC  
SOIC  
SOIC  
PW  
D
14  
8
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
TPS2011DG4  
TPS2011DR  
D
8
75  
Green (RoHS  
& no Sb/Br)  
D
8
2500  
2500  
Green (RoHS  
& no Sb/Br)  
TPS2011DRG4  
D
8
Green (RoHS  
& no Sb/Br)  
TPS2011PWLE  
TPS2012D  
OBSOLETE  
ACTIVE  
TSSOP  
SOIC  
PW  
D
14  
8
TBD  
Call TI  
Call TI  
75  
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
TPS2012DG4  
TPS2012DR  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
D
D
D
8
8
8
Green (RoHS  
& no Sb/Br)  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
TPS2012DRG4  
Green (RoHS  
& no Sb/Br)  
TPS2012PWLE  
TPS2013D  
OBSOLETE  
ACTIVE  
TSSOP  
SOIC  
PW  
D
14  
8
TBD  
Call TI  
Call TI  
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Aug-2010  
Status (1)  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
TPS2013DG4  
TPS2013DR  
SOIC  
SOIC  
D
D
8
8
75  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
ACTIVE  
2500  
2500  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Purchase Samples  
TPS2013DRG4  
TPS2013PWLE  
ACTIVE  
SOIC  
D
8
Green (RoHS  
& no Sb/Br)  
OBSOLETE  
TSSOP  
PW  
14  
TBD  
Call TI  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TPS2010DR  
TPS2010PWR  
TPS2011DR  
TPS2012DR  
TPS2013DR  
SOIC  
TSSOP  
SOIC  
D
PW  
D
8
14  
8
2500  
2000  
2500  
2500  
2500  
330.0  
330.0  
330.0  
330.0  
330.0  
12.4  
12.4  
12.4  
12.4  
12.4  
6.4  
6.9  
6.4  
6.4  
6.4  
5.2  
5.6  
5.2  
5.2  
5.2  
2.1  
1.6  
2.1  
2.1  
2.1  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
SOIC  
D
8
SOIC  
D
8
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS2010DR  
TPS2010PWR  
TPS2011DR  
TPS2012DR  
TPS2013DR  
SOIC  
TSSOP  
SOIC  
D
PW  
D
8
14  
8
2500  
2000  
2500  
2500  
2500  
340.5  
367.0  
340.5  
340.5  
340.5  
338.1  
367.0  
338.1  
338.1  
338.1  
20.6  
35.0  
20.6  
20.6  
20.6  
SOIC  
D
8
SOIC  
D
8
Pack Materials-Page 2  
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