TPA4860DR [TI]
1-W MONO AUDIO POWER AMPLIFIER; 1 -W单声道音频功率放大器
| 型号： | TPA4860DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-W MONO AUDIO POWER AMPLIFIER |
| 文件： | 总24页 (文件大小：443K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
1-W MONO AUDIO POWER AMPLIFIER
FEATURES
D PACKAGE
(TOP VIEW)
•
•
•
•
•
•
•
•
•
•
1-W BTL Output (5 V, 0.2 % THD+N)
3.3-V and 5-V Operation
GND
SHUTDOWN
HP-SENSE
GND
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
No Output Coupling Capacitors Required
Shutdown Control (IDD = 0.6 µA)
Headphone Interface Logic
V 2
O
IN+
IN–
Uncompensated Gains of 2 to 20 (BTL Mode)
Surface-Mount Packaging
BYPASS
HP-IN1
V
DD
GAIN
HP-IN2
GND
V 1
Thermal and Short-Circuit Protection
High Power Supply Rejection(56-dB at 1 kHz)
LM4860 Drop-In Compatible
O
GND
DESCRIPTION
The TPA4860 is a bridge-tied load (BTL) audio power amplifier capable of delivering 1 W of continuous average
power into an 8-Ω load at 0.4 % THD+N from a 5-V power supply in voiceband frequencies (f < 5 kHz). A BTL
configuration eliminates the need for external coupling capacitors on the output in most applications. Gain is
externally configured by means of two resistors and does not require compensation for settings of 2 to 20.
Features of this amplifier are a shutdown function for power-sensitive applications as well as headphone
interface logic that mutes the output when the speaker drive is not required. Internal thermal and short-circuit
protection increases device reliability. It also includes headphone interface logic circuitry to facilitate headphone
applications. The amplifier is available in a 16-pin SOIC surface-mount package that reduces board space and
facilitates automated assembly.
TYPICAL APPLICATION CIRCUIT
V
12
10
DD
V
DD
V /2
DD
C
S
R
F
Audio
Input
11 GAIN
IN–
R
I
13
V 1
O
C
I
14 IN+
1 W
C
B
V 2
O
15
V
DD
BYPASS
5
R
PU
NC
HP-IN1
6
7
3
2
1, 4, 8, 9, 16
HP-IN2
Bias
Control
HP-SENSE
SHUTDOWN
Headphone
Plug
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1996–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
SMALL OUTLINE (D)
–40°C to 85°C
TPA4860D
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
VDD
VI
Supply voltage
6 V
–0.3 V to VDD +0.3 V
Internally Limited (See Dissipation Rating Table)
–40°C to 85°C
Input voltage
Continuous total power dissipation
Operating free-air temperature range
Storage temperature range
TA
Tstg
–65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
T
A ≤ 25°C
DERATING FACTOR
TA = 70°C
TA = 85°C
D
1250 mW
10 mW/°C
800 mW
650 mW
RECOMMENDED OPERATING CONDITIONS
MIN
MAX UNIT
VDD
VIC
TA
Supply voltage
2.7
1.25
1.25
–40
5.5
2.7
4.5
85
V
V
VDD = 3.3 V
VDD = 5 V
Common-mode input voltage
Operating free-air temperature
V
°C
2
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
ELECTRICAL CHARACTERISTICS
at specified free-air temperature range, VDD = 3.3 V (unless otherwise noted)
TPA4860
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
5
MAX
(1)
VOO
Output offset voltage (measured differentially)
Supply ripple rejection ratio
See
20
mV
dB
mA
µA
µA
V
VDD = 3.2 V to 3.4 V
75
IDD
Quiescent current
2.5
750
0.6
1.7
1.7
2.8
0.2
IDD(M)
Quiescent current, mute mode
IDD(SD) Quiescent current, shutdown mode
VIH
VIL
High-level input voltage (HP-IN)
Low-level input voltage (HP-IN)
V
VOH
VOL
High-level output voltage (HP-SENSE)
Low-level output voltage (HP-SENSE)
IO = 100 µA
IO = -100 µA
2.5
V
0.8
V
(1) At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2.
OPERATING CHARACTERISTICS
VDD = 3.3 V, TA = 25°C, RL = 8 Ω
TPA4860
TYP
350
500
20
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
THD = 0.2%, f = 1 kHz,
AV = 2
mW
mW
kHz
MHz
dB
(1)
PO
Output power
THD = 2%, f = 1 kHz,
Gain = 10,
Open loop
AV = 2
BOM
B1
Maximum output power bandwidth
Unity-gain bandwidth
THD = 2%
1.5
BTL
Supply ripple rejection ratio
SE
f = 1 kHz
56
f = 1 kHz
30
dB
Vn
Noise output voltage(2)
Gain = 2
20
µV
(1) Output power is measured at the output terminals of the device.
(2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.
3
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
ELECTRICAL CHARACTERISTICS
at specified free-air temperature range, VDD = 5 V (unless otherwise noted)
TPA4860
MIN TYP MAX
PARAMETER
Output offset voltage
TEST CONDITIONS
UNIT
mV
(1)
VOO
See
5
70
20
Supply ripple rejection ratio
Supply current
VDD = 4.9 V to 5.1 V
dB
mA
µA
µA
V
IDD
3.5
750
0.6
2.5
2.5
2.8
0.2
IDD(M) Supply current, mute
IDD(SD) Supply current, shutdown
VIH
VIL
High-level input voltage (HP-IN)
Low-level input voltage (HP-IN)
V
VOH
VOL
High-level output voltage (HP-SENSE)
Low-level output voltage (HP-SENSE)
IO = 500 µA
IO = -500 µA
2.5
V
0.8
V
(1) At 3 V < VDD < 5 V the dc output voltage is approximately VDD/2.
OPERATING CHARACTERISTICS
VDD = 5 V, TA = 25°C, RL= 8 Ω
TPA4860
TYP
1000
1100
20
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
THD = 0.2%, f = 1 kHz,
AV = 2
mW
mW
kHz
MHz
dB
(1)
PO
Output power
THD = 2%, f = 1 kHz,
Gain = 10,
Open loop
AV = 2
BOM Maximum output power bandwidth
THD = 2%
B1
Vn
Unity-gain bandwidth
1.5
BTL
SE
f = 1 kHz
56
Supply ripple rejection ratio
f = 1 kHz
30
dB
(2)
Noise output voltage
Gain = 2
20
µV
(1) Output power is measured at the output terminals of the device.
(2) Noise voltage is measured in a bandwidth of 20 Hz to 20 kHz.
4
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VOO
IDD
Output offset voltage
Distribution
1,2
Supply current distribution
vs Free-air temperature
vs Frequency
3,4
5, 6, 7, 8, 9, 10,11,15, 16,17,18
THD+N
Total harmonic distortion plus noise
vs Output power
vs Supply voltage
vs Frequency
12, 13, 14, 19,20,21
IDD
Vn
Supply current
22
23, 24
25
Output noise voltage
Maximum package power dissipation
Power dissipation
vs Free-air temperature
vs Output power
vs Free-air temperature
vs Load resistance
vs Supply voltage
vs Frequency
26, 27
28
Maximum output power
29
Output power
30
Open-loop frequency response
Supply ripple rejection ratio
31
vs Frequency
32, 33
DISTRIBUTION OF TPA4860
OUTPUT OFFSET VOLTAGE
DISTRIBUTION OF TPA4860
OUTPUT OFFSET VOLTAGE
25
20
15
10
5
25
20
15
10
5
V
CC
= 5 V
V
CC
= 3.3 V
0
0
−3 −2 −1
0
1
2
3
4
5
6
7
−3 −2 −1
0
1
2
3
4
5
6
7
V
OO
− Output Offset Voltage − mV
V
OO
− Output Offset Voltage − mV
Figure 1.
Figure 2.
5
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
SUPPLY CURRENT DISTRIBUTION
vs
SUPPLY CURRENT DISTRIBUTION
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
4.5
3.5
V
CC
= 5 V
V
CC
= 3.3 V
4
3.5
3
3
2.5
2
2.5
Typical
2
Typical
1.5
1.5
1
0.5
0
1
0.5
0
−20
25
85
−20
25
85
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 3.
Figure 4.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
P
= 5 V
= 1 W
= −10 V/V
= 8 Ω
DD
V
P
= 5 V
= 1 W
= −2 V/V
= 8 Ω
DD
O
O
A
V
A
V
R
L
R
L
1
1
C
B
= 0.1 µF
C
B
= 0.1 µF
C
B
= 1 µF
0.1
0.1
C
B
= 1 µF
0.01
0.01
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 5.
Figure 6.
6
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
= 5 V
= 1 W
= −20 V/V
= 8 Ω
V
P
= 5 V
DD
DD
P
O
= 0.5 W
= −2 V/V
= 8 Ω
O
A
A
V
V
C
B
= 0.1 µF
R
R
L
L
1
1
C
B
= 1 µF
C
B
= 0.1 µF
0.1
0.1
C
B
= 1 µF
0.01
0.01
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 7.
Figure 8.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
P
= 5 V
V
P
= 5 V
DD
DD
= 0.5 W
= −10 V/V
= 8 Ω
= 0.5 W
= −20 V/V
= 8 Ω
O
O
A
A
V
V
R
R
C
B
= 0.1 µF
L
L
C
B
= 0.1 µF
1
1
C
B
= 1 µF
0.1
0.1
C
B
= 1 µF
0.01
0.01
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 9.
Figure 10.
7
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
OUTPUT POWER
10
10
V
= 5 V
= −2 V/V
= 8 Ω
DD
V
= 5 V
= −10 V/V
DD
A
V
A
V
R
L
Single Ended
f = 20 Hz
1
1
R
P
= 8 Ω
= 250 mW
L
C
B
= 0.1 µF
O
C
B
= 1 µF
R
P
= 32 Ω
= 60 mW
L
0.1
0.1
O
0.01
0.01
0.02
0.1
1
2
20
100
1 k
10 k 20 k
P
O
− Output Power − W
f − Frequency − Hz
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
10
10
V
= 5 V
= −2 V/V
= 8 Ω
V
A
V
= 5 V
= −2 V/V
R = 8 Ω
L
DD
DD
A
V
R
L
f = 1 kHz
f = 20 kHz
C
B
= 0.1 µF
1
1
C
B
= 0.1 µF
0.1
0.1
0.01
0.01
0.02
0.1
1
2
0.02
0.1
1
2
P
O
− Output Power − W
P
O
− Output Power − W
Figure 13.
Figure 14.
8
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
P
R
= 3.3 V
= 350 mW
= 8 Ω
V
= 3.3 V
DD
= 350 mW
= 8 Ω
L
DD
P
O
O
R
L
A
V
= −2 V/V
A
V
= −10 V/V
1
1
C
B
= 0.1 µF
C = 0.1 µF
B
0.1
0.1
C
B
= 1 µF
C
B
= 1 µF
0.01
0.01
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 15.
Figure 16.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
P
R
= 3.3 V
= 350 mW
= 8 Ω
V
= 3.3 V
= −10 V/V
DD
DD
A
O
V
Single Ended
L
A
V
= −20 V/V
C
B
= 0.1 µF
1
1
R
L
= 8 Ω
P
O
= 250 mW
C
B
= 1 µF
R
= 32 Ω
= 60 mW
0.1
L
0.1
P
O
0.01
0.01
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 17.
Figure 18.
9
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
10
10
V
= 3.3 V
= −2 V/V
= 8 Ω
V
= 3.3 V
= −2 V/V
= 8 Ω
DD
DD
A
A
V
V
R
R
L
L
f = 20 Hz
f = 1 kHz
1
1
C
B
= 0.1 µF
C
B
= 0.1 µF
0.1
0.1
C
B
= 1.0 µF
0.01
0.01
0.02
0.1
1
2
0.02
0.1
1
2
P
O
− Output Power − W
P
O
− Output Power − W
Figure 19.
Figure 20.
TOTAL HARMONIC DISTORTION + NOISE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
vs
OUTPUT POWER
10
5
T
A
= 0°C
T
A
= −20°C
4
3
2
1
0
C
B
= 0.1 µF
1
T
A
= 25°C
T
A
= 85°C
0.1
V
= 3.3 V
= −2 V/V
= 8 Ω
DD
A
V
R
L
f = 20 kHz
0.01
20 m
0.1
1
2
2.5
3
3.5
4
4.5
5
5.5
P
O
− Output Power − W
V
DD
− Supply Voltage − V
Figure 21.
Figure 22.
10
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
OUTPUT NOISE VOLTAGE
OUTPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
3
3
10
10
V
CC
= 5 V
V
CC
= 3.3 V
2
2
10
10
V 1 +V 2
0
0
V 1 +V 2
V 2
0
V 2
0
0
0
1
1
10
10
V 1
0
V 1
0
1
1
20
100
1 k
10 k 20 k
20
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 23.
Figure 24.
MAXIMUM PACKAGE POWER DISSIPATION
POWER DISSIPATION
vs
OUTPUT POWER
vs
FREE-AIR TEMPERATURE
1.5
1.5
V
DD
= 5 V
1.25
R
L
= 4 Ω
1
1
0.75
R
L
= 8 Ω
0.5
0.5
0.25
0
R
L
= 16 Ω
0
0
0.25
0.5
0.75
1
1.25
1.5
1.75
−25
0
25
50
75 100 125 150 175
P
O
− Output Power − W
T
A
− Free-Air Temperature − °C
Figure 25.
Figure 26.
11
TPA4860
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
POWER DISSIPATION
vs
OUTPUT POWER
MAXIMUM OUTPUT POWER
vs
FREE-AIR TEMPERATURE
1
160
140
120
100
V
DD
= 3.3 V
R
L
= 16 Ω
0.75
0.5
R
= 4 Ω
= 8 Ω
L
80
60
40
R
L
= 8 Ω
R
L
0.25
0
R
L
= 4 Ω
20
0
R
L
= 16 Ω
0
0.25
0.5
0.75
1
1.25
1.50
0
0.25
0.5
0.75
P
O
− Maximum Output Power − W
P
O
− Output Power − W
Figure 27.
Figure 28.
OUTPUT POWER
vs
LOAD RESISTANCE
OUTPUT POWER
vs
SUPPLY VOLTAGE
1.4
2
A
= −2 V/V
V
A
= −2 V/V
V
f = 1 kHz
= 0.1 µF
f = 1 kHz
= 0.1 µF
1.75
C
B
1.2
1
C
B
THD+n ≤ 1%
THD+n ≤ 1%
1.5
1.25
1
R
L
= 4 Ω
0.8
0.6
R
L
= 8 Ω
0.75
V
CC
= 5 V
0.4
0.2
0
0.5
0.25
0
R
L
= 16 Ω
V
= 3.3 V
CC
2.5
3
3.5
4
4.5
5
5.5
4
8
12 16 20 24 28 32 36 40 44 48
Supply Voltage − V
Load Resistance − Ω
Figure 29.
Figure 30.
12
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
SUPPLY RIPPLE REJECTION RATIO
vs
OPEN-LOOP FREQUENCY RESPONSE
FREQUENCY
0
100
45°
0°
V
R
C
= 5 V
= 8 Ω
= 0.1 µF
V
R
= 5 V
= 8 Ω
DD
DD
−10
−20
−30
−40
−50
L
L
80
Bridge-Tied
Load
B
60
40
−45°
−90°
Phase
C
= 0.1 µF
= 1 µF
B
−60
−70
−80
Gain
20
0
−135°
−180°
−225°
C
B
−90
−20
−100
10
100
1 k
10 k
100 k
1 M
10 M
100
1 k
10 k 20 k
f − Frequency − Hz
f − Frequency − Hz
Figure 31.
Figure 32.
SUPPLY RIPPLE REJECTION RATIO
vs
FREQUENCY
0
V
DD
= 5 V
R
= 8 Ω
−10
−20
−30
−40
−50
L
Single Ended
C
B
= 0.1 µF
C
B
= 1 µF
−60
−70
−80
−90
−100
100
1 k
10 k 20 k
f − Frequency − Hz
Figure 33.
13
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SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
APPLICATION INFORMATION
BRIDGED-TIED LOAD VERSUS SINGLE-ENDED MODE
Figure 34 shows a linear audio power amplifier (APA) in a bridge-tied load (BTL) configuration. A BTL amplifier
actually consists of two linear amplifiers driving both ends of the load. There are several potential benefits to this
differential drive configuration but initially let us consider power to the load. The differential drive to the speaker
means that as one side is slewing up the other side is slewing down and vice versa. This, in effect, doubles the
voltage swing on the load as compared to a ground-referenced load. Plugging twice the voltage into the power
equation, where voltage is squared, yields 4 times the output power from the same supply rail and load
impedance (see Equation 1).
V
O(PP)
V
+
(RMS)
Ǹ
2
2
2
V
(RMS)
Power +
R
L
(1)
V
DD
V
O(PP)
2x V
O(PP)
R
L
V
DD
–V
O(PP)
Figure 34. Bridge-Tied Load Configuration
In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a
singled-ended (SE) limit of 250 mW to 1 W. In sound power, that is a 6-dB improvement which is loudness that
can be heard. In addition to increased power there are frequency response concerns; consider the single-supply
SE configuration shown in Figure 35. A coupling capacitor is required to block the dc offset voltage from reaching
the load. These capacitors can be quite large (approximately 40 µF to 1000 µF); so, they tend to be expensive,
occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the
system. This frequency-limiting effect is due to the high-pass filter network created with the speaker impedance
and the coupling capacitance and is calculated with Equation 2.
1
f
+
c
2pR C
L
C
(2)
For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL
configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency
performance is then limited only by the input network and speaker response. Cost and PCB space are also
minimized by eliminating the bulky coupling capacitor.
14
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
APPLICATION INFORMATION (continued)
V
DD
V
O(PP)
C
C
V
O(PP)
R
L
Figure 35. Single-Ended Configuration
Increasing power to the load does carry a penalty of increased internal power dissipation. The increased
dissipation is understandable considering that the BTL configuration produces 4 times the output power of the SE
configuration. Internal dissipation versus output power is discussed further in the thermal considerations section.
BTL AMPLIFIER EFFICIENCY
Linear amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the
output stage transistors. The internal voltage drop has two components. One is the headroom or dc voltage drop
that varies inversely to output power. The second component is due to the sine-wave nature of the output. The
total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal
voltage drop multiplied by the RMS value of the supply current, IDD(RMS), determines the internal power
dissipation of the amplifier.
An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power
supply to the power delivered to the load. To accurately calculate the RMS values of power in the load and in the
amplifier, the current and voltage waveform shapes must first be understood (see Figure 36).
I
DD
V
O
I
DD(RMS)
V
L(RMS)
Figure 36. Voltage and Current Waveforms for BTL Amplifiers
Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are
different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified
shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different.
Keep in mind that for most of the waveform both the push and pull transistor are not on at the same time, which
supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform.
The following equations are the basis for calculating amplifier efficiency.
15
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
APPLICATION INFORMATION (continued)
P
L
Efficiency +
P
SUP
Where:
V
P
V
+
+
L(RMS)
Ǹ
2
2
2
V
V
L(RMS)
p
P
L
+
R
L
2R
L
V
2V
DD
p R
P
P
+ V
I
+
SUP
DD DD(RMS)
L
2V
P
I
+
DD(RMS)
p R
L
(3)
(4)
1ń2
P R
L
L
ǒ Ǔ
p
2
p V
P
Efficiency of a BTL configuration +
+
2V
2V
DD
DD
Table 1 employs Equation 4 to calculate efficiencies for four different output power levels. Note that the efficiency
of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased, resulting in
a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full
output power is less than in the half power range. Calculating the efficiency for a specific system is the key to
proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum draw
on the power supply is almost 3.25 W.
Table 1. Efficiency vs Output Power in 5-V 8-Ω BTL Systems
PEAK-TO-PEAK
VOLTAGE
(V)
INTERNAL
DISSIPATION
(W)
OUTPUT POWER
(W)
EFFICIENCY
(%)
0.25
0.50
1.00
1.25
31.4
44.4
62.8
70.2
2.00
2.83
0.55
0.62
0.59
0.53
4.00
4.47(1)
(1) High peak voltages cause the THD to increase.
A final point to remember about linear amplifiers whether they are SE or BTL configured is how to manipulate the
terms in the efficiency equation to utmost advantage when possible. Note that in Equation 4, VDD is in the
denominator. This indicates that as VDD goes down, efficiency goes up.
For example, if the 5-V supply is replaced with a 10-V supply (TPA4860 has a maximum recommended VDD of
5.5 V) in the calculations of Table 1, then efficiency at 1 W would fall to 31% and internal power dissipation
would rise to 2.18 W from 0.59 W at 5 V. Then, for a stereo 1-W system from a 10-V supply, the maximum draw
would be almost 6.5 W. Choose the correct supply voltage and speaker impedance for the application.
16
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
SELECTION OF COMPONENTS
Figure 37 is a schematic diagram of a typical notebook computer application circuit.
50 kΩ
50 kΩ
V
12
10
C
DD
F
V
DD
= 5 V
C
S
V
/2
DD
R
F
Audio
Input
11 GAIN
IN−
R
I
13
V 1
O
C
I
46 kΩ
46 kΩ
1-W
Internal
Speaker
14 IN+
C
B
V 2
O
15
BYPASS
5
V
DD
R
PU
NC
HP-IN1
HP-IN2
6
7
3
2
1, 4, 8, 9, 16
Bias
Control
HP-SENSE
SHUTDOWN
Headphone
Plug
Figure 37. TPA4860 Typical Notebook Computer Application Circuit
Gain Setting Resistors, RF and RI
The gain for the TPA4860 is set by resistors RF and RI according to Equation 5.
R
F
Gain + * 2ǒ Ǔ
R
I
(5)
BTL mode operation brings about the factor of 2 in the gain equation due to the inverting amplifier mirroring the
voltage swing across the load. Given that the TPA4860 is a MOS amplifier, the input impedance is high;
consequently, input leakage currents are not generally a concern although noise in the circuit increases as the
value of RF increases. In addition, a certain range of RF values is required for proper start-up operation of the
amplifier. Taken together, it is recommended that the effective impedance seen by the inverting node of the
amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated in Equation 6.
R R
F
I
Effective Impedance +
R ) R
F
I
(6)
As an example, consider an input resistance of 10 kΩ and a feedback resistor of 50 kΩ. The gain of the amplifier
would be –10 and the effective impedance at the inverting terminal would be 8.3 kΩ, which is well within the
recommended range.
For high-performance applications metal film resistors are recommended because they tend to have lower noise
levels than carbon resistors. For values of RF above 50 kΩ, the amplifier tends to become unstable due to a pole
formed from RF and the inherent input capacitance of the MOS input structure. For this reason, a small
compensation capacitor of approximately 5 pF should be placed in parallel with RF. In effect, this creates a
low-pass filter network with the cutoff frequency defined in Equation 7.
17
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
1
f
+
c(lowpass)
2pR C
F
F
(7)
For example, if RF is 100 kΩ and CF is 5 pF, then fc is 318 kHz, which is well outside of the audio range.
Input Capacitor, CI
In the typical application, an input capacitor, CI is required to allow the amplifier to bias the input signal to the
proper dc level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
determined in Equation 8.
1
f
+
c(highpass)
2pR C
I
I
(8)
The value of CI is important to consider as it directly affects the bass (low-frequency) performance of the circuit.
Consider the example where RI is 10 kΩ and the specification calls for a flat bass response down to 40 Hz.
Equation 8 is reconfigured as Equation 9.
1
C +
I
2pR f
c
I
(9)
In this example, CI is 0.40 µF; so, one would likely choose a value in the range of 0.47 µF to 1 µF. A further
consideration for this capacitor is the leakage path from the input source through the input network (RI, CI) and
the feedback resistor (RF) to the load. This leakage current creates a dc-offset voltage at the input to the
amplifier that reduces useful headroom, especially in high-gain applications. For this reason a low-leakage
tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the
capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely
higher that the source dc level. Note that it is important to confirm the capacitor polarity in the application.
POWER SUPPLY DECOUPLING CS
The TPA4860 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents
oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by
using two capacitors of different types that target different types of noise on the power supply leads. For higher
frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic
capacitor, typically 0.1 µF placed as close as possible to the device VDD lead, works best. For filtering
lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power
amplifier is recommended.
MIDRAIL BYPASS CAPACITOR, CB
The midrail bypass capacitor, CB, serves several important functions. During start-up or recovery from shutdown
mode, CB determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the
subaudible range (so low it cannot be heard). The second function is to reduce noise produced by the power
supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to
the amplifier. The capacitor is fed from a 25-kΩ source inside the amplifier. To keep the start-up pop as low as
possible, the relationship shown in Equation 10 should be maintained.
1
1
ǒC 25 kΩǓ v ǒC RIǓ
B
I
(10)
As an example, consider a circuit where CB is 0.1 µF, CI is 0.22 µF and RI is 10 kΩ. Inserting these values into
the Equation 9, we get: 400 ≤ 454 which satisfies the rule. Recommended value for bypass capacitor CB is
0.1-µF to 1-µF ceramic or tantalum low-ESR for the best THD and noise performance.
18
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
SINGLE-ENDED OPERATION
Figure 38 is a schematic diagram of the recommended SE configuration. In SE mode configurations, the load
should be driven from the primary amplifier output (VO1, terminal 10).
V
DD
12
V
DD
= 5 V
C
S
V /2
DD
R
F
Audio
Input
11 GAIN
IN−
R
I
C
C
13
V 1
O
10
15
250-mW
External
Speaker
C
I
14 IN+
C
B
R
SE
= 50 Ω
V 2
O
BYPASS
5
C
SE
= 0.1 µF
Figure 38. Singled-Ended Mode
Gain is set by the RF and RI resistors and is shown in Equation 11. Because the inverting amplifier is not used to
mirror the voltage swing on the load, the factor of 2 is not included.
R
F
Gain + * ǒ Ǔ
R
I
(11)
The phase margin of the inverting amplifier into an open circuit is not adequate to ensure stability, so a
termination load should be connected to VO2. This consists of a 50-Ω resistor in series with a 0.1-µF capacitor to
ground. It is important to avoid oscillation of the inverting output to minimize noise and power dissipation.
The output coupling capacitor required in single-supply SE mode also places additional constraints on the
selection of other components in the amplifier circuit. The rules described earlier still hold with the addition of the
following relationship:
1
1
1
ǒC 25 kΩǓ v ǒC R Ǔ Ơ
R C
L
C
B
I I
(12)
OUTPUT COUPLING CAPACITOR, CC
In the typical single-supply SE configuration, an output coupling capacitor (CC) is required to block the dc bias at
the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the
output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 13.
1
f
+
c high
2pR C
L
C
(13)
The main disadvantage, from a performance standpoint, is that the load impedances are typically small, which
drives the low-frequency corner higher. Large values of CC are required to pass low frequencies into the load.
Consider the example where a CC of 68 µF is chosen and loads vary from 8 Ω, 32 Ω, to 47 kΩ. Table 2
summarizes the frequency response characteristics of each configuration.
19
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
Table 2. Common Load Impedances vs Low Frequency
Output Characteristics in SE Mode
RL
8 Ω
CC
LOWEST FREQUENCY
68 µF
68 µF
68 µF
293 Hz
73 Hz
32 Ω
47,000 Ω
0.05 Hz
As Table 2 indicates, most of the bass response is attenuated into 8-Ω loads while headphone response is
adequate and drive into line level inputs (a home stereo for example) is good.
HEADPHONE SENSE CIRCUITRY, Rpu
The TPA4860 is commonly used in systems where there is an internal speaker and a jack for driving external
loads (i.e., headphones). In these applications, it is usually desirable to mute the internal speaker(s) when the
external load is in use. The headphone inputs (HP-1, HP-2) and headphone output (HP-SENSE) of the TPA4860
were specifically designed for this purpose. Many standard headphone jacks are available with an internal
single-pole single-throw (SPST) switch that makes or breaks a circuit when the headphone plug is inserted.
Asserting either or both HP-1 and/or HP-2 high mutes the output stage of the amplifier and causes HP-SENSE to
go high. In battery-powered applications where power conservation is critical, HP-SENSE can be connected to
the shutdown input as shown in Figure 39. This places the amplifier in a low current state for maximum power
savings. Pullup resistors in the range from 1 kΩ to 10 kΩ are recommended for 5-V and 3.3-V operation.
V
DD
R
PU
NC
HP-IN1
6
7
3
HP-IN2
Bias
Control
HP-SENSE
SHUTDOWN
Headphone
Plug
2
Figure 39. Schematic Diagram of Typical Headphone Sense Application
Table 3 details the logic for the mute function of the TPA4860.
Table 3. Truth Table for Headphone Sense and Shutdown Functions
INPUTS(1)
HP-2
Low
OUTPUT
HP-SENSE
Low
AMPLIFIER STATE
HP-1
Low
Low
High
High
X(2)
SHUTDOWN
Low
Active
Mute
High
Low
High
Low
Low
High
Mute
High
X(2)
Low
High
X(2)
Mute
High
Shutdown
(1) Inputs should never be left unconnected.
(2) X = do not care
20
TPA4860
www.ti.com
SLOS164B–SEPTEMBER 1996–REVISED JUNE 2004
SHUTDOWN MODE
The TPA4860 employs a shutdown mode of operation designed to reduce quiescent supply current, IDD(q), to the
absolute minimum level during periods of nonuse for battery-power conservation. For example, during device
sleep modes or when other audio-drive currents are used (i.e., headphone mode), the speaker drive is not
required. The SHUTDOWN input terminal should be held low during normal operation when the amplifier is in
use. Pulling SHUTDOWN high causes the outputs to mute and the amplifier to enter a low-current state, IDD
0.6 µA. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable.
~
USING LOW-ESR CAPACITORS
Low-ESR capacitors are recommended throughout this applications section. A real capacitor can be modeled
simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the
beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the
real capacitor behaves like an ideal capacitor.
THERMAL CONSIDERATIONS
A prime consideration when designing an audio amplifier circuit is internal power dissipation in the device. The
curve in Figure 40 provides an easy way to determine what output power can be expected out of the TPA4860
for a given system ambient temperature in designs using 5-V supplies. This curve assumes no forced airflow or
additional heat sinking.
160
V
DD
= 5 V
140
120
100
R
L
= 16 Ω
80
60
40
R
L
= 8 Ω
R
L
= 4 Ω
20
0
0
0.25
0.5
0.75
1
1.25
1.50
Maximum Output Power – W
Figure 40. Free-Air Temperature Versus Maximum Continuous Output Power
5-V VERSUS 3.3-V OPERATION
The TPA4860 was designed for operation over a supply range of 2.7 V to 5.5 V. This data sheet provides full
specifications for 5-V and 3.3-V operation, as these are considered to be the two most common standard
voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain
setting, or stability. Supply current is slightly reduced from 3.5 mA (typical) to 2.5 mA (typical). The most
important consideration is that of output power. Each amplifier in TPA4860 can produce a maximum voltage
swing of VDD – 1 V. This means, for 3.3-V operation, clipping starts to occur when VO(PP) = 2.3 V as opposed to
when VO(PP) = 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output
power into an 8-Ω load to less than 0.33 W before distortion begins to become significant.
Operation at 3.3-V supplies, as can be shown from the efficiency formula in Equation 4, consumes approximately
two-thirds the supply power for a given output-power level than operation from 5-V supplies. When the
application demands less than 500 mW, 3.3-V operation should be strongly considered, especially in
battery-powered applications.
21
PACKAGE OPTION ADDENDUM
www.ti.com
18-Apr-2006
PACKAGING INFORMATION
Orderable Device
TPA4860D
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPA4860DR
SOIC
SOIC
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPA4860DRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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