SN74TVC16222-2 [TI]
DUAL VOLTAGE CLAMP; 双电压钳位
| 型号： | SN74TVC16222-2 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL VOLTAGE CLAMP |
| 文件： | 总13页 (文件大小：589K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74TVC3306
DUAL VOLTAGE CLAMP
www.ti.com
SCDS112C–MARCH 2001–REVISED MARCH 2005
FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
•
•
•
Designed to Be Used in Voltage-Limiting
Applications
GND
A1
1
2
3
4
8
7
6
5
GATE
B1
3.5-Ω On-State Connection Between Ports A
and B
A2
B2
Flow-Through Pinout for Ease of Printed
Circuit Board Trace Routing
A3
B3
•
•
Direct Interface With GTL+ Levels
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
The SN74TVC3306 provides three parallel NMOS pass transistors with a common unbuffered gate. The low
on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device can be used as a dual switch, with the gates cascaded together to a reference transistor. The
low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to
protect components with inputs that are sensitive to high-state voltage-level overshoots.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
SN74TVC3306DCTR
SN74TVC3306DCUR
TOP-SIDE MARKING
SSOP – DCT
VSSOP – DCU
Tape and reel
Tape and reel
FA6
FA6
–40°C to 85°C
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
LOGIC DIAGRAM (POSITIVE LOGIC)
GATE
8
B1
7
B2
6
B3
5
1
2
3
4
GND
A1
A2
A3
NOTE A: The SN74TVC3306 has bidirectional capability across many voltage levels. The voltage levels documented in this data sheet are
examples.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74TVC3306
DUAL VOLTAGE CLAMP
www.ti.com
SCDS112C–MARCH 2001–REVISED MARCH 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
MAX
UNIT
VI
Input voltage range(2)
7
V
VI/O
Input/output voltage range(2)
Continuous channel current
Input clamp current
7
128
–50
220
227
150
V
mA
mA
IIK
VI < 0
DCT package
DCU package
θJA
Tstg
Package thermal impedance(3)
Storage temperature range
°C/W
°C
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and input/output negative-voltage ratings may be exceeded if the input and input/output clamp-current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
MIN
0
MAX
5
UNIT
V
VI/O
Input/output voltage
GATE voltage
VGATE
IPASS
TA
0
5
V
Pass transistor current
Operating free-air temperature
64
85
mA
°C
–40
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
VGATE = 0
MIN
TYP(1)
MAX UNIT
II = -18 mA,
VI = 5 V,
–1.2
5
V
IIH
VGATE = 0
µA
pF
pF
pF
Ci(GATE)
Cio(off)
VI = 3 V or 0
VO = 3 V or 0,
VO = 3 V or 0,
11
4
VGATE = 0
6
12.5
5.5
7
Cio(on)
VGATE = 3 V
10.5
3.5
VGATE = 4.5 V
VGATE = 3 V
4.7
VI = 0,
IO = 64 mA
VGATE = 2.3 V
VGATE = 1.5 V
VGATE = 4.5 V
VGATE = 3 V
6.3
9.5
32
(2)
ron
25.5
4.8
Ω
7.5
23
VI = 2.4 V,
VI = 1.7 V,
IO = 15 mA
IO = 15 mA
14.7
11.3
VGATE = 2.3 V
16.5
(1) All typical values are at TA = 25°C.
(2) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is
determined by the lowest voltage of the two (A or B) terminals.
2
SN74TVC3306
DUAL VOLTAGE CLAMP
www.ti.com
SCDS112C–MARCH 2001–REVISED MARCH 2005
AC Performance (Translating Down)
Switching Characteristics
over recommended operating free-air temperature range, VGATE = 3.3 V, VIH = 3.3 V, VIL = 0, and VM = 1.15 V
(unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
0.8
1.2
0.6
1
0.3
0.5
A or B
B or A
ns
0
0
0
Switching Characteristics
over recommended operating free-air temperature range, VGATE = 2.5 V, VIH = 2.5 V, VIL = 0, and VM = 0.75 V
(unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
0.4
tPLH
tPHL
1
0.7
1
A or B
B or A
ns
0
1.3
0
0
0.6
AC Performance (Translating Up)
Switching Characteristics
over recommended operating free-air temperature range, VGATE = 3.3 V, VIH = 2.3 V, VIL = 0, VT = 3.3 V, VM = 1.15 V, and
RL = 300 Ω (unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
0.9
1.4
0.6
1.1
0.4
0.7
A or B
B or A
ns
0
0
0
Switching Characteristics
over recommended operating free-air temperature range, VGATE = 2.5 V, VIH = 1.5 V, VIL = 0, VT = 2.5 V, VM = 0.75 V, and
RL = 300 Ω (unless otherwise noted) (see Figure 1)
CL = 50 pF
CL = 30 pF
CL = 15 pF
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
0
MAX
MIN
0
MAX
MIN
0
MAX
tPLH
tPHL
1
0.6
1.3
0.4
0.8
A or B
B or A
ns
0
1.3
0
0
3
SN74TVC3306
DUAL VOLTAGE CLAMP
www.ti.com
SCDS112C–MARCH 2001–REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
V
T
USAGE
SWITCH
S1
Translating up
Translating down
R
L
S2
S1
Open
S2
From Output
Under Test
V
V
IH
Input
V
V
V
M
M
C
L
IL
(see Note A)
V
V
OH
Output
V
M
M
LOAD CIRCUIT
NOTES: A. C includes probe and jig capacitance.
OL
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2 ns, t ≤ 2 ns.
O
r
f
C. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit for Outputs
4
SN74TVC3306
DUAL VOLTAGE CLAMP
www.ti.com
SCDS112C–MARCH 2001–REVISED MARCH 2005
APPLICATION INFORMATION
V
= 3.3 V
V
DPU
= 2.5 V
DDREF
Motherboard
Interface
200 kΩ
150 Ω
150 Ω
(1)
(1)
GATE
8
B1 (V
7
)
B2
6
B3
5
BIAS
TVC3306
1
2
3
4
A1
A2
A3
(1)
V
REF
= 1.5 V
Open-Drain
CPU Interface
(1) V
and V
can be applied to any one of the pass transistors. GATE must be connected externally to V
.
REF
BIAS
BIAS
Figure 2. Typical Application Circuit
For the clamping configuration, the common GATE input must be connected to one side (An or Bn) of any one of
the pass transistors, making that the VBIAS connection of the reference transistor and the opposite side (Bn or
An) the VREF connection. When VBIAS is connected through a 200-kΩ resistor to a 3-V to 5.5-V VCC supply and
VREF is set to 0 V to VCC – 0.6 V, the output of each switch has a maximum clamp voltage equal to VREF. A filter
capacitor on VBIAS is recommended.
Application Operating Conditions
see Figure 2
MIN TYP(1)
MAX UNIT
VBIAS
VGATE
VREF
VDPU
IPASS
IREF
BIAS voltage
VREF + 0.6
2.1
2.1
1.5
2.5
14
5
5
5
V
V
GATE voltage
VREF + 0.6
Reference voltage
0
4.4
2.64
V
Drain pullup voltage
Pass-transistor current
Reference-transistor current
Operating free-air temperature
2.36
V
mA
µA
°C
TA
–40
85
(1) All typical values are at TA = 25°C.
5
PACKAGE OPTION ADDENDUM
www.ti.com
15-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74TVC3306DCTR
SN74TVC3306DCTRE4
SN74TVC3306DCTRG4
SN74TVC3306DCUR
SN74TVC3306DCURE4
SN74TVC3306DCURG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SM8
DCT
8
8
8
8
8
8
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SM8
SM8
US8
US8
US8
DCT
DCT
DCU
DCU
DCU
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Dec-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74TVC3306DCUR
US8
DCU
8
3000
180.0
8.4
2.25
3.35
1.05
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Dec-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
US8 DCU
SPQ
Length (mm) Width (mm) Height (mm)
202.0 201.0 28.0
SN74TVC3306DCUR
8
3000
Pack Materials-Page 2
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,13
0,65
8
5
0,15 NOM
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
0,25
1
4
0° – 8°
0,60
0,20
3,15
2,75
1,30 MAX
Seating Plane
0,10
0,10
0,00
4188781/C 09/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
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