SN74CBTR16233DGVR [TI]
CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56;
| 型号： | SN74CBTR16233DGVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56, PLASTIC, TVSOP-56 光电二极管 输出元件 逻辑集成电路 电视 |
| 文件： | 总4页 (文件大小：279K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74CBTR16233
16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS075A – JULY 1998 – REVISED OCTOBER 1998
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
D
25-Ω Switch Connection Between Two
Ports
D
TTL-Compatible Input Levels
1A
2B1
2B2
3A
1B1
1B2
2A
3B1
3B2
4A
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and 300-mil Shrink
Small-Outline (DL) Packages
2
3
4
4B1
4B2
5A
5
6
description
5B1
5B2
6A
7
6B1
6B2
7A
8B1
8B2
GND
8
The SN74CBTR16233 is a 16-bit 1-of-2 FET
9
multiplexer/demultiplexer used in applications in
which two separate data paths must be
multiplexed onto, or demultiplexed from, a single
path. This device can be used for memory
interleaving, where two different banks of memory
need to be addressed simultaneously. The device
can be used as two 8-bit to 16-bit multiplexers or
as one 16-bit to 32-bit multiplexer.
7B1
7B2
8A
10
11
12
13
14
15
16
17
18
19
GND
V
V
CC
CC
9A
10B1
10B2
11A
9B1
9B2
10A
11B1
11B2
Two select (SEL1 and SEL2) inputs control the
dataflow. WhentheTESTinputsareasserted, the
A port is connected to both the B1 and the B2
ports. SEL1, SEL2, and the TEST inputs can be
driven with a 5-V CMOS, a 5-V TTL, or a
low-voltage TTL driver.
12B1
12B2 20
13A 21
14B1 22
14B2 23
15A 24
37 12A
36 13B1
35 13B2
34 14A
33 15B1
The SN74CBTR16233 is specified by design not
to have through current when switching
directions.
25
26
27
28
32
31
30
29
16B1
16B2
15B2
16A
TEST1
TEST2
SEL1
SEL2
The device has equivalent 25-Ω seriesresistorsto
reduce signal-reflection noise. This eliminates the
need for external terminating resistors.
The SN74CBTR16233 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each multiplexer/demultiplexer)
INPUTS
FUNCTION
SEL TEST
L
H
X
L
L
A = B1
A = B2
H
A = B1 and A = B2
Copyright 1998, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4–51
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBTR16233
16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS075A – JULY 1998 – REVISED OCTOBER 1998
logic diagram (positive logic)
1
56
55
15
42
41
1A
9A
1B1
1B2
9B1
9B2
45
11
12
31
25
26
8A
8B1 16A
8B2
16B1
16B2
30
27
29
28
SEL1
SEL2
TEST1
TEST2
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
I
CC
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Package thermal impedance, θ (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
JA
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN
4.75
2
MAX
UNIT
V
V
V
V
Supply voltage
5.25
CC
IH
IL
High-level control input voltage
Low-level control input voltage
Operating free-air temperature
V
0.8
70
V
T
A
0
°C
NOTE 3: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4–52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBTR16233
16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS075A – JULY 1998 – REVISED OCTOBER 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
I = –18 mA
MIN TYP
MAX
–1.2
10
UNIT
V
V
IK
V
V
V
V
V
= 4.75 V,
= 0,
CC
CC
CC
CC
CC
I
V = 5.25 V
I
µA
µA
µA
mA
pF
I
I
= 5.25 V,
= 5.25 V,
= 5.5 V,
V = 5.25 V or GND
I
±1
I
I
O
= 0,
V = V
I
or GND
3
CC
CC
‡
∆I
CC
Control inputs
One input at 3.4 V,
Other inputs at V
or GND
2.5
CC
C
C
Control inputs V = 3 V or 0
I
i
V
= 3 V or 0
= 4.75 V
pF
io(OFF)
O
I = 64 mA
I
V = 0
I
§
V
CC
I = 30 mA
I
Ω
r
on
V = 2.4 V,
I
I = 15 mA
I
†
‡
§
All typical values are at V
= 5 V, T = 25°C.
A
CC
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
or GND.
CC
Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the
lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
¶
t
t
t
t
A or B
SEL
B or A
ns
ns
ns
ns
pd
pd
en
A
B
B
TEST or SEL
TEST or SEL
dis
¶
Thepropagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
4–53
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74CBTR16233
16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS075A – JULY 1998 – REVISED OCTOBER 1998
PARAMETER MEASUREMENT INFORMATION
7 V
Open
TEST
S1
S1
500 Ω
From Output
Under Test
t
Open
7 V
pd
GND
t
/t
PLZ PZL
/t
C
= 50 pF
t
Open
L
PHZ PZH
500 Ω
(see Note A)
Output
Control
(low-level
enabling)
3 V
0 V
1.5 V
1.5 V
LOAD CIRCUIT
t
PZL
t
PLZ
Output
Waveform 1
S1 at 7 V
3.5 V
3 V
0 V
1.5 V
Input
V
OL
+ 0.3 V
1.5 V
1.5 V
V
OL
(see Note B)
t
PHZ
t
PZH
t
t
PLH
PHL
Output
Waveform 2
S1 at Open
(see Note B)
V
OH
V
OH
V
OH
– 0.3 V
0 V
1.5 V
Output
1.5 V
1.5 V
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
C includes probe and jig capacitance.
L
ENABLE AND DISABLE TIMES
NOTES: A.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 1. Load Circuit and Voltage Waveforms
4–54
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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