SN54LVTH162245WDR [TI]
LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP48, 0.380 INCH, FINE PITCH, CERAMIC, FP-48;
| 型号： | SN54LVTH162245WDR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP48, 0.380 INCH, FINE PITCH, CERAMIC, FP-48 CD 信息通信管理 输出元件 逻辑集成电路 |
| 文件： | 总20页 (文件大小：1009K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
FEATURES
SN54LVTH162245. . . WD PACKAGE
SN74LVTH162245. . . DGG OR DL PACKAGE
(TOP VIEW)
•
Members of the Texas Instruments Widebus™
Family
•
A-Port Outputs Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
•
•
•
•
•
•
•
•
•
Support Mixed-Mode Signal Operation (5-V
4
Input and Output Voltages With 3.3-V VCC
)
5
Support Unregulated Battery Operation Down
to 2.7 V
6
7
V
CC
V
CC
Typical VOLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Ioff and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
V
CC
V
CC
Latch-Up Performance Exceeds 500 mA Per
JESD 17
2B5
2B6
GND
2B7
2A5
2A6
GND
2A7
ESD Protection Exceeds JESD 22
–
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
2B8 23
26 2A8
25 2OE
2DIR 24
1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port
outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits
data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when
the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ
.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors
to reduce overshoot and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1993–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
74LVTH162245GRDR
74LVTH162245ZRDR
SN74LVTH162245DL
TOP-SIDE MARKING
LL2245
FBGA – GRD
Reel of 1000
Tube of 25
FBGA – ZRD (Pb-free)
SN74LVTH162245DLG4
SN74LVTH162245DLR
74LVTH162245DLRG4
SN74LVTH162245DGGR
74LVTH162245DGGRG4
74LVTH162245GRE4
SN74LVTH162245KR
74LVTH162245ZQLR
SSOP – DL
LVTH162245
LVTH162245
Reel of 1000
–40°C to 85°C
TSSOP – DGG
Reel of 2000
VFBGA – GQL
Reel of 1000
Tube
LL2245
VFBGA – ZQL (Pb-free)
CFP – WD
–55°C to 125°C
SNJ54LVTH162245WD
SNJ54LVTH162245WD
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
GQL OR ZQL PACKAGE
TERMINAL ASSIGNMENTS(1)
(TOP VIEW)
(56-Ball GQL/ZQL Package)
1
2 3 4 5 6
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
A
B
C
D
E
F
1DIR
1B2
1B4
1B6
1B8
2B1
2B3
2B5
2B7
2DIR
NC
NC
NC
NC
1OE
1A2
1A4
1A6
1A8
2A1
2A3
2A5
2A7
2OE
1B1
1B3
1B5
1B7
2B2
2B4
2B6
2B8
NC
GND
VCC
GND
GND
VCC
GND
1A1
1A3
1A5
1A7
2A2
2A4
2A6
2A8
NC
G
H
J
GND
VCC
GND
NC
GND
VCC
GND
NC
K
K
abc
abc
(1) NC – No internal connection
2
Submit Documentation Feedback
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
TERMINAL ASSIGNMENTS(1)
(54-Ball GRD/ZRD Package)
GRD OR ZRD PACKAGE
(TOP VIEW)
1
2
3
4
5
6
1
2
3
4
5
6
A
B
C
D
E
F
1B1
1B3
1B5
1B7
2B1
2B3
2B5
2B7
2B8
NC
1DIR
NC
1OE
NC
NC
1A1
1A3
1A5
1A7
2A1
2A3
2A5
2A7
2A8
A
B
C
D
1B2
1B4
1B6
1B8
2B2
2B4
2B6
NC
1A2
1A4
1A6
1A8
2A2
2A4
2A6
NC
VCC
GND
GND
GND
VCC
NC
VCC
GND
GND
GND
VCC
NC
E
F
G
H
J
G
H
J
2DIR
2OE
(1) NC – No internal connection
FUNCTION TABLE(1)
(EACH 8-BIT SECTION)
CONTROL INPUTS
OUTPUT CIRCUITS
OPERATION
OE
L
DIR
L
A PORT
Enabled
Hi-Z
B PORT
Hi-Z
B data to A bus
A data to B bus
Isolation
L
H
Enabled
Hi-Z
H
X
Hi-Z
(1) Input circuits of the data I/Os always are active.
LOGIC DIAGRAM (POSITIVE LOGIC)
24
1
2DIR
1DIR
48
25
13
1OE
2OE
36
47
1A1
2A1
2
2B1
1B1
To Seven Other Channels
To Seven Other Channels
3
Submit Documentation Feedback
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX
4.6
UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high state(2)
SN54LVTH162245 (B port)
V
7
7
V
V
V
VO
VO
–0.5 VCC + 0.5
96
128
30
IO
Current into any output in the low state
SN74LVTH162245 (B port)
A port
mA
mA
SN54LVTH162245 (B port)
SN74LVTH162245 (B port)
A port
48
IO
Current into any output in the high state(3)
64
30
IIK
Input clamp current
Output clamp current
VI < 0
–50
–50
70
mA
mA
IOK
VO < 0
DGG package
DL package
63
θJA
Package thermal impedance(4)
°C/W
°C
GQL/ZQL package
GRD/ZRD package
42
36
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) This current flows only when the output is in the high state and VO > VCC
.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
SN54LVTH162245
SN74LVTH162245
UNIT
MIN
2.7
2
MAX
MIN
2.7
2
MAX
VCC
VIH
VIL
VI
Supply voltage
3.6
3.6
V
V
V
V
High-level input voltage
Low-level input voltage
Input voltage
0.8
5.5
–12
–24
12
0.8
5.5
–12
–32
12
A port
IOH
High-level output current
Low-level output current
mA
mA
B port
A port
IOL
B port
48
64
∆t/∆v
∆t/∆VCC
TA
Input transition rise or fall rate
Power-up ramp rate
Outputs enabled
10
10 ns/V
200
–55
200
–40
µs/V
Operating free-air temperature
125
85
°C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
Submit Documentation Feedback
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
SN54LVTH162245
MIN TYP(1)
SN74LVTH162245
MIN TYP(1)
MAX
PARAMETER
VIK
TEST CONDITIONS
UNIT
MAX
VCC = 2.7 V,
II = –18 mA
–1.2
–1.2
V
VCC = 2.7 V to 3.6 V, IOH = –100 µA
VCC = 3 V, IOH = –12 mA
VCC = 2.7 V to 3.6 V, IOH = –100 µA
VCC – 0.2
VCC – 0.2
A port
B port
A port
2
VCC – 0.2
2.4
2
VCC – 0.2
2.4
VOH
V
VCC = 2.7 V,
IOH = –8 mA
IOH = –24 mA
IOH = –32 mA
2
VCC = 3 V
2
VCC = 2.7 V to 3.6 V, IOL = 100 µA
0.2
0.8
0.2
0.8
0.2
0.5
0.4
0.5
VCC = 3 V,
IOL = 12 mA
IOL = 100 µA
IOL = 24 mA
IOL = 16 mA
IOL = 32 mA
IOL = 48 mA
IOL = 64 mA
VI = VCC or GND
VI = 5.5 V
0.2
VCC = 2.7 V
0.5
VOL
V
0.4
B port
0.5
VCC = 3 V
0.55
0.55
±1
VCC = 3.6 V,
±1
10
20
5
Control
inputs
VCC = 0 or 3.6 V,
10
II
VI = 5.5 V
20
µA
A or B
port(2)
VCC = 3.6 V
VI = VCC
5
VI = 0
–10
–10
±100
Ioff
VCC = 0,
VI or VO = 0 to 4.5 V
VI = 0.8 V
µA
µA
75
75
VCC = 3 V
A or B
port
VI = 2 V
–75
–75
II(hold)
500
–750
VCC = 3.6 V,(3)
VI = 0 to 3.6 V
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE = don't care
IOZPU
IOZPD
±100(4)
±100(4)
±100
±100
µA
µA
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE = don't care
Outputs high
VCC = 3.6 V,
0.19
5
0.19
5
ICC
IO = 0,
Outputs low
mA
mA
VI = VCC or GND
Outputs disabled
0.19
0.19
VCC = 3 V to 3.6 V,
One input at VCC – 0.6 V,
Other inputs at VCC or GND
(5)
∆ICC
0.3
0.2
CI
VI = 3 V or 0
VO = 3 V or 0
4
4
pF
pF
Cio
10
10
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) Unused pins at VCC or GND
(3) This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to
another.
(4) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(5) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
5
Submit Documentation Feedback
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
Switching Characteristics
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54LVTH162245
VCC = 3.3 V
± 0.3 V
MIN MAX MIN MAX MIN TYP(1) MAX MIN MAX
SN74LVTH162245
VCC = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC = 2.7 V
VCC = 2.7 V
UNIT
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
1
1
3.5
3.5
4.3
4.2
4.8
4.8
5.5
5.4
5.5
5.5
5.8
6.3
4
3.9
5.3
4.5
5.9
5.5
7.2
6.4
5.8
5.8
6.5
6.3
1
1
2.3
2.2
2.8
2.5
2.8
3
3.3
3.3
4
3.7
3.5
4.6
3.6
5.4
5.2
6.3
5.8
5.5
5.4
5.9
5.5
A
B
A
B
A
B
A
ns
ns
ns
ns
ns
ns
ns
1
1
B
1
1
3.4
4.6
4.6
5.3
5.1
5.2
5.1
5.6
5.5
0.5
0.5
1
1
OE
OE
OE
OE
1
1
tPZH
tPZH
tPHZ
tPLZ
1
1
3.3
3.3
3.8
3.5
4
1
1
1.5
1.5
1.5
1.2
1.5
1.5
1.5
1.5
tPHZ
tPLZ
tsk(LH)
tsk(HL)
3.8
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
6
Submit Documentation Feedback
SN54LVTH162245, SN74LVTH162245
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS260Q–JUNE 1993–REVISED NOVEMBER 2006
PARAMETER MEASUREMENT INFORMATION
6 V
Open
GND
S1
TEST
S1
500 Ω
From Output
Under Test
t
/t
Open
6 V
GND
PLH PHL
t
t
/t
PLZ PZL
C = 50 pF
L
/t
500 Ω
PHZ PZH
(see Note A)
2.7 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
2.7 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
0 V
V
t
t
t
PHL
t
t
PLZ
PLH
PZL
Output
Waveform 1
S1 at 6 V
3 V
OH
1.5 V
1.5 V
1.5 V
Output
1.5 V
V
OL
+ 0.3 V
V
OL
V
OL
(see Note B)
t
t
t
PZH
PHZ
PHL
PLH
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
7
Submit Documentation Feedback
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9678001QXA
ACTIVE
CFP
WD
48
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9678001QX
A
SNJ54LVTH16224
5WD
5962-9678001VXA
ACTIVE
CFP
WD
48
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9678001VX
A
SNV54LVTH16224
5WD
74LVTH162245DGGRG4
74LVTH162245DLRG4
74LVTH162245GRDR
ACTIVE
ACTIVE
TSSOP
SSOP
DGG
DL
48
48
54
2000
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
-40 to 85
-40 to 85
-40 to 85
LVTH162245
LVTH162245
LL2245
Green (RoHS
& no Sb/Br)
OBSOLETE
BGA
GRD
TBD
MICROSTAR
JUNIOR
74LVTH162245GRE4
74LVTH162245ZQLR
ACTIVE
ACTIVE
TSSOP
DGG
ZQL
48
56
2000
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
LVTH162245
LL2245
BGA
MICROSTAR
JUNIOR
Green (RoHS
& no Sb/Br)
74LVTH162245ZRDR
ACTIVE
BGA
MICROSTAR
JUNIOR
ZRD
54
1000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
LL2245
SN74LVTH162245DGGR
SN74LVTH162245DL
SN74LVTH162245DLG4
SN74LVTH162245DLR
SN74LVTH162245KR
ACTIVE
ACTIVE
TSSOP
SSOP
SSOP
SSOP
DGG
DL
48
48
48
48
56
2000
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
LVTH162245
LVTH162245
LVTH162245
LVTH162245
LL2245
Green (RoHS
& no Sb/Br)
ACTIVE
DL
25
Green (RoHS
& no Sb/Br)
ACTIVE
DL
1000
Green (RoHS
& no Sb/Br)
OBSOLETE
BGA
GQL
TBD
MICROSTAR
JUNIOR
SNJ54LVTH162245WD
ACTIVE
CFP
WD
48
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-9678001QX
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Drawing Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
(1)
(2)
(3)
(4/5)
A
SNJ54LVTH16224
5WD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LVTH162245, SN54LVTH162245-SP, SN74LVTH162245 :
Catalog: SN74LVTH162245, SN54LVTH162245
•
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Enhanced Product: SN74LVTH162245-EP, SN74LVTH162245-EP
•
Military: SN54LVTH162245
•
Space: SN54LVTH162245-SP
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Military - QML certified for Military and Defense Applications
•
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Oct-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
74LVTH162245ZQLR
BGA MI
CROSTA
R JUNI
OR
ZQL
56
1000
330.0
16.4
4.8
5.8
8.6
7.3
1.5
8.0
16.0
Q1
74LVTH162245ZRDR
BGA MI
CROSTA
R JUNI
OR
ZRD
54
1000
330.0
16.4
8.3
1.55
8.0
16.0
Q1
SN74LVTH162245DGGR TSSOP
SN74LVTH162245DLR SSOP
DGG
DL
48
48
2000
1000
330.0
330.0
24.4
32.4
15.8
1.8
3.1
12.0
16.0
24.0
32.0
Q1
Q1
11.35 16.2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Oct-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
74LVTH162245ZQLR
BGA MICROSTAR
JUNIOR
ZQL
56
1000
333.2
345.9
28.6
74LVTH162245ZRDR
BGA MICROSTAR
JUNIOR
ZRD
54
1000
333.2
345.9
28.6
SN74LVTH162245DGGR
SN74LVTH162245DLR
TSSOP
SSOP
DGG
DL
48
48
2000
1000
367.0
367.0
367.0
367.0
45.0
55.0
Pack Materials-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
WD (R-GDFP-F**)
CERAMIC DUAL FLATPACK
48 LEADS SHOWN
0.120 (3,05)
0.075 (1,91)
0.009 (0,23)
0.004 (0,10)
1.130 (28,70)
0.870 (22,10)
0.370 (9,40)
0.250 (6,35)
0.390 (9,91)
0.370 (9,40)
0.370 (9,40)
0.250 (6,35)
1
48
0.025 (0,635)
A
0.014 (0,36)
0.008 (0,20)
24
25
NO. OF
LEADS**
48
56
0.740
0.640
(16,26) (18,80)
A MAX
A MIN
0.610 0.710
(15,49) (18,03)
4040176/D 10/97
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only
E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA
GDFP1-F56 and JEDEC MO-146AB
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Automotive and Transportation www.ti.com/automotive
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/industrial
www.ti.com/medical
Medical
Logic
Security
www.ti.com/security
Power Mgmt
Microcontrollers
RFID
power.ti.com
Space, Avionics and Defense
Video and Imaging
www.ti.com/space-avionics-defense
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/omap
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
e2e.ti.com
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明