SN54LVT244W [TI]
LVT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20;
| 型号： | SN54LVT244W |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LVT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, DFP-20 驱动器 输出元件 |
| 文件： | 总13页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54LVT244, SN74LVT244
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS135B – AUGUST 1992 – REVISED MARCH 1994
SN54LVT244 . . . J OR W PACKAGE
SN74LVT244 . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
• State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static Power
Dissipation
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
• Support Mixed-Mode Signal Operation (5-V
2OE
1Y1
2A4
1Y2
2A3
1Y3
Input and Output Voltages With 3.3-V V
)
CC
• Support Unregulated Battery Operation
Down to 2.7 V
• Typical V
(Output Ground Bounce)
OLP
< 0.8 V at V
= 3.3 V, T = 25°C
CC
A
13 2A2
12 1Y4
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
11
2A1
SN54LVT244 . . . FK PACKAGE
(TOP VIEW)
• Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
• Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
• Supports Live Insertion
3
2
1
20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
• Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flatpacks (W), and Ceramic
DIPS (J)
17
16
15
14
9 10 11 12 13
description
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) V operation, but with the
CC
capability to provide a TTL interface to a 5-V system environment.
The ’LVT244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVT244 is packaged in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVT244 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74LVT244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LVT244–5
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LVT244, SN74LVT244
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS135B – AUGUST 1992 – REVISED MARCH 1994
†
logic symbol
logic diagram (positive logic)
1
1OE
1
1OE
EN
18
2
2
4
6
8
18
16
14
12
1Y1
1Y2
1A1
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
16
14
4
1A2
6
1A3
1Y3
1Y4
19
EN
2OE
12
8
1A4
11
13
15
17
9
7
5
3
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
19
2OE
9
7
11
2Y1
2Y2
2A1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
13
2A2
5
3
15
2Y3
2Y4
2A3
17
2A4
‡
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high state or power-off state, V (see Note 1) . . . . –0.5 V to 7 V
O
Current into any output in the low state, I : SN54LVT244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74LVT244 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the high state, I (see Note 2): SN54LVT244 . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
O
SN74LVT244 . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
O
Maximum power dissipation at T = 55°C (in still air) (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . 0.6 W
A
DW package . . . . . . . . . . . . . . . . . . . 1.6 W
PW package . . . . . . . . . . . . . . . . . . . 0.7 W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current will only flow when the output is in the high state and V > V
.
CC
O
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerations application note.
LVT244–5
2–2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LVT244, SN74LVT244
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS135B – AUGUST 1992 – REVISED MARCH 1994
recommended operating conditions (see Note 4)
SN54LVT244 SN74LVT244
UNIT
MIN
2.7
2
MAX
MIN
2.7
2
MAX
V
V
V
V
Supply voltage
3.6
3.6
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
5.5
–24
48
0.8
5.5
–32
64
V
IL
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
mA
mA
ns/V
°C
OH
OL
∆t/∆v
Outputs enabled
10
10
T
A
–55
125
–40
85
NOTE 4: Unused or floating control inputs must be held high or low.
LVT244–5
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LVT244, SN74LVT244
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS135B – AUGUST 1992 – REVISED MARCH 1994
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVT244
SN74LVT244
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.7 V,
I = –18 mA
–1.2
–1.2
V
IK
I
‡
= MIN to MAX ,
= 2.7 V,
= 3 V,
I
I
I
I
I
I
I
I
I
I
= –100 µA
= – 8 mA
= – 24 mA
= –32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 48 mA
= 64 mA
V
–0.2
V
–0.2
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
CC
2.4
CC
2.4
V
OH
V
V
2
= 3 V,
2
= 2.7 V,
= 2.7 V,
= 3 V,
0.2
0.5
0.2
0.5
0.4
0.5
0.4
V
OL
= 3 V,
0.5
= 3 V,
0.55
= 3 V,
0.55
10
‡
= 0 or MAX ,
V = 5.5 V
I
50
±1
1
= 3.6 V,
= 3.6 V,
= 3.6 V,
= 0,
V = V
or GND
Control pins
Data pins
±1
I
CC
CC
I
I
µA
V = V
I
1
V = 0
I
–5
–5
I
I
V or V = 0 to 4.5 V
±100
µA
µA
off
I
O
= 3 V,
V = 0.8 V
I
75
75
A inputs
I(hold)
= 3 V,
V = 2 V
I
–75
–75
I
I
= 3.6 V,
= 3.6 V,
V
= 3 V
1
–1
1
–1
µA
µA
OZH
O
O
V
= 0.5 V
OZL
Outputs high
Outputs low
0.12
8.6
0.39
14
0.12
8.6
0.19
12
V
= 3.6 V,
or GND
CC
I
= 0,
CC
O
I
mA
CC
V = V
I
Outputs
disabled
0.12
0.39
0.3
0.12
0.19
0.2
V
= 3 V to 3.6 V,
One input at V
or GND
– 0.6 V,
CC
CC
Other inputs at V
§
∆I
mA
CC
CC
C
C
V = 3 V or 0
4
8
4
8
pF
pF
i
I
V
O
= 3 V or 0
o
†
‡
§
All typical values are at V
= 3.3 V, T = 25°C.
A
CC
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.
CC
LVT244–5
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LVT244, SN74LVT244
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS135B – AUGUST 1992 – REVISED MARCH 1994
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Note 5)
SN54LVT244
= 3.3 V
SN74LVT244
= 3.3 V
FROM
(INPUT)
TO
(OUTPUT)
V
V
CC
± 0.3 V
CC
± 0.3 V
V
CC
= 2.7 V
V
CC
= 2.7 V
PARAMETER
UNIT
MIN
0.5
0.5
0.8
0.8
1.5
1.2
MAX
4.7
4.4
5.4
5.4
6.2
5.5
MIN
MAX
5.2
5.4
6.5
7.6
6.9
6
MIN
TYP
2.5
2.5
2.7
3.1
3.9
3.2
MAX
4.3
4.2
5.2
5.2
5.6
5.1
MIN
MAX
5
t
t
t
t
t
t
1
1
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
5.2
6.3
6.7
6.3
5.6
1
OE
OE
1.1
2.1
1.8
NOTE 5: Load circuit and voltage waveforms are shown in Section 1.
LVT244–5
2–5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SSOP
SOIC
SOIC
Drawing
SN74LVT244DBLE
SN74LVT244DW
SN74LVT244DWR
SN74LVT244PWLE
SNJ54LVT244FK
SNJ54LVT244J
OBSOLETE
OBSOLETE
OBSOLETE
DB
20
20
20
20
20
20
20
TBD
TBD
TBD
TBD
TBD
TBD
TBD
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DW
DW
PW
FK
OBSOLETE TSSOP
OBSOLETE
OBSOLETE
OBSOLETE
LCCC
CDIP
CFP
J
SNJ54LVT244W
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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