LM96063C [TI]
LM96063 Remote Diode Digital Temperature Sensor with Integrated Fan Control; LM96063远程二极管数字温度传感器,集成风扇控制型号: | LM96063C |
厂家: | TEXAS INSTRUMENTS |
描述: | LM96063 Remote Diode Digital Temperature Sensor with Integrated Fan Control |
文件: | 总44页 (文件大小:495K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LM96063
LM96063 Remote Diode Digital Temperature Sensor with Integrated Fan
Control
Literature Number: SNIS149A
November 28, 2011
LM96063
Remote Diode Digital Temperature Sensor with Integrated
Fan Control
Integrated PWM fan speed control output supports high
resolution at 22.5kHz frequency for 4-pin fans
Acoustic fan noise reduction with User-programmable 12-
■
General Description
The LM96063 is remote diode temperature sensors with in-
■
tegrated fan control that includes remote diode sensing. The
step Lookup Table
LM96063 accurately measures: (1) its own temperature and
(2) the temperature of a diode-connected transistor, such as
a 2N3904, or a thermal diode commonly found on Computer
Processors, Graphics Processor Units (GPU) and other
ASIC's.
LUT transition fine resolution smoothing function
■
■
Tachometer input for measuring fan RPM with Smart-Tach
modes for measuring RPM of fans when pulse-width-
modulating an actual power
ALERT output for error event notification
TCRIT output for critical temperature system shutdown
SMBus 2.0 compatible interface, supports TIMEOUT
LLP10 packages
■
■
■
■
The LM96063 also features an integrated, pulse-width-mod-
ulated (PWM), open-drain fan control output. Fan speed is a
combination of the remote temperature reading, the lookup
table and register settings. The 12-step Lookup Table (LUT)
enables the user to program a non-linear fan speed vs. tem-
perature transfer function often used to quiet acoustic fan
noise. In addition a fully programmable ramping function has
been added to allow smooth transitions between LUT set-
points.
Key Specifications
■ꢀRemote Diode Temp Accuracy (TruTherm™ off, includes
quantization error)
The LM96063 is targeted mainly for a transistor MMBT3904
used as thermal diodes or thermal diodes found in many FP-
GAs, ASICs, and processors on SOI processes. The
LM96163 is identical to the LM96063 except the TruTherm
BJT Beta compensation is enabled at power up that is tar-
geted for thermal diodes found on popular processors using
bulk non SOI processes.
Ambient
Temp
Diode
Temp
Max
Error
+25 to +85°C
+25 to +85°C
-40 to +25°C
+50 to +105°C
+40 to +105°C
+25 to +125°C
±0.75°C
±1.5°C
±3°C
■ꢀLocal Temp Accuracy (includes quantization error)
Features
Ambient Temp
Max Error
+25°C to +125°C
±3.0°C
Accurately senses remote diode-connected MMBT3904
■
transistors or thermal diodes on-board processors,
FPGAs or ASICs
3.0 V to 3.6 V
■ꢀSupply Voltage
■ꢀSupply Current (0.8Hz Conversion)
456 µA (typ)
Accurately senses its own local die temperature
■
■
■
■
Offset register can adjust for a variety of thermal diodes
Applications
Resolves remote temperatures up to 255.875°C
Communications Infrastructure FPGA, ASIC or Processor
Thermal Management
■
10-bit plus sign and 11-bit unsigned data formats, with
1/8°C resolution
Electronic Test and Office Equipment
Industrial Controls
■
■
Digital filter of remote data lowers noise and improves
resolution to 1/32°C
■
Connection Diagram
30029081
LLP10 (QFN10)
TruTherm™ is a trademark of National Semiconductor Corporation.
© 2011 Texas Instruments Incorporated
300290
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Ordering Information
Power-On Defaults
Thermal
Diode
Transport NS Package
Part Description
Top Mark
Order Number
HIGH
T_CRIT
Media
Number
SDA10A
SDA10A
Threshold
Threshold
LM96063C
10-pin LLP (QFN)
1000 units in
Tape/Reel
105°C
105°C
110°C
110°C
MMBT3904
MMBT3904
T63S
T63S
LM96063CISD
LM96063C
10-pin LLP (QFN)
4500 units in
Tape/Reel
LM96063CISDX
Pin Descriptions
Pin
Name
Input/Output
Function and Connection
Open-Drain Digital Output. Connect to system shutdown. Pin activates when
temperature conversion value exceeds programmed limit. Several power-on-default
limit values are available.
Open-Drain
Digital Output
1
2
TCRIT
Connect to a low-noise +3.3 ± 0.3 VDC power supply, and bypass to GND with a
VDD
Power Supply Input 0.1 µF ceramic capacitor in parallel with a 100 pF ceramic capacitor. A bulk
capacitance of 10 µF needs to be in the vicinity of the LM96063's VDD pin.
Connect to the anode (positive side) of the remote diode. A 100pF capacitor can be
connected between pins 3 and 4.
3
4
D+
D−
Analog Input
Connect to the cathode (negative side) of the remote diode. A 100pF capacitor can
be connected between pins 3 and 4.
Analog Input
Open-Drain
Digital Output
Open-Drain Digital Output. Connect to fan drive circuitry. The power-on default for
this pin is low (pin 4 pulled to ground).
5
6
7
PWM
GND
Ground
This is the analog and digital ground return.
This pin is an open-drain ALERT output.
Open-Drain
Digital Output
ALERT
Tachometer input for measuring fan speed. Note the TACH input is disabled upon
power-up and needs to be enabled for use by setting TCHEN bit 2 of Configuration
Register 03h.
8
TACH
Digital Input
Digital Input/
Open-Drain Digital
Output
9
SMBDAT
SMBCLK
This is the bidirectional SMBus data line.
Digital Input. This is the SMBus clock input.
10
Digital Input
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Simplified Block Diagram
30029082
Typical Application
30029003
3
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Junction Temperature
Storage Temperature
ESD Susceptibility (Note 4)
Human Body Model
Machine Model
125°C
−65°C to +150°C
Absolute Maximum Ratings (Note 2, Note
1)
2500 V
250 V
1000 V
Supply Voltage, VDD
−0.3 V to 6.0 V
Voltage on SMBDAT, SMBCLK,
ꢁALERT, TCRIT, TACH
PWM Pins
Charged Device Model
−0.5 V to 6.0 V
Operating Ratings (Note 1, Note 2)
Voltage on Other Pins
−0.3 V to (VDD + 0. 3 V)
Input Current, D− Pin
ꢁ(Note 3)
Input Current at All Other Pins
(Note 3)
Package Input Current
ꢁ(Note 3)
SMBDAT, ALERT, PWM pins
Output Sink Current
Package Power Dissipation
Specified Temperature Range
TMIN ≤ TA ≤ TMAX
±1 mA
5 mA
LM96063CISD
–40°C ≤ TA ≤ +85°C
-40°C ≤ TD ≤ +140°C
+3.0 V to +3.6 V
Remote Diode Temperature Range
Supply Voltage Range (VDD
)
30 mA
Soldering process must
comply
with
National
Semiconductor's Reflow Temperature Profile specifications.
Refer to www.national.com/packaging. (Note 6)
10 mA
(Note 5)
DC Electrical Characteristics
TEMPERATURE-TO-DIGITAL CONVERTER CHARACTERISTICS
The following specifications apply for VDD = 3.0 VDC to 3.6 VDC, and all analog source impedance RS = 50Ω unless otherwise
specified in the conditions. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = +25°C; unless otherwise noted.
TD is the junction temperature of the remote thermal diode. TJ is the junction temperature of the LM96063.
Typical
(Note 7) (Note 8)
Limits
Units
(Limits)
Parameter
Conditions
TD = +50°C to +105°C
Temperature Error Using an MMBT3904
Remote Thermal Diode
TA = +25°C to +85°C
TD = Remote Diode
Junction Temperature
TD = +40°C to +125°C
±0.75
°C (max)
TA = +25°C to +85°C
TA = -40°C to +25°C
TA = +25°C to +125°C
TA = -40°C to +25°C
±1.5
±3.0
°C (max)
°C (max)
°C (max)
°C (max)
Bits
TD = +25°C to +125°C
Temperature Error Using the Local Diode
±1
±3
±6
(Note 9)
11
0.125
8
Remote Diode Resolution
Local Diode Resolution
°C
Bits
1
°C
Conversion Time, All Temperature Channels Fastest Setting
D− Source Voltage
38.3
0.4
41.1
ms (max)
V
225
100
µA (max)
µA (min)
µA
(VD+ − VD−) = +0.65 V; High Current
Low Current
172
Diode Source Current
10.75
16
Diode Source Current Ratio
Operating Electrical Characteristics
Conditions
Typ
(Note 7)
Limits
(Note 8)
Symbol
Parameter
Units
2.8
1.6
V (max)
V (min)
VPOR
Power-On-Reset Threshold Voltage
SMBus Inactive, 13 Hz
Conversion Rate
1.1
1.6
mA (max)
IS
Supply Current (Note 10)
SMBus Inactive, 0.8 Hz
Conversion Rate
456
416
825
700
µA (max)
µA (max)
STANDBY Mode
4
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AC Electrical Characteristics
The following specifications apply for VDD = 3.0 VDC to 3.6 VDC, and all analog source impedance RS = 50Ω unless otherwise
specified in the conditions. Boldface limits apply for TA = TMIN to TMAX; all other limits TA= +25°C.
Typical
(Note 7)
Limits
(Note 8)
Units
(Limit)
Symbol
Parameter
Conditions
TACHOMETER ACCURACY
Fan Count Accuracy
±7
% (max)
(max)
kHz
Fan Full-Scale Count
65535
Fan Counter Clock Frequency
Fan Count Update Frequency
90
1.0
Hz
FAN PWM OUTPUT
Frequency Accuracy
±7
% (max)
Digital Electrical Characteristics
Typical
(Note 7)
Limits
(Note 8)
Units
(Limit)
Symbol
Parameter
Conditions
VIH
VIL
IIH
Logical High Input Voltage
Logical Low Input Voltage
Logical High Input Current
Logical Low Input Current
Digital Input Capacitance
2.1
0.8
V (min)
V (max)
µA (max)
µA (max)
pF
VIN = VDD
0.005
−0.005
5
+10
−10
IIL
VIN = GND
CIN
ALERT, TCRIT and PWM Output
Saturation Voltage
VOL
IOUT = 6 mA
0.4
V (max)
pF
COUT
Digital Output Capacitance
5
SMBus Logical Electrical Characteristics
The following specifications apply for VDD = 3.0 VDC to 3.6 VDC, and all analog source impedance RS = 50Ω unless otherwise
specified in the conditions. Boldface limits apply for TA = TMIN to TMAX; all other limits TA = +25°C.
Typical
(Note 7)
Limits
(Note 8)
Units
(Limit)
Symbol
Parameter
Conditions
SMBDAT OPEN-DRAIN OUTPUT
VOL
IOH
Logic Low Level Output Voltage
IOL = 4 mA
VOUT = VDD
0.4
10
V (max)
µA (max)
pF
High Level Output Current
Digital Output Capacitance
0.03
5
COUT
SMBDAT, SMBCLK INPUTS
VIH
VIL
Logical High Input Voltage
2.1
0.8
V (min)
V (max)
mV
Logical Low Input Voltage
Logic Input Hysteresis Voltage
Digital Input Capacitance
VHYST
CIN
320
5
pF
5
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SMBus Digital Switching Characteristics
Unless otherwise noted, these specifications apply for VDD = +3.0 VDC to +3.6 VDC, CL (load capacitance) on output lines = 80
pF. Boldface limits apply for TA = TJ; TMIN ≤ TA ≤ TMAX; all other limits TA = TJ = +25°C, unless otherwise noted. The switching
characteristics of the LM96063 fully meet or exceed the published specifications of the SMBus version 2.0. The following param-
eters are the timing relationships between SMBCLK and SMBDAT signals related to the LM96063. They adhere to but are not
necessarily the same as the SMBus bus specifications.
Limits
(Note 8)
Units
(Limit)
Symbol
fSMB
tLOW
tHIGH
Parameter
SMBus Clock Frequency
Conditions
10
100
kHz (min)
kHz (max)
From VIN(0) max to VIN(0) max
From VIN(1) min to VIN(1) min
SMBus Clock Low Time
SMBus Clock High Time
4.7
µs (min)
4.0
50
µs (min)
µs (max)
tR
(Note 11)
SMBus Rise Time
SMBus Fall Time
Output Fall Time
1
µs (max)
µs (max)
ns (max)
tF
(Note 12)
0.3
250
tOF
CL = 400 pF, IO = 3 mA
SMBDAT and SMBCLK Time Low for Reset of
Serial Interface See (Note 13)
25
35
ms (min)
ms (max)
tTIMEOUT
tSU:DAT
tHD:DAT
Data In Setup Time to SMBCLK High
250
ns (min)
300
1075
ns (min)
ns (max)
Data Out Hold Time after SMBCLK Low
Hold Time after (Repeated) Start Condition. After
this period the first clock is generated.
tHD:STA
tSU:STO
4.0
100
4.7
4.7
µs (min)
ns (min)
µs (min)
µs (min)
Stop Condition SMBCLK High to SMBDAT Low
(Stop Condition Setup)
SMBus Repeated Start-Condition Setup Time,
SMBCLK High to SMBDAT Low
tSU:STA
tBUF
SMBus Free Time between Stop and Start
Conditions
30029004
SMBus Timing Diagram for SMBCLK and SMBDAT Signals
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise noted.
Note 3: When the input voltage (VIN) at any pin exceeds the power supplies (VIN < GND or VIN > V+), the current at that pin should be limited to 5 mA. Parasitic
components and/or ESD protection circuitry are shown below for the LM96063's pins. Care should be taken not to forward bias the parasitic diode, D2, present
on pins D+ and D−. Doing so by more than 50 mV may corrupt temperature measurements.
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Pin #
Label
TCRIT
VDD
Circuit
Pin ESD Protection Structure Circuits
1
2
3
4
A
B
B
B
D+
D-
5
PWM
A
CIRCUIT A
6
7
8
9
GND
ALERT
TACH
B
A
A
A
SMBDAT
10
SMBCLK
A
CIRCUIT B
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. Charged Device Model
(CDM) simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated assembler) then rapidly being discharged.
Note 5: Thermal resistance junction to ambient when attached to a 2 layer 4"x3" printed circuit board with copper thickness of 2oz. as described in JEDEC
specification EIA/JESD51-3 is 137°C/W. Thermal resistance junction to ambient when attached to a 4 layer 4"x3" printed circuit board with copper thickness 2oz./
1oz./1oz/2oz. and 4 thermal vias as described in JEDEC specification EIA/JESD51-7 is 40.3°C/W.
Note 6: Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.
Note 7: “Typicals” are at TA = 25°C and represent most likely parametric norm. They are to be used as general reference values not for critical design calculations.
Note 8: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 9: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power
dissipation of the LM96063 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation.
Note 10: The supply current will not increase substantially with an SMBus transaction.
Note 11: The output rise time is measured from (VIL max - 0.15 V) to (VIH min + 0.15 V).
Note 12: The output fall time is measured from (VIH min + 0.15 V) to (VIL max - 0.15 V).
Note 13: Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM96063’s SMBus state machine, therefore
setting SMBDAT and SMBCLK pins to a high impedance state.
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Typical Performance Characteristics
Remote Temperature Reading Sensitivity to Thermal
Diode Filter Capacitance
Thermal Diode Capacitor or PCB Leakage Current Effect
on Remote Diode Temperature Reading
30029053
30029022
Conversion Rate Effect on
Average Power Supply Current
30029006
ALERT open-drain output that will be pulled low when the
measured temperature exceeds certain programmed limits
when enabled. Details are contained in the sections below.
1.0 Functional Description
The LM96063 Remote Diode Temperature Sensor with Inte-
grated Fan Control incorporates a ΔVBE-based temperature
sensor utilizing a Local or Remote diode and a 10-bit plus sign
ΔΣ ADC (Delta-Sigma Analog-to-Digital Converter). The
pulse-width modulated (PWM) open-drain output, with a pull-
up resistor, is driven by a 12-point temperature to duty cycle
look-up table (LUT) and can directly drive a PWM input of a
4-pin fan in order to modulate it's speed enabling optimum
system acoustic performance. The LM96063 LUT fan control
algorithm also includes a smoothing function that allows the
PWM duty cycle to gradually change over a programmed time
interval when switching from one level to the next in the LUT.
When running at a frequency of 22.5kHz the PWM output
resolution is 0.39%. The LM96063 includes a TACH input that
can measure the speed of a fan using the pulses from a 3 or
4 pin fan’s tachometer output. The LM96063 includes a smart-
tach measurement mode to accommodate the corrupted
tachometer pulses when using switching transistor power
drive to modulate the fan speed. The LM96063 has an
The LM96063 can measure a diode-connected transistor
such as the MMBT3904 or the thermal diode found in an FP-
GA, ASIC, Processor or any other device built on an SOI
process accurately. The LM96163 is identical to the LM96063
except the TruTherm BJT Beta compensation is included.
Thermal diode TruTherm BJT compensation circuitry is re-
quired when sensing thermal diodes mainly found in
22/45/65/90 nm conventional bulk CMOS non SOI processes.
The LM96063's two-wire interface is compatible with the SM-
Bus Specification 2.0 . For more information the reader is
directed to www.smbus.org.
In the LM96063 digital comparators are used to compare the
measured Local Temperature (LT) to the Local High Setpoint
user-programmable temperature limit register. The measured
Remote Temperature (RT) is digitally compared to the Re-
mote High Setpoint (RHS), the Remote Low Setpoint (RLS),
and the Remote T_CRIT Setpoint (RCS) user-programmable
temperature limits. An ALERT output will occur when the
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measured temperature is: (1) higher than either the High Set-
point or the T_CRIT Setpoint, or (2) lower than the Low
Setpoint. The ALERT Mask register allows the user to prevent
the generation of these ALERT outputs. A TCRIT output will
occur when the measured temperature is higher than the
T_CRIT Setpoint.
The three different ALERT modes and TCRIT function will be
discussed in the following sections.
1.2.1 ALERT Output as a Temperature Comparator
When the LM96063 is used in a system in which does not
require temperature-based interrupts, the ALERT output
could be used as a temperature comparator. In this mode,
once the condition that triggered the ALERT to go low is no
longer present, the ALERT is negated (Figure 1). For exam-
ple, if the ALERT output was activated by the comparison of
LT > LHS, when this condition is no longer true, the ALERT
will return HIGH. This mode allows operation without software
intervention, once all registers are configured during set-up.
In order for the ALERT to be used as a temperature com-
parator, the Comparator Mode bit in the Remote Diode Tem-
perature Filter and Comparator Mode Register must be
asserted. This is not the power-on default state.
The TCRIT function and the look-up table temperature hys-
teresis can be set separately. The hysteresis value associat-
ed with the TCRIT output is set in the Remote T_CRIT
Hysteresis Register. The value associated with the look-up
table function is set in the Lookup Table Hysteresis Register.
The LM96063 may be placed in a low power Standby mode
by setting the Standby bit found in the Configuration Register.
In the Standby mode continuous conversions are stopped. In
Standby mode the user may choose to allow the PWM output
signal to continue, or not, by programming the PWM Disable
in Standby bit in the Configuration Register.
The Local Temperature reading and setpoint data registers
are 8-bits wide. The format of the 11-bit remote temperature
data is a 16-bit left justified word. Two 8-bit registers, high and
low bytes, are provided for each setpoint as well as the tem-
perature reading. A digital filter may be invoked for remote
temperature readings that increases the resolution from 11-
bits to 13-bits. The temperature readings are also available in
an unsigned format allowing resolution above 127°C. Two
Remote Temperature Offset (RTO) Registers: High Byte and
Low Byte (RTOHB and RTOLB) may be used to correct the
temperature readings by adding or subtracting a fixed value
based on a different non-ideality factor and series resistance
of the thermal diode if different from the thermal diode found
in the Intel processors on 45 nm process. See section 3.4
DIODE NON-IDEALITY.
1.2 ALERT and TCRIT OUTPUTS
30029007
In this section we will address the ALERT and TCRIT active-
low open-drain output functions. When the ALERT Mask bit
in the Configuration register is written as zero the ALERT in-
terrupts are enabled.
FIGURE 1. ALERT Output as Temperature Comparator
Response Diagram
1.2.2 ALERT Output as an Interrupt
The LM96063's ALERT pin is versatile and can produce three
different methods of use to best serve the system designer:
(1) as a temperature comparator (2) as a temperature-based
interrupt flag, and (3) as part of an SMBus ALERT System.
The three methods of use are further described below. The
ALERT and interrupt methods are different only in how the
user interacts with the LM96063.
The LM96063's ALERT output can be implemented as a sim-
ple interrupt signal when it is used to trigger an interrupt
service routine. In such systems it is desirable for the interrupt
flag to repeatedly trigger during or before the interrupt service
routine has been completed. Under this method of operation,
during the read of the ALERT Status Register the LM96063
will set the ALERT Mask bit in the Configuration Register if
any bit in the ALERT Status Register is set, with the exception
of Busy and RDFA. This prevents further ALERT triggering
until the master has reset the ALERT Mask bit, at the end of
the interrupt service routine. The ALERT Status Register bits
are cleared only upon a read command from the master (see
Figure 2 ) and will be re-asserted at the end of the next con-
version if the triggering condition(s) persist(s). In order for the
ALERT to be used as a dedicated interrupt signal, the Com-
parator Mode bit in the Remote Diode Temperature Filter and
Comparator Mode Register must be set low. This is the pow-
er-on default state. The following sequence describes the
response of a system that uses the ALERT output pin as an
interrupt flag:
The remote temperature (RT) reading is associated with a
T_CRIT Setpoint Register, and both local and remote tem-
perature (LT and RT) readings are associated with a HIGH
setpoint register (LHS and RHS). The RT is also associated
with a LOW setpoint register (RLS). At the end of every tem-
perature reading a digital comparison determines whether
that reading is above its HIGH or T_CRIT setpoint or below
its LOW setpoint. If so, the corresponding bit in the ALERT
Status Register is set. If the ALERT mask bit is low, any bit
set in the ALERT Status Register, with the exception of Busy
or RDFA, will cause the ALERT output to be pulled low. Any
temperature conversion that is out of the limits defined in the
temperature setpoint registers will trigger an ALERT. Addi-
tionally, the ALERT Mask Bit must be cleared to trigger an
ALERT in all modes.
1. Master senses ALERT low.
2. Master reads the LM96063 ALERT Status Register to
determine what caused the ALERT.
The format of the Remote High limit and T_CRIT limit com-
parison is programmable. The USF bit found in the Enhanced
Configuration register controls whether comparisons use a
signed or unsigned format. The temperature format used for
Remote High and T_CRIT limit comparisons is +255.875 °C
to -256 °C.
3. LM96063 clears ALERT Status Register, resets the
ALERT HIGH and sets the ALERT Mask bit in the
Configuration Register.
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4. Master attends to conditions that caused the ALERT to
be triggered. The fan is started, setpoint limits are
adjusted, etc.
The following sequence describes the ARA response proto-
col.
1. Master senses SMBus alert line low
5. Master resets the ALERT Mask bit in the Configuration
Register.
2. Master sends a START followed by the Alert Response
Address (ARA) with a Read Command.
3. Alerting Device(s) send ACK.
4. Alerting Device(s) send their address. While transmitting
their address, alerting devices sense whether their
address has been transmitted correctly. (The LM96063
will reset its ALERT output and set the ALERT Mask bit
once its complete address has been transmitted
successfully.)
5. Master/slave NoACK
6. Master sends STOP
7. Master attends to conditions that caused the ALERT to
be triggered. The ALERT Status Register is read and fan
started, setpoints adjusted, etc.
8. Master resets the ALERT Mask bit in the Configuration
Register.
The ARA, 000 1100, is a general call address. No device
should ever be assigned to this address.
30029008
The ALERT Configuration bit in the Remote Diode Tempera-
ture Filter and Comparator Mode Register must be set low in
order for the LM96063 to respond to the ARA command.
FIGURE 2. ALERT Output as an Interrupt Temperature
Response Diagram
The ALERT output can be disabled by setting the ALERT
Mask bit in the Configuration Register. The power-on default
is to have the ALERT Mask bit and the ALERT Configuration
bit low.
1.2.3 ALERT Output as an SMBus ALERT
An SMBus alert line is created when the ALERT output is
connected to: (1) one or more ALERT outputs of other SMBus
compatible devices, and (2) to a master. Under this imple-
mentation, the LM96063's ALERT should be operated using
the ARA (Alert Response Address) protocol. The SMBus 2.0
ARA protocol, defined in the SMBus specification 2.0, is a
procedure designed to assist the master in determining which
part generated an interrupt and to service that interrupt.
The SMBus alert line is connected to the open-drain ports of
all devices on the bus, thereby AND'ing them together. The
ARA method allows the SMBus master, with one command,
to identify which part is pulling the SMBus alert line LOW. It
also prevents the part from pulling the line LOW again for the
same triggering condition. When an ARA command is re-
ceived by all devices on the bus, the devices pulling the
SMBus alert line LOW: (1) send their address to the master
and (2) release the SMBus alert line after acknowledgement
of their address.
The SMBus Specifications 1.1 and 2.0 state that in response
to and ARA (Alert Response Address) “after acknowledging
the slave address the device must disengage its ALERT pull-
down”. Furthermore, “if the host still sees ALERT low when
the message transfer is complete, it knows to read the ARA
again.” This SMBus “disengaging ALERT requirement pre-
vents locking up the SMBus alert line. Competitive parts may
address the “disengaging of ALERT” differently than the
LM96063 or not at all. SMBus systems that implement the
ARA protocol as suggested for the LM96063 will be fully com-
patible with all competitive parts.
30029009
FIGURE 3. ALERT Output as an SMBus ALERT
Temperature Response Diagram
1.2.4 TCRIT Function
The TCRIT output will be activated whenever the RCRIT bit
in the ALERT Status register is set. This occurs whenever the
remote temperature exceeds the value set by the Remote
T_CRIT Setpoint register. There is a hysteresis associated
with the T_CRIT Setpoint that is set by the value in the Re-
mote T_CRIT Hysteresis register. The RCRIT bit will be reset
when the remote temperature equals or is less than the value
defined by Remote T_CRIT Setpoint minus T_CRIT Hystere-
sis. The resolution of the comparison is 1 °C. For example if
T_CRIT = 110 °C and THYST = 5 °C the TCRIT output will
activate when the temperature reading is 111 °C and deacti-
vate when the temperature reading is 105 °C.
The LM96063 fulfills “disengaging of ALERT” by setting the
ALERT Mask Bit in the Configuration Register after sending
out its address in response to an ARA and releasing the
ALERT output pin. Once the ALERT Mask bit is activated, the
ALERT output pin will be disabled until enabled by software.
In order to enable the ALERT the master must read the
ALERT Status Register, during the interrupt service routine
and then reset the ALERT Mask bit in the Configuration Reg-
ister to 0 at the end of the interrupt service routine.
When the LM96063 powers up the T_CRIT limit is locked to
the default value. It may be changed after the T_CRIT Limit
www.ti.com
10
Override bit (TCRITOV) bit, found in the Configuration Reg-
ister, is set.
When the digital filter is enabled on the remote channel, tem-
perature data is represented by a 13-bit unsigned binary or
12-bit plus sign (two's complement) word with an LSb equal
to 0.03125°C.
The format of the Remote T_CRIT setpoint register is con-
trolled by the USF bit found in the Enhanced configuration
register. The temperature reading format used for the T_CRIT
comparisons is +255 °C to -256°C.
13-bit, 2's complement (12-bit plus sign)
Digital Data
Temperature
1.3 SMBus INTERFACE
Binary
Hex
Since the LM96063 operates as a slave on the SMBus the
SMBCLK line is an input and the SMBDAT line is bidirectional.
The LM96063 never drives the SMBCLK line and it does not
support clock stretching. According to SMBus specifications,
the LM96063 has a 7-bit slave address. All bits, A6 through
A0, are internally programmed and cannot be changed by
software or hardware.
+125°C
+25°C
0111 1101 0000 0000
0001 1001 0000 0000
0000 0001 0000 0000
0000 0000 0000 1000
0000 0000 0000 0000
1111 1111 1111 1000
1111 1111 0000 0000
1110 0111 0000 0000
1100 1001 0000 0000
7D00h
1900h
0100h
0008h
0000h
FFF8h
FF00h
E700h
C900h
+1°C
+0.03125°C
0°C
−0.03125°C
−1°C
The complete slave address is:
A6
1
A5
0
A4
0
A3
1
A2
1
A1
0
A0
0
−25°C
−55°C
1.4 POWER-ON RESET (POR) DEFAULT STATES
13-bit, unsigned binary
Digital Data
For information on the POR default states see Section 2.2
LM96063 Register Map in Functional Order.
Temperature
Binary
Hex
1.5 TEMPERATURE DATA FORMAT
+255.875°C
+255°C
+201°C
+125°C
+25°C
1111 1111 1110 0000
1111 1111 0000 0000
1100 1001 0000 0000
0111 1101 0000 0000
0001 1001 0000 0000
0000 0001 0000 0000
0000 0000 0000 1000
0000 0000 0000 0000
FFE0h
FF00h
C900h
7D00h
1900h
0100h
0008h
0000h
Temperature data can only be read from the Local and Re-
mote Temperature value registers. The data format for all
temperature values is left justified 16-bit word available in two
8-bit registers. Unused bits will always report "0". All temper-
ature data is clamped and will not roll over when a tempera-
ture exceeds full-scale value.
Remote temperature and remote high setpoint temperature
data can be represented by an 11-bit, two's complement word
or unsigned binary word with an LSb (Least Significant Bit)
equal to 0.125°C.
+1°C
+0.03125°C
0°C
Local Temperature and Remote T_CRIT setpoint data is rep-
resented by an 8-bit, two's complement, word with an LSb
equal to 1°C.
11-bit, 2's complement (10-bit plus sign)
Digital Data
Temperature
Binary
Hex
8-bit, 2's complement (7-bit plus sign)
+125°C
+25°C
+1°C
0111 1101 0000 0000
0001 1001 0000 0000
0000 0001 0000 0000
0000 0000 0010 0000
0000 0000 0000 0000
1111 1111 1110 0000
1111 1111 0000 0000
1110 0111 0000 0000
1100 1001 0000 0000
7D00h
1900h
0100h
0020h
0000h
FFE0h
FF00h
E700h
C900h
Digital Data
Temperature
Binary
Hex
7Dh
19h
01h
00h
FFh
E7h
C9h
+125°C
+25°C
+1°C
0111 1101
0001 1001
0000 0001
0000 0000
1111 1111
1110 0111
1100 1001
+0.125°C
0°C
−0.125°C
−1°C
0°C
−1°C
−25°C
−55°C
−25°C
−55°C
11-bit, unsigned binary
Digital Data
Remote T_CRIT setpoint data can also be represented by an
8-bit, unsigned, word with an LSb equal to 1°C.
Temperature
Binary
Hex
8-bit, unsigned binary
+255.875°C
+255°C
+201°C
+125°C
+25°C
1111 1111 1110 0000
1111 1111 0000 0000
1100 1001 0000 0000
0111 1101 0000 0000
0001 1001 0000 0000
0000 0001 0000 0000
0000 0000 0010 0000
0000 0000 0000 0000
FFE0h
FF00h
C900h
7D00h
1900h
0100h
0020h
0000h
Digital Data
Temperature
Binary
Hex
FFh
96h
7Dh
19h
01h
00h
+255°C
+150°C
+125°C
+25°C
+1°C
1111 1111
1001 0110
0111 1101
0001 1001
0000 0001
0000 0000
+1°C
+0.125°C
0°C
0°C
11
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1.6 OPEN-DRAIN OUTPUTS
conditions remote diode setpoint comparisons will use these
forced temperature values therefore other bits in the ALERT
Status Register may be set thus activating the ALERT or
TCRIT outputs unless these bits are masked. The function of
the ALERT and TCRIT is fully described in Section 1.2
ALERT and TCRIT OUTPUTS.
The SMBDAT, ALERT, TCRIT and PWM outputs are open-
drain outputs and do not have internal pull-ups. A “High” level
will not be observed on these pins until pull-up current is pro-
vided by an internal source, typically through a pull-up resis-
tor. Choice of resistor value depends on several factors but,
in general, the value should be as high as possible consistent
with reliable operation. This will lower the power dissipation
of the LM96063 and avoid temperature errors caused by self-
heating of the device. The maximum value of the pull-up
resistor to provide the 2.1 V high level is 88.7 kΩ.
1.8 COMMUNICATING WITH THE LM96063
Each data register in the LM96063 falls into one of four types
of user accessibility:
1. Read Only
2. Write Only
1.7 DIODE FAULT DETECTION
3. Read/Write same address
4. Read/Write different address
The LM96063 is equipped with operational circuitry designed
to detect remote diode fault conditions:
A Write to the LM96063 is comprised of an address byte and
a command byte. A write to any register requires one data
byte.
•
•
•
D+ shorted to VDD
D+ open or floating
D+ shorted to GND.
Reading the LM96063 Registers can take place after the req-
uisite register setup sequence takes place. See Section 2.1.1
LM96063 Required Initial Fan Control Register Sequence.
In the event that the D+ pin is grounded the Remote Temper-
ature reading is forced to –128.000 °C if signed format is read
and 0 °C if unsigned format is read. When the D+ pin is de-
tected as shorted to VDD or floating, the Remote Temperature
reading is forced to +127.000 °C if signed format is read and
+255.000 °C is unsigned format is read. In addition, the
ALERT Status register bit RDFA is set. Setting of the RDFA
bit will not cause ALERT or TCRIT to activate. Under fault
The data byte has the Most Significant Bit (MSB) first. At the
end of a read, the LM96063 can accept either Acknowledge
or No-Acknowledge from the Master. Note that the No-Ac-
knowledge is typically used as a signal for the slave indicating
that the Master has read its last byte.
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12
1.9 DIGITAL FILTER
In order to suppress erroneous remote temperature readings due to noise as well as increase the resolution of the temperature,
the LM96063 incorporates a digital filter for remote temperature readings. The filter is accessed in the Remote Diode Temperature
Filter and Comparator Mode Register. The filter can be set according to the following table.
RDTF[1:0]
Filter Setting
0
0
1
1
0
1
0
1
No Filter
Filter (equivalent to Level 2 filter of the LM86/LM89)
Reserved
Enhanced Filter (Filter with transient noise clipping)
Figure 4 describes the filter output in response to a step input and an impulse input.
a) Seventeen and fifty degree30s0t2e90p11
response
b) Impulse response with input
transients less than 4°C
c) Impulse response with in3p00u29t024
transients great than 4°C
30029052
FIGURE 4. Filter Impulse and Step Response Curves
13
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30029012
FIGURE 5. The filter curves were purposely offset for clarity.
Figure 5 shows the filter in use in a typical Intel processor on a 65/90 nm process system. Note that the two curves have been
purposely offset for clarity. Inserting the filter does not induce an offset as shown.
1.10 FAULT QUEUE
1.11 ONE-SHOT REGISTER
The LM96063 incorporates a Fault Queue to suppress erro-
neous ALERT triggering . The Fault Queue prevents false
triggering by requiring three consecutive out-of-limit HIGH or
LOW temperature readings. See Figure 6. The Fault Queue
defaults to OFF upon power-up and may be activated by set-
ting the RDTS Fault Queue bit in the Configuration Register
to a 1.
The One-Shot Register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the data returns to standby. This is not a data reg-
ister. A write operation causes the one-shot conversion. The
data written to this address is irrelevant and is not stored. A
zero will always be read from this register.
1.12 SERIAL INTERFACE RESET
In the event that the SMBus Master is reset while the
LM96063 is transmitting on the SMBDAT line, the LM96063
must be returned to a known state in the communication pro-
tocol. This may be done in one of two ways:
1. When SMBDAT is Low, the LM96063 SMBus state
machine resets to the SMBus idle state if either SMBDAT
or SMBCLK are held Low for more than 35 ms
(tTIMEOUT). Devices are to timeout when either the
SMBCLK or SMBDAT lines are held Low for 25 ms – 35
ms. Therefore, to insure a timeout of devices on the bus,
either the SMBCLK or the SMBDAT line must be held
Low for at least 35 ms.
2. With both SMBDAT and SMBCLK High, the master can
initiate an SMBus start condition with a High to Low
transition on the SMBDAT line. The LM96063 will
respond properly to an SMBus start condition at any point
during the communication. After the start the LM96063
will expect an SMBus Address address byte.
30029013
FIGURE 6. Fault Queue Temperature Response Diagram
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14
2.0 LM96063 Registers
The following pages include: Section 2.1, a Register Map in Hexadecimal Order, which shows a summary of all registers and their
bit assignments, Section 2.2, a Register Map in Functional Order, and Section 2.3, a detailed explanation of each register. Do not
address the unused or manufacturer’s test registers.
2.1 LM96063 REGISTER MAP IN HEXADECIMAL ORDER
The following is a Register Map grouped in hexadecimal address order. Some address locations have been left blank to maintain
compatibility with LM86, LM63 and LM64. Addresses in parenthesis are mirrors of “Same As” address for backwards compatibility
with some older software. Reading or writing either address will access the same 8-bit register.
DATA BITS
Register R/ POR
Register Name
0x[HEX]
W
Val
D7
D6
D5
D4
D3
D2
D1
D0
00
R
Local Temperature
(Signed MSB)
LT7
SIGN
LT6
64
LT5
32
LT4
16
LT3
8
LT2
4
LT1
2
LT0
1
–
01
R
R
Rmt Temp MSB
RT12
SIGN
RT11
64
RT10
32
RT9
16
RT8
8
RT7
4
RT6
2
RT5
1
–
02
03
ALERT Status
Configuration
BUSY
LHIGH
STBY
0
RHIGH
0
RLOW
0
RDFA
RCRIT
TACH
–
00
R/
W
ALTMSK
PWMDIS
TCHEN TCRITO FLTQUE
V
04
05
R/
W
08
46
Conversion Rate
Local High Setpoint
[Reserved]
0
0
0
0
CONV3 CONV2 CONV1
CONV0
R/
W
LHS7
SIGN
LHS6
64
LHS5
32
LHS4
16
LHS3
8
LHS2
4
LHS1
2
LHS0
1
06
07
Not Used
R/
W
69
Rmt High Setpoint RHS10
RHS9
64
RHS8
32
RHS7
16
RHS6
8
RHS5
4
RHS4
2
RHS3
1
MSB
SIGN
/128
08
R/
W
00
00
08
46
Rmt Low Setpoint
MSB
RLS10
SIGN
RLS9
64
RLS8
32
RLS7
16
RLS6
8
RLS5
4
RLS4
2
RLS3
1
(09)
(0A)
(0B)
R/
W
Same as 03
Same as 04
Same as 05
ALTMSK
STBY
PWMDIS
0
0
TCHEN TCRITO FLTQUE
V
R/
W
0
0
0
0
CONV3 CONV2 CONV1
CONV0
R/
W
LHS7
SIGN
LHS6
64
LHS5
32
LHS4
16
LHS3
8
LHS2
4
LHS1
2
LHS0
1
0C
R
00
69
[Reserved]
Not Used
(0D)
R/
W
Same as 07
RHS10
SIGN
/128
RHS9
64
RHS8
32
RHS7
16
RHS6
8
RHS5
4
RHS4
2
RHS3
1
(0E)
R/
W
00
Same as 08
One Shot
RLS10
SIGN
RLS9
64
RLS8
32
RLS7
16
RLS6
8
RLS5
4
RLS4
2
RLS3
1
0F
10
W
R
Write Only. Write command triggers one temperature conversion cycle.
–
–
Rmt Temp LSB
(Dig Filter On or Reg
45h STFBE bit set)
RT4
RT3
RT2
RT1
1/16
RT0
1/32
0
0
0
½
¼
⅛
Rmt Temp LSB
(Dig Filter Off)
0
0
11
12
13
R/
W
00
00
00
Rmt Temp Offset
MSB
RTO10
SIGN
RTO9
64
RTO8
32
RTO7
16
RTO7
8
RTO5
4
RTO4
2
RTO3
1
R/
W
Rmt Temp Offset
LSB
RTO2
½
RHS2
½
RTO1
¼
RHS1
¼
RTO0
⅛
RHS0
⅛
0
0
0
0
0
R/
W
Rmt High Setpoint
LSB
0
0
0
0
0
15
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DATA BITS
Register R/ POR
Register Name
0x[HEX]
W
Val
D7
RLS2
½
D6
RLS1
¼
D5
RLS0
⅛
D4
D3
D2
D1
D0
14
R/
W
00
Rmt Low Setpoint
LSB
0
0
0
0
0
15
16
R
00
A4
[Reserved]
Not Used
R/
W
ALERT Mask
1
LHAM
1
RHAM
RLAM
1
RTAM
TCHAM
17-18
19
R
00
6E
[Reserved]
Not Used
R/
W
Rmt T_CRIT
Setpoint
RCS7
SIGN
/128
RCS6
64
RCS5
32
RCS4
16
RCS3
8
RCS2
4
RCS1
2
RCS0
1
1A–20
21
R
00
0A
[Reserved]
Not Used
R/
W
Rmt T_CRIT
Hysteresis
RTH7
0
RTH6
64
RTH5
32
RTH4
16
RTH3
8
RTH2
4
RTH1
2
RTH0
1
22–2F
30
R
R
R
00
00
–
[Reserved]
[Reserved]
Not Used
0
0
0
0
0
0
0
0
31
Rmt Temp U-S MSB RTU12
128
RTU11
64
RTU10
32
RTU9
16
RTU8
8
RTU7
4
RTU6
2
RTU5
1
32
R
Rmt Temp U-S LSB RTU4
RTU3
RTU2
RTU1
1/16
RTU0
1/32
0
0
0
–
Dig Filter On
½
¼
⅛
Rmt Temp U-S LSB
Dig Filter Off
0
0
33
34–44
45
R
R
-
POR Status
[Reserved]
NR
0
0
0
0
0
0
0
0
00
00
Not Used
R/
W
Enhanced Config
STFBE
LRES
PHR
USF
RRS1
RRS0
PSRR
46
47
48
R
R
Tach Count LSB
Tach Count MSB
Tach Limit LSB
TAC5
TAC13
TACL5
TAC4
TAC12
TACL4
TAC3
TAC11
TACL3
TAC2
TAC10
TACL2
TAC1
TAC9
TAC0
TAC8
TEDGE1 TEDGE0
TAC7 TAC6
–
–
R/
W
FF
TACL1
TACL0 Not Used Not Used
0
-
49
4A
R/
W
FF
20
Tach Limit MSB
TACL13 TACL12 TACL11 TACL10 TACL9
TACL8
0
TACL7
TACL6
R/
W
PWM and RPM
Config
0
0
0
0
PWPGM PWOP PWCKSL
TACH1
TACH0
4B
R/
W
3F Fan Spin-Up Config
SPINUP SPNDTY SPNDTY SPNTIM SPNTIM1 SPNTIM0
1
0
2
4C
R/
W
00
17
PWM Value
HPWVAL HPWVAL PWVAL5 PWVAL4 PWVAL3 PWVAL2 PWVAL1 PWVAL0
7
0
6
0
4D
R/
W
PWM Frequency
0
PWMF4 PWMF3 PWMF2 PWMF1 PWMF0
4E
R/
W
00 Lookup Table Temp
Offset
0
0
0
0
TO5
32
TO4
16
TO3
8
TO2
4
TO1
2
TO0
1
4F
R/
W
04
Lookup Table
Hysteresis
0
LOOKH4 LOOKH3 LOOKH2 LOOKH1 LOOKH0
16
8
4
2
1
50–67
R/ 3F, 7F
W
Lookup Table
Lookup Table of up to 12 PWM (3F) and Temp Pairs in 8-bit Registers (7F)
68–BE
BF
R
00
00
[Reserved]
Not Used
R/
W
Rmt Diode Temp
Filter
0
0
0
0
0
RDTF1
RDTF0 ALT/CMP
C0–FD
FE
R
R
R
00
01
49
[Reserved]
Not Used
Manufacturer’s ID
Step/Die Rev. ID
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
1
FF
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16
2.2 LM96063 REGISTER MAP IN FUNCTIONAL ORDER
The following is a Register Map grouped in Functional Order. Some address locations have been left blank to maintain compatibility
with LM86. Addresses in parenthesis are mirrors of named address. Reading or writing either address will access the same 8-bit
register. The Fan Control and Configuration Registers are listed first, as there is a required order to setup these registers first and
then setup the others. The detailed explanations of each register will follow the order shown below. POR = Power-On-Reset.
Register
[HEX]
POR Default
[HEX]
Register Name
Read/Write
FAN CONTROL REGISTERS
45
4A
4B
4D
Enhanced Configuration
PWM and RPM Configuration
R/W
R/W
R/W
R/W
00
20
3F
17
Fan Spin-Up Configuration
PWM Frequency
Read Only
(R/W if Override Bit is Set)
4C
PWM Value
00
4E
4F
Lookup Table Temperature Offset
Lookup Table Hysteresis Temperature
Lookup Table
R/W
R/W
R/W
00
04
50–67
See Table
CONFIGURATION REGISTER
03 (09) Configuration
R/W
00
TACHOMETER COUNT AND LIMIT REGISTERS
46
47
48
49
Tach Count LSB
Tach Count MSB
Tach Limit LSB
Tach Limit MSB
Read Only
Read Only
R/W
N/A
N/A
FF
R/W
FF
LOCAL TEMPERATURE AND LOCAL SETPOINT REGISTERS
00 Local Temperature
Read Only
R/W
N/A
05 (0B) Local High Setpoint
46 (70°)
REMOTE DIODE TEMPERATURE AND SETPOINT REGISTERS
01
10
31
32
11
12
Remote Temperature Signed MSB
Remote Temperature Signed LSB
Remote Temperature Unsigned MSB
Remote Temperature Unsigned LSB
Remote Temperature Offset MSB
Remote Temperature Offset LSB
Read Only
Read Only
Read Only
Read Only
R/W
N/A
N/A
N/A
N/A
00
R/W
00
07 (0D) Remote High Setpoint MSB
13 Remote High Setpoint LSB
08 (0E) Remote Low Setpoint MSB
R/W
69 (105°C)
00
R/W
R/W
00 (0°C)
00
14
19
21
BF
Remote Low Setpoint LSB
R/W
Remote T_CRIT Setpoint
R/W
6E (110°C)
0A (10°C)
00
Remote T_CRIT Hyst
R/W
Remote Diode Temperature Filter and Comparator Mode
R/W
CONVERSION AND ONE-SHOT REGISTERS
04 (0A) Conversion Rate
R/W
08
0F
One-Shot
Write Only
N/A
STATUS AND MASK REGISTERS
02
16
33
ALERT Status
Read Only
R/W
N/A
A4
ALERT Mask
Power On Reset Status
Read Only
N/A
ID AND TEST REGISTERS
FE
FF
Manufacturer ID
Read Only
Read Only
01
49
Stepping/Die Rev. ID
17
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Register
[HEX]
POR Default
[HEX]
Register Name
Read/Write
[RESERVED] REGISTERS—NOT USED
06
0C
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
Not Used
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
15
17-18
1A–20
22–29
34–44
68–BE Not Used
C0–FD Not Used
2.3 LM96063 REQUIRED INITIAL FAN CONTROL REGISTER SEQUENCE
Important! The BIOS or firmware must follow the sequence below to configure the following Fan Registers for the LM96063 before
using any of the Fan or Tachometer or PWM registers:
Step
[Register]HEX and Setup Instructions
1
2
After power up check to make sure that the Not Ready bit is cleared in the POR Status register [33] bit 7.
[4A] Write bits 0 and 1; 3 and 4. This includes tach settings if used, PWM internal clock select (1.4 kHz or 360 kHz) and
PWM Output Polarity.
3
4
[4B] Write bits 0 through 5 to program the spin-up settings.
[4D] Write bits 0 through 4 to set the frequency settings. This works with the PWM internal clock select. If 22.5 kHz is
selected then enhanced fan control functions such as Lookup Table transition smoothing with extended PWM duty cycle
resolution is available and should be setup [45].
5
Choose, then write, only one of the following:
A. [4F–67] the Lookup Table and [4E] the Lookup Table Offset, [45] Lookup Table Temperature Resolution can also be
modified
or
B. [4C] the PWM value bits 0 through 5 or bits 0 through 7 if extended duty cycle resolution is selected.
6
If Step 4A, Lookup Table, was chosen and written then write [4A] bit 5 PWPGM = 0. PWPGM should be set to 1 to enable
writing to the fan control registers listed in this table.
All other registers can be written at any time after the above sequence.
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18
2.4 LM96063 DETAILED REGISTER DESCRIPTIONS IN FUNCTIONAL ORDER
The following is a Register Map grouped in functional and sequence order. New register addresses have been added to maintain
compatibility with the LM63 and LM64 register sets. Addresses in parenthesis are mirrors of named address for backwards com-
patibility with some older software. Reading or writing either address will access the same 8-bit register.
Fan Control Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
45HEX ENHANCED CONFIGURATION
R
7
6
0
[Reserved]
STFBE
This bit is unused and always read as 0.
Signed Temperature Filter Bits Enable
0: external signed temperature LSbs [4:3] will always read "0" (backwards
compatible with the LM63)
R/W
0
1: when the digital filter is enabled the external signed temperature LSbs [4:3]
(1/16 and 1/32 resolution) are enabled
Lookup Table Resolution Extension
0: LUT temperature resolution 7-bits (LSb = 1°C, backwards compatible with the
LM63)
1: enable 8-bit LUT temperature resolution (LSb extended to 0.5°C)
R/W
R/W
5
4
0
0
LRES
PHR
22.5kHz PWM High Resolution Control (only effective when PWM frequency set
to 22.5kHz)
0: PWM resolution 6.25% (backwards compatible with the LM63)
1: enable high resolution (0.39%)
Unsigned High and T_CRIT Setpoint Format
0: enable signed format for High and T_CRIT setpoints (11-bit is -128.000°C to
127.875°C or 8-bit is -128°C to 127°C)
R/W
3
0
USF
1: enable unsigned format for High and T_CRIT setpoints (11-bit is 0°C to
255.875°C or 8-bit is 0°C to 255°C)
45
PWM Smoothing Ramp Rate Setting (these bits can modified only when PWM
Programming is enabled, 0x4A[5]=1)
00: 0.023 s per step (5.45 seconds for 0 to 100% duty cycle transition with 0.39%
resolution)
01: 0.046 s per step (10.9 seconds for 0 to 100% duty cycle transition with 0.39%
resolution)
R/W
2:1
00
RRS1:RRS0
10: 0.91 s per step (21.6 seconds for 0 to 100% duty cycle transition with 0.39%
resolution)
11: 0.182 s per step (43.7 seconds for 0 to 100% duty cycle transition with 0.39%
resolution)
Note: PWM smoothing is disabled for PWM spinup and for duty cycle setting
override caused by a TCRIT event, thus it is only enabled during LUT transitions.
PWM smoothing is only effective when PWM frequency is set to 22.5kHz.
PWM Smoothing Ramp Rate Control (this bit can modified only when the PWM
Programming is enabled, 0x4A[5]=1)
0: PWM smoothing disabled (LM63 backwards compatible)
R/W
0
0
PSRR
1: enable ramp rate control (as controlled by 0x45[2:1])
Note: PWM smoothing is disabled for PWM spinup and for duty cycle setting
override caused by a TCRIT event, thus it is only enabled during LUT transitions.
PWM smoothing is only effective when PWM frequency is set to 22.5kHz
19
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Address Read/
POR
Value
Bits
Name
Description
Hex
Write
4AHEX FAN PWM AND TACHOMETER CONFIGURATION REGISTER
R
7:6
00
[Reserved]
These bits are unused and always read as 0.
PWM Programming enable
0: the PWM Value (register 0x4C), the PWM Smoothing (0x45[2:0]) and the
Lookup Table (Registers 0x50–0x67) are read-only. The PWM value (0 to 100%)
is determined by the current remote diode temperature and the Lookup Table,
and can be read from the PWM value register.
5
1
PWPGM
1: the PWM value (register 0x4C), the PWM Smoothing (0x45[2:0]) and the
Lookup Table (Registers 0x50–0x67) are read/write enabled. Writing the PWM
Value register will set the PWM output. This is also the state during which the
Lookup Table can be written.
PWM Output Polarity
4
0
PWOP
0: the PWM output pin will be 0V for fan OFF and open for fan ON.
1: the PWM output pin will be open for fan OFF and 0V for fan ON.
PWM Master Clock Select
3
2
0
0
PWCLSL
0: the master PWM clock is 360 kHz
1: the master PWM clock is 1.4 kHz.
[Reserved]
Always write 0 to this bit.
4A
R/W
Tachometer Mode
00: Traditional tach input monitor, false readings when under minimum
detectable RPM. (Smart-TACH mode disabled)
01: Traditional tach input monitor, FFFFh reading when under minimum
detectable RPM. Smart-TACH mode enabled, PWM duty cycle not affected. Use
with direct PWM drive of fan power. TACH readings can cause an error event if
TACH setpoint register is set to less than FFFFh even though fan may be
spinning properly.
1:0
00
TACH1:TACH0 10: Most accurate readings, FFFFh reading when under minimum detectable
RPM. Smart-TACH mode enabled, PWM duty cycle modified. Use with direct
PWM drive of fan power. This mode extends the TACH monitoring low RPM
sensitivity.
11: Least effort on programmed PWM of fan, FFFF reading when under minimum
detectable RPM. Smart-TACH mode enabled. Use with direct PWM drive of fan
power. This mode extends the TACH monitoring low RPM sensitivity the most.
Note: If the PWM Master Clock is 360 kHz, mode 00 is used regardless of the
setting of these two bits.
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20
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
4BHEX FAN SPIN-UP CONFIGURATION REGISTER
R
7:6
0
[Reserved]
These bits are unused and always read as 0
Fast Tachometer Spin-up
If 0, the fan spin-up uses the duty cycle and spin-up time, bits 0–4.
If 1, the LM96063 sets the PWM output to 100% until the spin-up times out (per
bits 0–2) or the minimum desired RPM has been reached (per the Tachometer
Setpoint setting) using the tachometer input, whichever happens first. This bit
overrides the PWM Spin-Up Duty Cycle register (bits 4:3)—PWM output is
always 100%. Register x03, bit 2 = 1 for Tachometer mode.
If PWM Spin-Up Time (bits 2:0) = 000, the Spin-Up cycle is bypassed, regardless
of the state of this bit.
5
1
SPINUP
PWM Spin-Up Duty Cycle
00: Spin-Up cycle bypassed (no Spin-Up), unless Fast Tachometer Terminated
4B
SPNDTY1:SPNDT Spin-Up (bit 5) is set.
R/W
4:3
11
Y0
01: 50%
10: 75%–81% Depends on PWM Frequency. See Applications Notes.
11: 100%
PWM Spin-Up Time Interval
000: Spin-Up cycle bypassed (No Spin-Up)
001: 0.05 seconds
010: 0.1 s
011: 0.2 s
SPNTIM2:SPNTIM
0
2:0
111
100: 0.4 s
101: 0.8 s
110: 1.6 s
111: 3.2 s
4CHEX PWM VALUE REGISTER
HPWVAL7:HPWV PWM High Resolution and Low Resolution Values
AL6 If PWM Program (register 4A, bit 5) = 0 this register is read only, this register
7:6
00
Read
(Write
only if
reg 4A
bit
reflects the LM96063’s current PWM value from the Lookup Table.
If PWM Program (register 4A, bit 5) = 1, this register is read/write and the desired
PWM value is written directly to this register, instead of from the Lookup Table,
for direct fan speed control.
4C
5:0 0x00 PWVAL5:PWVAL0
This register will read 0 during the Spin-Up cycle.
See Application Notes section at the end of this datasheet for more information
regarding the PWM Value and Duty Cycle in %.
5 = 1.)
4DHEX FAN PWM FREQUENCY REGISTER
R
7:5
000
[Reserved]
These bits are unused and always read as 0
PWM Output Frequency
The PWM Frequency = PWM_Clock / 2n, where PWM Master Clock = 360 kHz
4D
R/W
4:0 0x17
PWMF4:PWMF0 or 1.4 kHz (per the PWM Master Clock Select bit in Register 4A), and n = value
of the register. Note: n = 0 is mapped to n = 1. See the Application Note at the
end of this datasheet.
4EHEX LOOKUP TABLE TEMPERATURE OFFSET
R
7:6
00
[Reserved]
TO5:TO0
These bits are unused and always read as 0.
The temperature offset applied to the temperature values of the lookup table.
This offset allows the lookup table temperature settings to be extended above
127°C. The value, which is always positive, has an unsigned format with 1°C
resolution. The maximum offset that can be programmed is +63°C.
4E
R/W
5:0 0x00
4FHEX LOOKUP TABLE HYSTERESIS
R
7:5
000
[Reserved]
These bits are unused and always read as 0
Lookup Table Hysteresis
4F
R/W
4:0 0x04 LOOKH4:LOOKH0 The amount of hysteresis applied to the Lookup Table. (1 LSb = 1°C, max value
31°C, default value 10°C).
21
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Address Read/
POR
Value
Bits
Name
Description
Hex
Write
50HEX to 67HEX LOOKUP TABLE (7/8 Bits for Temperature and 6/8 Bits for PWM for each Temperature/PWM Pair)
7
0
E1T7
Lookup Table Temperature Entry 1
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x51. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
50
51
52
53
6:0 0x7F
E1T6:E1T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 1
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x50. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E1D7:E1D6
Lookup Table PWM Duty Cycle Entry 1
The PWM value corresponding to the temperature limit in register 0x50 for the
low resolution PWM mode.
5:0 0x3F
E1D5:E1D0
E2T7
7
0
Lookup Table Temperature Entry 2
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x53. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E2T6:E2T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 2
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x52. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E2D7:E2D6
E2D5:E2D0
Lookup Table PWM Duty Cycle Entry 2
The PWM value corresponding to the temperature limit in register 0x52 for the
low resolution PWM mode.
5:0 0x3F
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22
Address Read/
POR
Value
Bits
Name
Description
Lookup Table Temperature Entry 3
Hex
Write
7
0
E3T7
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x55. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
54
6:0 0x7F
E3T6:E3T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 3
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x54. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E3D7:E3D6
55
56
57
Lookup Table PWM Duty Cycle Entry 3
The PWM value corresponding to the temperature limit in register 0x54 for the
low resolution PWM mode.
5:0 0x3F
E3D5:E3D0
E4T7
7
0
Lookup Table Temperature Entry 4
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x57. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E4T6:E4T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 4
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x56. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E4D7:E4D6
E4D5:E4D0
Lookup Table PWM Duty Cycle Entry 4
The PWM value corresponding to the temperature limit in register 0x56 for the
low resolution PWM mode.
5:0 0x3F
23
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Address Read/
POR
Value
Bits
Name
Description
Lookup Table Temperature Entry 5
Hex
Write
7
0
E5T7
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x59. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
58
6:0 0x7F
E5T6:E5T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 5
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x58. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E5D7:E5D6
59
5A
5B
Lookup Table PWM Duty Cycle Entry 5
The PWM value corresponding to the temperature limit in register 0x58 for the
low resolution PWM mode.
5:0 0x3F
E5D5:E5D0
E6T7
7
0
Lookup Table Temperature Entry 6
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x5B. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E6T6:E6T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 6
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x5A. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E6D7:E6D6
E6D5:E6D0
Lookup Table PWM Duty Cycle Entry 6
The PWM value corresponding to the temperature limit in register 0x5A for the
low resolution PWM mode.
5:0 0x3F
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24
Address Read/
POR
Value
Bits
Name
Description
Lookup Table Temperature Entry 7
Hex
Write
7
0
E7T7
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x5D. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
5C
6:0 0x7F
E7T6:E7T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 7
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x5C. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E7D7:E7D6
5D
5E
5F
Lookup Table PWM Duty Cycle Entry 7
The PWM value corresponding to the temperature limit in register 0x5C for the
low resolution PWM mode.
5:0 0x3F
E7D5:E7D0
E8T7
7
0
Lookup Table Temperature Entry 8
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x5F. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E8T6:E8T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 8
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x5E. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E8D7:E8D6
E8D5:E8D0
Lookup Table PWM Duty Cycle Entry 8
The PWM value corresponding to the temperature limit in register 0x5E for the
low resolution PWM mode.
5:0 0x3F
25
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Address Read/
POR
Value
Bits
Name
Description
Lookup Table Temperature Entry 9
Hex
Write
7
0
E9T7
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x61. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
60
6:0 0x7F
E9T6:E9T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 9
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x60. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E9D7:E9D6
61
62
63
Lookup Table PWM Duty Cycle Entry 9
The PWM value corresponding to the temperature limit in register 0x60 for the
low resolution PWM mode.
5:0 0x3F
E9D5:E9D0
E10T7
7
0
Lookup Table Temperature Entry 10
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x63. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E10T6:E10T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 10
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x62. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E10D7:E10D6
E10D5:E10D0
Lookup Table PWM Duty Cycle Entry 10
The PWM value corresponding to the temperature limit in register 0x62 for the
low resolution PWM mode.
5:0 0x3F
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26
Address Read/
POR
Value
Bits
Name
Description
Lookup Table Temperature Entry 11
Hex
Write
7
0
E11T7
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x65. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
64
6:0 0x7F
E11T6:E11T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 11
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x64. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E11D7:E11D6
65
66
67
Lookup Table PWM Duty Cycle Entry 11
The PWM value corresponding to the temperature limit in register 0x64 for the
low resolution PWM mode.
5:0 0x3F
E11D5:E11D0
E12T7
7
0
Lookup Table Temperature Entry 12
Bit 7 is unused and always set to 0 in the low resolution temperature LUT mode.
In the high resolution temperature LUT mode bit 7 in conjunction with bits 6:0 of
this register are used to determine the limit temperature that the remote diode
temperature is compared to. In high resolution the range is 0°C to 127.5°C. In
low resolution mode the range is 0°C to 127°C. If the remote diode temperature
exceeds this value, the PWM output will be the value in Register 0x67. Only 9-
bits of the temperature reading are used in high resolution and 8-bits in low
resolution. Only positive temperature values can be programed in this register
and in all cases the sign bit is assumed to be zero. Temperatures greater than
127 °C or 127.5 °C can be programmed through the use of the Lookup Table
Temperature Offset Register (4Eh).
6:0 0x7F
E12T6:E12T0
Read.
(Write
only if
reg 4A
bit
Lookup Table PWM Duty Cycle Extended Entry 12
5 = 1)
These bits are unused and always set to 0 in the low resolution duty cycle LUT
mode. In the high resolution duty cycle LUT mode these bits in association with
bits 5:0 of this register are used for the PWM value associated with the
temperature limit in register 0x66. These bits can only be activated when PWM
frequency of 22.5kHz is chosen.
7:6
00
E12D7:E12D6
E12D5:E12D0
Lookup Table PWM Duty Cycle Entry 12
The PWM value corresponding to the temperature limit in register 0x66 for the
low resolution PWM mode.
5:0 0x3F
27
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Configuration Register
Address Read/
POR
Value
03 (09)HEX CONFIGURATION REGISTER
Bits
Name
Description
Hex
Write
ALERT Mask
0: ALERT interrupts are enabled.
1: ALERT interrupts are masked, and the ALERT pin is always in a high
impedance (open) state.
7
6
0
ALTMSK
Standby
0: the LM96063 is in operational mode, converting, comparing, and updating the
PWM output continuously.
1: the LM96063 enters a low power standby mode.
In standby, continuous conversions are stopped, but a conversion/comparison
cycle may be initiated by writing any value to register 0x0F the One-shot Register.
Operation of the PWM output in standby depends on the setting of bit 5 in this
register.
0
STBY
R/W
PWM Disable in Standby
0: the LM96063’s PWM output continues to output the current fan control signal
5
0
PWMDIS
while in STANDBY.
1: the PWM output is disabled (as defined by the PWM polarity bit) while in
STANDBY.
03 (09)
R
4:3
2
00
0
[Reserved]
TCHEN
This bit is unused and always read as 0.
TACH Enable
0: disables the TACH input
1: enables the TACH input
T_CRIT Limit Override
1
0
0
0
TCRITOV
FLTQUE
0: locks the T_CRIT limit for the remote diode, POR setting is nominally 110°C
1: unlocks the T_CRIT limit and allows it to be reprogrammed multiple times
R/W
RDTS Fault Queue
0: an ALERT will be generated if any Remote Diode conversion result is above
the Remote High Set Point or below the Remote Low Setpoint.
1: an ALERT will be generated only if three consecutive Remote Diode
conversions are above the Remote High Set Point or below the Remote Low
Setpoint.
Tachometer Count and Limit Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
47HEX TACHOMETER COUNT (MSB) and 46HEX TACHOMETER COUNT (LSB) REGISTERS (16 bits: Read LSB first to lock MSB
and ensure MSB and LSB are from the same reading)
47
R
7:0
N/A
TAC13:TAC6
Tachometer Count (MSB and LSB)
These registers contain the current 16-bit Tachometer Count, representing the
period of time between tach pulses.
Note that the 16-bit tachometer MSB and LSB register addresses are in reverse
order from the 16 bit temperature readings.
R
7:2
N/A
TAC5:TAC0
Tachometer Edge Programming
Bits
00:
01:
10:
11:
Edges Used
Tach_Count_Multiple
Reserved - do not use
46
2
3
5
4
2
1
R
1:0
00
TEDGE1:TEDGE0
Note: If PWM_Clock_Select = 360 kHz, then Tach_Count_Multiple = 1
regardless of the setting of these bits.
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28
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
49HEX TACHOMETER LIMIT (MSB) and 48HEX TACHOMETER LIMIT (LSB) REGISTERS
49
R/W 7:0 0xFF
TACL13:TACL6 Tachometer Limit (MSB and LSB)
These registers contain the current 14-bit Tachometer Count, representing the
period of time between tach pulses. Fan RPM = (f * 5,400,000) / (Tachometer
Count), where f = 1 for 2 pulses/rev fan; f = 2 for 1 pulse/rev fan; and f = 2/3 for
3 pulses/rev fan. See the Applications Notes section for more tachometer
information. Note that the 16-bit tachometer MSB and LSB register addresses
are in reverse order from the 16 bit temperature readings.
R/W 7:2
0xFF
TACHL5:TACL0
48
R/W 1:0
[Reserved]
These bits are not used and write 0 or 1.
Local Temperature and Local High Setpoint Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
00HEX LOCAL TEMPERATURE REGISTER (8-bits)
Local Temperature Reading (8-bit)
8-bit integer representing the temperature of the LM96063 die.
LT7 is the SIGN bit
LT6 has a bit weight of 64°C
LT5 has a bit weight of 32°C
LT4 has a bit weight of 16°C
LT3 has a bit weight of 8°C
00
R
7:0
N/A
LT7:LT0
LT2 has a bit weight of 4°C
LT1 has a bit weight of 2°C
LT0 has a bit weight of 1°C
05 (0B)HEX LOCAL HIGH SETPOINT REGISTER (8-bits)
Local HIGH Setpoint
High Setpoint for the internal diode.
LHS7 is the SIGN bit
LHS6 has a bit weight of 64°C
LHS5 has a bit weight of 32°C
LHS4 has a bit weight of 16°C
LHS3 has a bit weight of 8°C
LHS2 has a bit weight of 4°C
LHS1 has a bit weight of 2°C
LHS0 has a bit weight of 1°C
0x46
(70°)
05
R/W
7:0
LHS7:LHS0
Remote Diode Temperature, Offset and Setpoint Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
01HEX AND 10HEX SIGNED REMOTE DIODE TEMPERATURE REGISTERS
Most Significant Byte of the Signed Remote Diode Temperature Reading
The most significant 8-bits of the 2’s complement value, representing the
temperature of the remote diode connected to the LM96063. Bit 7 is the sign
bit, bit 6 has a weight of 64°C, and bit 0 has a weight of 1°C. This byte to be
read before the LSB.
01
R
7:0
N/A
RT12:RT5
29
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Address Read/
POR
Value
Bits
Name
Description
Hex
Write
Least Significant Byte of the Signed Remote Diode Temperature Reading
This is the LSB of the 2’s complement value, representing the temperature of
the remote diode connected to the LM96063. RT4 has a weight 0.5°C, RT3 has
a weight of 0.25°C, and RT2 has a weight of 0.125°C. If the digital filter is turned
off RT1:RT0 have a value of 00 unless extended resolution (Reg 45h STFBE
bit set) is enabled. If extended resolution is chosen, for readings greater than
127.875 RT1:RT0=11 and for other cases RT1:RT0=00. When the digital filter
is turned on and extended resolution enabled: RT1 has a weight of 0.0625 and
RT0 has a weight of 0.03125°C
7:3
2:0
N/A
00
RT4:RT0
10
R
[Reserved]
These bits are unused and always read as 0.
31HEX AND 32HEX UNSIGNED REMOTE DIODE TEMPERATURE REGISTERS
Most Significant Byte of the Unsigned Format Remote Diode Temperature
Reading
The most significant 8-bits of the unsigned format value, representing the
temperature of the remote diode connected to the LM96063. Bit 7 has a weight
of 128°C, bit 6 has a weight of 64°C, and bit 0 has a weight of 1°C. This byte to
be read before the LSB.
31
32
R
R
7:0
N/A
RTU12:RTU5
Least Significant Byte of the Unsigned Format Remote Diode Temperature
Reading
This is the LSB of the unsigned value, representing the temperature of the
remote diode connected to the LM96063. Bit 4 has a weight 0.5°C, bit 3 has a
weight of 0.25°C, and bit 2 has a weight of 0.125°C. if the digital filter is turned
off RUT1:RUT0 have a value of 00. When the digital filter is turned on: bit 1 has
a weight of 0.0625 and bit 0 has a weight of 0.03125°C
7:3
2:0
N/A
00
RUT4:RUT0
[Reserved]
These bits are unused and always read as 0.
11HEX AND 12HEX REMOTE TEMPERATURE OFFSET REGISTERS
11
R/W 7:0 0x00
RTO10:RTO3
RTO2:RTO1
[Reserved]
Remote Temperature Offset (MSB and LSB)
These registers contain the value added to or subtracted from the remote
diode’s reading to compensate for the different non-ideality factors of different
processors, diodes, etc. The 2’s complement value, in these registers is added
to the output of the LM96063’s ADC to form the temperature reading contained
in registers 01 and 10. These registers have the same format as the MSB and
LSB Remote Diode Temperature Reading registers with the digital filter off.
R/W 7:5
000
12
R
4:0
000
These bits are not used and always read as 0.
07 (0D)HEX AND 13HEX REMOTE HIGH SETPOINT REGISTERS
0x69
R/W 7:0 (105°
C)
Remote HIGH Setpoint (MSB and LSB)
07 (0D)
13
RHS10:RHS3
High setpoint temperature for remote diode. Same format as Unsigned
Remote Temperature Reading (registers 31 and 32) or Signed Remote
Temperature Reading (registers 01 and 10) with the digital filter off. Is it
programmable by the USF bit found in the Enhanced configuration Register.
R/W 7:5
000
RHS2:RHS0
[Reserved]
R
4:0 0x00
These bits are not used and always read as 0.
08 (0E)HEX AND 14HEX REMOTE LOW SETPOINT REGISTERS
00
(0°C)
Remote LOW Setpoint (MSB and LSB)
Low setpoint temperature for remote diode. Same format as Signed Remote
Temperature Reading (registers 01 and 10) with the digital filter off.
08 (0E)
14
R/W 7:0
R/W 7:5
RTS10:RTS3
000
RTS2:RTS0
[Reserved]
R
4:0 0x00
These bits are not used and always read as 0.
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30
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
19HEX REMOTE DIODE T_CRIT SETPOINT REGISTER
Remote Diode T_CRIT Setpoint Limit
This 8-bit integer stores the T_CRIT limit and is nominally 110°C. The value of
this register can be locked by setting T_CRIT Limit Override (bit 1) in the
Configuration register to a 0, then programming a new T_CRIT value into this
register. The format of this register is programmable. When the USF bit in the
Enhanced Configuration register is cleared:
LCS7 is the SIGN bit
0x6E
R/W 7:0 (110°
C)
19
RCS7:RCS0
LCS6 has a bit weight of 64°C
LCS5 has a bit weight of 32°C
LCS4 has a bit weight of 16°C
LCS3 has a bit weight of 8°C
LCS2 has a bit weight of 4°C
LCS1 has a bit weight of 2°C
LCS0 has a bit weight of 1°C
21HEX T_CRIT HYSTERESIS REGISTER
7
RTH7
This bit is unused. OK to write 1 or 0.
Remote Diode T_CRIT Hysteresis
T_CRIT stays activated until the remote diode temperature goes below
[(T_CRIT Limit)—(T_CRIT Hysteresis)].
RTH6 has a bit weight of 64°C
RTH5 has a bit weight of 32°C
RTH4 has a bit weight of 16°C
0x0A
(10°C)
21
R/W
6:0
RTH6:RTH0
RTH3 has a bit weight of 8°C
RTH2 has a bit weight of 4°C
RTH1 has a bit weight of 2°C
RTH0 has a bit weight of 1°C
BFHEX REMOTE DIODE TEMPERATURE FILTER AND COMPARATOR MODE
R/W 7:6
00
[Reserved]
[Reserved]
These bits are unused and always write 0.
These bits are unused and always read as 0.
R
5:3
000
Remote Diode Temperature Filter Control
00: Filter Disabled
01: Filter Level 2 (minimal filtering, same as 10; Like LM63, LM63 Level 1 not
2:1
00
RDTF1:RDTF0 supported)
10: Filter Level 2 (minimal filtering, same as 01; like LM63, LM63 Level 1 not
BF
supported)
R/W
11: Filter Enhanced Level 2 (maximum filtering)
Comparator Mode
0: the ALERT pin functions normally.
1: the ALERT pin behaves as a comparator, asserting itself when an ALERT
condition exists, de-asserting itself when the ALERT condition goes away.
0
0
ALT/CMP
31
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ALERT Status and Mask Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
02HEX ALERT STATUS REGISTER (8-bits) (All Alarms are latched until read, then cleared if alarm condition was removed at
the time of the read.)
Busy
7
6
0
0
BUSY
0: the ADC is not converting.
1: the ADC is performing a conversion. This bit does not affect ALERT status.
Local High Alarm
0: the internal temperature of the LM96063 is at or below the Local High
Setpoint.
LHIGH
1: the internal temperature of the LM96063 is above the Local High Setpoint,
and an ALERT is triggered.
5
4
0
0
[Reserved]
RHIGH
This bit is unused and always read as 0.
Remote High Alarm
0: the temperature of the Remote Diode is at or below the Remote High Setpoint.
1: the temperature of the Remote Diode is above the Remote High Setpoint,
and an ALERT is triggered.
Remote Low Alarm
0: the temperature of the Remote Diode is at or above the Remote Low Setpoint.
1: the temperature of the Remote Diode is below the Remote Low Setpoint, and
an ALERT is triggered.
3
2
0
0
RLOW
RDFA
0x02
R
Remote Diode Fault Alarm
0: the Remote Diode appears to be correctly connected.
1: the Remote Diode may be disconnected or shorted to ground. This Alarm
does not trigger an ALERT or a TCRIT.
Remote T_CRIT Alarm
When this bit is a 0, the temperature of the Remote Diode is at or below the
T_CRIT Limit.
When this bit is a 1, the temperature of the Remote Diode is above the T_CRIT
Limit, ALERT and TCRIT are triggered.
1
0
0
0
RCRIT
TACH
Tach Alarm
When this bit is a 0, the Tachometer count is lower than or equal to the
Tachometer Limit (the RPM of the fan is greater than or equal to the minimum
desired RPM).
When this bit is a 1, the Tachometer count is higher than the Tachometer Limit
(the RPM of the fan is less than the minimum desired RPM), and an ALERT is
triggered.
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32
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
16HEX ALERT MASK REGISTER (8-bits)
R
R/W
R
7
6
5
4
1
0
1
0
[Reserved]
This bit is unused and always read as 1.
Local High Alarm Mask
0: a Local High Alarm event will generate an ALERT.
1: a Local High Alarm will not generate an ALERT
LHAM
[Reserved]
RHAM
This bit is unused and always read as 1.
Remote High Alarm Mask
0: Remote High Alarm event will generate an ALERT.
1: a Remote High Alarm event will not generate an ALERT.
R/W
R
Remote Low Alarm Mask
0: a Remote Low Alarm event will generate an ALERT.
1: a Remote Low Alarm event will not generate an ALERT.
16
3
2
1
0
1
0
RLAM
[Reserved]
RTAM
This bit is unused and always read as 1.
Remote T_CRIT Alarm Mask
0: a Remote T_CRIT event will generate an ALERT.
1: a Remote T_CRIT event will not generate an ALERT.
R/W
TACH Alarm Mask
0
0
TCHAM
When this bit is a 0, a Tach Alarm event will generate an ALERT.
When this bit is a 1, a Tach Alarm event will not generate an ALERT.
33HEX POWER ON RESET STATUS REGISTER
Power On Reset Status
7
NR
0: Power On Reset cycle over part ready
1: Power On Reset cycle in progress part not ready
33
R
—
6:0
[Reserved]
These bits are unused and will always report 0.
Conversion Rate and One-Shot Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
04 (0A)HEX CONVERSION RATE REGISTER (8-bits)
7:4 [Reserved]
R
These bits are unused and will always be set to 0.
Conversion Rate
Sets the conversion rate of the LM96063.
0000 = 0.05 Hz
0001 = 0.1 Hz
0010 = 0.204 Hz
0011 = 0.406 Hz
04 (0A)
0x08
R/W 3:0
CONV3:CONV0 0100 = 0.813 Hz
0101 = 1.625 Hz
0110 = 3.25 Hz
0111 = 6.5 Hz
1000 = 13 Hz
1001 = 26 Hz
All other values = 26 Hz
0FHEX ONE-SHOT REGISTER (8-bits)
One Shot Trigger
Write
Only
0F
7:0
N/A
With the LM96063 in the STANDBY mode a single write to this register will
initiate one complete temperature conversion cycle. Any value may be written.
33
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ID Registers
Address Read/
POR
Value
Bits
Name
Description
Hex
Write
FEHEX MANUFACTURER’S ID REGISTER (8-bits)
FE 7:0 0x01 Manufacturer’s ID 0x01 = National Semiconductor
R
FFHEX STEPPING / DIE REVISION ID REGISTER (8-bits)
Stepping/Die
Revision ID
FF
R
7:0 0x49
Version of LM96063
3.0 Application Notes
3.1 FAN CONTROL DUTY CYCLE VS. REGISTER SETTINGS AND FREQUENCY
The following table is true only when the 22.5 kHz PWM frequency high resolution duty cycle is not selected.
PWM
Freq at
360 kHz
Internal
Clock, kHz
PWM
Freq at
1.4 kHz
Internal
Clock, Hz
PWM
Freq
4D
PWM
Value
4C [5:0]
for 100%
PWM
Value
4C [5:0] for
about 75%
PWM
Value
4C [5:0]
for 50%
Step
Resolution,
%
Actual Duty
Cycle, % When
75% is Selected
[4:0]
0
Address 0 is mapped to Address 1
1
50
2
1
1
180.0
90.00
60.00
45.00
36.00
30.00
25.71
22.50
20.00
18.00
16.36
15.00
13.85
12.86
12.00
11.25
10.59
10.00
9.47
703.1
351.6
234.4
175.8
140.6
117.2
100.4
87.9
78.1
70.3
63.9
58.6
54.1
50.2
46.9
43.9
41.4
39.1
37.0
35.2
33.5
32.0
30.6
29.3
28.1
27.0
26.0
25.1
24.2
23.4
22.7
50.0
75.0
2
25
4
3
2
3
16.7
12.5
10.0
8.33
7.14
6.25
5.56
5.00
4.54
4.16
3.85
3.57
3.33
3.13
2.94
2.78
2.63
2.50
2.38
2.27
2.17
2.08
2.00
1.92
1.85
1.79
1.72
1.67
1.61
6
5
3
83.3
4
8
6
4
75.0
5
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
8
5
80.0
6
9
6
75.0
7
11
12
14
15
17
18
20
21
23
24
26
27
29
30
32
33
35
36
38
39
41
42
44
45
47
7
78.6
8
8
75.0
9
9
77.8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
75.0
77.27
75.00
76.92
75.00
76.67
75.00
76.47
75.00
76.32
75.00
76.19
75.00
76.09
75.00
76.00
75.00
75.93
75.00
75.86
75.00
75.81
9.00
8.57
8.18
7.82
7.50
7.20
6.92
6.67
6.42
6.21
6.00
5.81
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34
The following table is true only when the 22.5 kHz PWM frequency with high resolution duty cycle is selected by setting bit 4 (PHR)
of the Enhanced Configuration register (0x45), clearing bit 3 (PWCKSL) of the PWM and RPM Configuration register (0x4A) and
setting PWM Frequency (0x4D) register to 0x08.
PWM
Value
4C [7:0]
for 100%
(Hex)
PWM
Value
4C [7:0] for
about 75%
(Hex)
PWM
Value
4C [7:0]
for 50%
(Hex)
PWM
Freq at
360 kHz
Internal
Clock, kHz
PWM
Freq at
1.4 kHz
Internal
Clock, Hz
PWM
Freq
4D
Actual Duty
Cycle, % When
Approximately
75% is Selected
Step
Resolution,
%
[4:0]
8
0.392
FF
BF
80
22.50
Not Available
74.902
3.1.1 Computing Duty Cycles for a Given Frequency
Example: For a PWM Frequency of 24, a PWM Value at 100%
= 48 and PWM Value actual = 28, then the Duty Cycle is
(28/48) × 100% = 58.3%.
Select a PWM Frequency from the first column corresponding
to the desired actual frequency in columns 6 or 7. Note the
PWM Value for 100% Duty Cycle.
Find the Duty Cycle by taking the PWM Value of Register 4C
and computing:
3.2 LUT FAN CONTROL
realized easily. At the transitions the duty cycle increments in
LSb (0.39% for the case shown) steps. In the example shown
in Figure 7(b) the first pair is set for a duty-cycle of 31.25%
and a temperature of 0°C. For temperatures less than 0°C the
duty cycle is set to 0. When the temperature is greater than 0
°C but is less than 91 °C the duty cycle will remain at 31.25%.
The next pair is set at 37.5% and 91°C. Once the temperature
exceeds 91°C the duty cycle on the PWM output will gradually
transition from 31.25% to 37.5% in 0.39% steps at the pro-
grammed time interval. The LUT comparison temperature
resolution is programmable to either 1 °C or 0.5 °C. For the
curves of Figure 7 the comparison resolution is set to 0.5 °C
that is why the actual duty cycle transitions happen 0.5 °C
higher than the actual LUT entry. The duty cycle transition
time interval is programmable and is shown in the table titled
PWM Smoothing Time Intervals. Care should be taken so that
the LUT PWM and Temperature values are setup in ascend-
ing weight.
The LM96063 fan control uses a temperature to duty cycle
look-up table (LUT) that has 12 indexes. High resolution duty
cycle (0.392%) is available when the PWM frequency is set
to 22.5 kHz. In addition ramp rate control is available to
acoustically smooth the duty cycle transition between LUT
steps.
Shown in Figure 7(a) is an example of the 12-point LUT tem-
perature to PWM transfer function that can be realized without
smoothing enabled. The table is comprised of twelve Duty-
Cycle and Temperature set-point pairs. Notice that the tran-
sitions between one index of the LUT to the next happen
instantaneously. If the PWM levels are set far enough apart
this can be acoustically very disturbing. The typical acoustical
threshold of change in duty cycle is 2%. Figure 7(b) has an
overlaid curve (solid line) showing what occurs at the transi-
tions when smoothing is enabled. The dashed lines shown in
Figure 7(b) are there to point out that multiple slopes can be
30029034
30029035
(a) Without smoothing
(b) With smoothing
FIGURE 7. Fan Control Transfer Function Example
35
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Also included is programmable hysteresis that is not de-
scribed by the curves of Figure 7. The hysteresis takes effect
as temperature is decreasing and moves all the temperature
set-points down by the programmed amount. For the example
shown here if the hysteresis is set to 1°C and if the tempera-
ture is decreasing from 96.5°C the duty cycle will remain at
68.75% and will not transition to 62.5% until the temperature
drops below 95.5°C.
f = 2 for 1 pulse/rev fan tachometer output, and
f = 2 / 3 for 3 pulses/rev fan tachometer output
For our example
If at any time the TCRIT output were to activate the PWM duty
cycle will be instantaneously forced to 100% thus forcing the
fans to full on.
3.4 DIODE NON-IDEALITY
The LM96063 can be applied easily in the same way as other
integrated-circuit temperature sensors, and its remote diode
sensing capability allows it to be used in new ways as well. It
can be soldered to a printed circuit board, and because the
path of best thermal conductivity is between the die and the
pins, its temperature will effectively be that of the printed cir-
cuit board lands and traces soldered to the LM96063's pins.
This presumes that the ambient air temperature is almost the
same as the surface temperature of the printed circuit board;
if the air temperature is much higher or lower than the surface
temperature, the actual temperature of the LM96063 die will
be at an intermediate temperature between the surface and
air temperatures. Again, the primary thermal conduction path
is through the leads, so the circuit board temperature will con-
tribute to the die temperature much more strongly than will the
air temperature.
PWM Smoothing Time Intervals
Time Interval
(seconds)
0-100% DC Time
w/ 6.25%
w/ 0.39%
resolution
Seconds
resolution
(seconds)
0.182
0.091
0.046
0.023
2.913
1.456
0.728
0.364
43.7
21.6
10.9
5.45
The PWM Smoothing Time Intervals table describes the pro-
grammable time interval preventing abrupt changes in the
PWM output duty cycle and thus preventing abrupt acoustical
noise changes as well. The threshold of acoustically detecting
fan noise transition is at about a 2% duty cycle change. The
table describes the time intervals that can be programmed
and the total amount of time it will take for the PWM output to
change from 0% to 100% for each time interval. For example
if the time interval for each step is set to 0.091 seconds the
time it will take to make a 0 to 100% duty cycle change will be
21.6 seconds when the duty cycle resolution is set to 0.39%
or 1.46 seconds when the resolution is 6.25%. One setting
will apply to all LUT transitions.
The LM96063 incorporates remote diode temperature sens-
ing technology allowing the measurement of remote temper-
atures. This diode can be located on the die of a target IC,
allowing measurement of the IC's temperature, independent
of the LM96063's die temperature. A discrete diode can also
be used to sense the temperature of external objects or am-
bient air. Remember that a discrete diode's temperature will
be affected, and often dominated, by the temperature of its
leads. Most silicon diodes do not lend themselves well to this
application. It is recommended that an MMBT3904 transistor
base emitter junction be used with the collector tied to the
base.
3.3 COMPUTING RPM OF THE FAN FROM THE TACH
COUNT
The LM96063 can measure a diode-connected transistor
such as the MMBT3904 or the thermal diode found in an AMD
processor or any other device (ASIC, CPU or FPGA) built on
an SOI process accurately.
The Tach Count Registers 46HEX and 47HEX count the number
of periods of the 90 kHz tachometer clock in the LM96063 for
the tachometer input from the fan assuming a 2 pulse per
revolution fan tachometer, such as the fans supplied with the
Intel boxed processors. The RPM of the fan can be computed
from the Tach Count Registers 46HEX and 47HEX. This can
best be shown through an example.
3.4.1 Diode Non-Ideality Factor Effect on Accuracy
When a transistor is connected as a diode, the following re-
lationship holds for variables VBE, T and IF:
Example:
Given: the fan used has a tachometer output with 2 per rev-
olution.
(1)
Let:
where:
Register 46 (LSB) is BFHEX = Decimal (11 x 16) + 15 = 191
and
Register 47 (MSB) is 7HEX = Decimal (7 x 256) = 1792.
The total Tach Count, in decimal, is 191 + 1792 = 1983.
The RPM is computed using the formula
•
•
•
•
q = 1.6×10−19 Coulombs (the electron charge),
T = Absolute Temperature in Kelvin
k = 1.38×10−23 joules/K (Boltzmann's constant),
η is the non-ideality factor of the process the diode is
manufactured on,
•
•
•
IS = Saturation Current and is process dependent,
If = Forward Current through the base-emitter junction
VBE = Base-Emitter Voltage drop
where
In the active region, the -1 term is negligible and may be elim-
inated, yielding the following equation
f = 1 for 2 pulses/rev fan tachometer output;
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36
Solving Equation 3 for temperature yields:
(2)
In Equation 2, η and IS are dependant upon the process that
was used in the fabrication of the particular diode. By forcing
two currents with a very controlled ratio(IF2 / IF1) and measur-
ing the resulting voltage difference, it is possible to eliminate
the IS term. Solving for the forward voltage difference yields
the relationship:
(4)
Equation 4 holds true when a diode connected transistor such
as the MMBT3904 is used. When this “diode” equation is ap-
plied to an integrated diode such as a processor transistor
with its collector tied to GND as shown in it may yield a wide
non-ideality spread. This wide non-ideality spread is not due
to true process variation but due to the fact that Equation 4 is
an approximation.
(3)
30029043
FIGURE 8. Thermal Diode Current Paths
37
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3.4.2 Calculating Total System Accuracy
3.5 PCB LAYOUT FOR MINIMIZING NOISE
The voltage seen by the LM96063 also includes the IFRS volt-
age drop of the series resistance. The non-ideality factor, η,
is the only other parameter not accounted for and depends
on the diode that is used for measurement. Since ΔVBE is
proportional to both η and T, the variations in η cannot be
distinguished from variations in temperature. Since the non-
ideality factor is not controlled by the temperature sensor, it
will directly add to the inaccuracy of the sensor. As an exam-
ple, assume a temperature sensor has an accuracy specifi-
cation of ±1.0°C at a temperature of 80°C (353 Kelvin) and
the processor diode has a non-ideality variation of ±0.39%.
The resulting system accuracy of the processor temperature
being sensed will be:
30029021
TACC = ±0.75°C + (±0.39% of 353 K) = ± 2.16 °C
FIGURE 9. Ideal Diode Trace Layout
The next error term to be discussed is that due to the series
resistance of the thermal diode and printed circuit board
traces. The thermal diode series resistance is specified on
most processor data sheets and is in the range of several
ohms. The LM96063 does not need to be compensated for
series resistance errors if the manufacturer of the thermal
diode says that the diode they provide matches the perfor-
mance of an MMBT3904. If they provide a typical series
resistance number that does not have to be compensated for
because it is taken into account. The error that is not ac-
counted for is the spread of the processor's series resistance
and additional PCB trace resistance. The equation used to
calculate the temperature error (TER) due to thermal diode
series resistance variation is simply:
In a noisy environment, such as a processor mother board,
layout considerations are very critical. Noise induced on
traces running between the remote temperature diode sensor
and the LM96063 can cause temperature conversion errors.
Keep in mind that the signal level the LM96063 is trying to
measure is in microvolts. The following guidelines should be
followed:
1. Use a low-noise +3.3VDC power supply, and bypass to
GND with a 0.1 µF ceramic capacitor in parallel with a
100 pF ceramic capacitor. The 100 pF capacitor should
be placed as close as possible to the power supply pin.
A bulk capacitance of 10 µF needs to be in the vicinity of
the LM96063's VDD pin.
2. A 100 pF diode bypass capacitor is recommended to filter
high frequency noise but may not be necessary. Place
the recommended 100 pF diode capacitor as close as
possible to the LM96063's D+ and D− pins. Make sure
the traces to the 100 pF capacitor are matched. The
LM96063 can handle capacitance up to 3 nF placed
between the D+ and D- pins, See Typical Performance
Characteristic curves titled Remote Temperature
Reading Sensitivity to Thermal Diode Filter
(5)
Solving Equation 5 for RPCB equal to -1.5Ω to 2.5Ω results in
the additional error due to the spread in this series resistance
of -0.93°C to +1.55°C. The spread in error cannot be canceled
out, as it would require measuring each individual thermal
diode device. This is quite difficult and impractical in a large
volume production environment.
Capacitance.
Equation 5 can also be used to calculate the additional error
caused by series resistance on the printed circuit board. Since
the variation of the PCB series resistance is minimal, the bulk
of the error term is always positive and can simply be can-
celled out by subtracting it from the output readings of the
LM96063 using the Remote Temperature Offset register.
3. Ideally, the LM96063 should be placed within 10 cm of
the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance
of 1 Ω can cause as much as 0.62°C of error. This error
can be compensated by using the Remote Temperature
Offset Registers, since the value placed in these
registers will automatically be subtracted from or added
to the remote temperature reading.
4. Diode traces should be surrounded by a GND guard ring
to either side, above and below if possible. This GND
guard should not be between the D+ and D− lines. In the
event that noise does couple to the diode lines it would
be ideal if it is coupled common mode. That is equally to
the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power
supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high
speed digital and bus lines. Diode traces should be kept
at least 2 cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the
diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM96063's GND pin is as
close as possible to the Processor's GND associated
with the sense diode.
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38
9. Leakage current between D+ and GND should be kept
to a minimum. Thirteen nano-amperes of leakage can
cause as much as 0.2°C of error in the diode temperature
reading. Keeping the printed circuit board as clean as
possible will minimize leakage current.
low (100 kHz max), care still needs to be taken to ensure
proper termination within a system with multiple parts on the
bus and long printed circuit board traces. An RC lowpass filter
with a 3 dB corner frequency of about 40 MHz is included on
the LM96063's SMBCLK input. Additional resistance can be
added in series with the SMBDAT and SMBCLK lines to fur-
ther help filter noise and ringing. Minimize noise coupling by
keeping digital traces out of switching power supply areas as
well as ensuring that digital lines containing high speed data
communications cross at right angles to the SMBDAT and
SMBCLK lines.
Noise coupling into the digital lines greater than 400 mVp-p
(typical hysteresis) and undershoot less than 500 mV below
GND, may prevent successful SMBus communication with
the LM96063. SMBus no acknowledge is the most common
symptom, causing unnecessary traffic on the bus. Although
the SMBus maximum frequency of communication is rather
39
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Physical Dimensions inches (millimeters) unless otherwise noted
10-Lead Lead Less Package (LLP or QFN)
JEDEC Registration Number MO-299-WEED-5
Order Number LM96063CISD or LM96063CISDX
NS Package Number SDA10A
www.ti.com
40
Notes
41
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Notes
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