LM111WGPQMLV/NOPB [TI]

COMPARATOR, 4000uV OFFSET-MAX, 200ns RESPONSE TIME, CDSO10, CERAMIC, SOIC-10;
LM111WGPQMLV/NOPB
型号: LM111WGPQMLV/NOPB
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

COMPARATOR, 4000uV OFFSET-MAX, 200ns RESPONSE TIME, CDSO10, CERAMIC, SOIC-10

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National Semiconductor is now part of  
Texas Instruments.  
Search http://www.ti.com/ for the latest technical  
information and details on our current products and services.  
December 2005  
LM111QML  
Voltage Comparator  
General Description  
much less prone to spurious oscillations. The LM111 has the  
same pin configuration as the LM106 and LM710.  
The LM111 is a voltage comparator that has input currents  
nearly a thousand times lower than devices such as the  
LM106 or LM710. It is also designed to operate over a wider  
range of supply voltages: from standard 15V op amp sup-  
plies down to the single 5V supply used for IC logic. The  
output is compatible with RTL, DTL and TTL as well as MOS  
circuits. Further, it can drive lamps or relays, switching volt-  
ages up to 50V at currents as high as 50 mA.  
Features  
n Available with radiation guaranteed  
n Operates from single 5V supply  
n Input current: 200 nA max. over temperature  
n Offset current: 20 nA max. over temperature  
n Differential input voltage range: 30V  
n Power consumption: 135 mW at 15V  
n Power supply voltage, single 5V to 15V  
n Offset voltage null capability  
Both the inputs and the output of the LM111 can be isolated  
from system ground, and the output can drive loads referred  
to ground, the positive supply or the negative supply. Offset  
balancing and strobe capability are provided and outputs  
can be wire OR’ed. Although slower than the LM106 and  
LM710 (200 ns response time vs 40 ns) the device is also  
n Strobe capability  
Ordering Information  
NS PART NUMBER  
LM111E-SMD  
LM111H-SMD  
LM111J-8-SMD  
LM111WG-SMD  
LM111E/883  
SMD PART NUMBER  
5962-8687701Q2A  
5962-8687701QGA  
5962-8687701QPA  
5962-8687701QZA  
NS PACKAGE NUMBER  
PACKAGE DESCRIPTION  
20LD Leadless Chip Carrier  
8LD TO-99 Metal Can  
8LD CERDIP  
E20A  
H08C  
J08A  
WG10A  
E20A  
10LD Ceramic SOIC  
20LD Leadless Chip Carrier  
8LD TO-99 Metal Can  
8LD CERDIP  
LM111H/883  
H08C  
J08A  
LM111J-8/883  
LM111J/883  
J14A  
14LD CERDIP  
LM111W/883  
W10A  
WG10A  
H08C  
10LD CERPACK  
LM111WG/883  
LM111HPQMLV  
10LD Ceramic SOIC  
8LD TO-99 Metal Can  
5962P0052401VGA  
30k rd(Si)  
LM111WPQMLV  
LM111WGPQMLV  
LM111HLQMLV  
LM111J-8LQMLV  
LM111WGLQMLV  
LM111WLQMLV  
5962P0052401VHA  
30k rd(Si)  
W10A  
WG10A  
H08A  
10LD CERPACK  
10LD Ceramic SOIC  
8LD TO-99 Metal Can  
8LD CERDIP  
5962P0052401VZA  
30k rd(Si)  
5962L0052401VGA  
50k rd(Si)  
5962L0052401VPA  
50k rd(Si)  
J08A  
5962L0052401VZA  
50k rd(Si)  
WG10A  
W10A  
10LD Ceramic SOIC  
10LD CERPACK  
5962L0052401VHA  
50k rd(Si)  
© 2005 National Semiconductor Corporation  
DS201285  
www.national.com  
Connection Diagrams  
Metal Can Package  
20128506  
Note: Pin 4 connected to case  
Top View  
See NS Package Number H08C  
Dual-In-Line Package  
Dual-In-Line Package  
20128534  
Top View  
20128535  
See NS Package Number J08A  
Top View  
See NS Package Number J14A  
20128533  
See NS Package Number W10A, WG10A  
20128573  
See NS Package NumberE20A  
www.national.com  
2
Schematic Diagram (Note 1)  
20128505  
Note 1: Pin connections shown on schematic diagram are for H08 package.  
3
www.national.com  
Absolute Maximum Ratings (Note 2)  
Positive Supply Voltage  
Negative Supply Voltage  
Total Supply Voltage  
+30.0V  
-30.0V  
36V  
Output to Negative Supply Voltage  
GND to Negative Supply Voltage  
Differential Input Voltage  
Sink Current  
50V  
30V  
30V  
50mA  
15V  
Input Voltage  
(Note 3)  
(Note 4)  
Power Dissipation  
@
400mW 25˚C  
8 LD CERDIP  
@
330mW 25˚C  
8 LD Metal Can  
10 LD CERPACK  
@
330mW 25˚C  
@
330mW 25˚C  
10 LD Ceramic SOIC  
20 LD LCC  
@
500mW 25˚C  
Output Short Circuit Duration  
Maximum Strobe Current  
Operating Temperature Range  
Thermal Resistance  
θJA  
10 seconds  
10mA  
-55˚C TA 125˚C  
@
8 LD CERDIP (Still Air 0.5W)  
134˚C/W  
76˚C/W  
162˚C/W  
92˚C/W  
231˚C/W  
153˚C/W  
231˚C/W  
153˚C/W  
97˚C/W  
65˚C/W  
90˚C/W  
65˚C/W  
@
8 LD CERDIP (500LF/Min Air flow 0.5W)  
@
8 LD Metal Can (Still Air 0.5W)  
@
8 LD Metal Can (500LF/Min Air flow 0.5W)  
@
10 Ceramic SOIC (Still Air 0.5W)  
@
10 Ceramic SOIC (500LF/Min Air flow 0.5W)  
@
10 CERPACK (Still Air 0.5W)  
@
10 CERPACK (500LF/Min Air flow 0.5W)  
@
14 LD CERDIP (Still Air 0.5W)  
@
14 LD CERDIP (500LF/Min Air flow 0.5W)  
@
20 LD LCC (Still Air 0.5W)  
20 LD LCC (500LF/Min Air flow 0.5W)  
θJC  
@
8 LD CERDIP  
8 LD Metal Can Pkg  
10 LD Ceramic SOIC  
10 LD CERPACK  
21˚C/W  
50˚C/W  
24˚C/W  
24˚C/W  
14 LD CERDIP  
20˚C/W  
20 LD LCC  
21˚C/W  
Storage Temperature Range  
Maximum Junction Temperature  
Lead Temperature (Soldering, 60 seconds)  
Voltage at Strobe Pin  
Package Weight (Typical)  
8 LD Metal Can  
-65˚C TA 150˚C  
175˚C  
300˚C  
V+ = -5V  
965mg  
1100mg  
250mg  
225mg  
TBD  
8 LD CERDIP  
10 LD CERPACK  
10 LD Ceramic SOIC  
14 LD CERDIP  
20 LD LCC  
TBD  
ESD Rating  
(Note 5)  
300V  
www.national.com  
4
Recommended Operating Conditions  
Supply Voltage  
VCC  
=
15VDC  
Operating Temperature Range  
-55˚C TA 125˚C  
Quality Conformance Inspection  
Mil-Std-883, Method 5005 - Group A  
Subgroup  
Description  
Temperature (˚C)  
1
2
Static tests at  
Static tests at  
+25  
+125  
-55  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
+25  
+125  
-55  
5
6
7
+25  
+125  
-55  
8A  
8B  
9
+25  
+125  
-55  
10  
11  
5
www.national.com  
LM111  
883 Electrical Characteristics  
DC Parameters  
The following conditions apply, unless otherwise specified.  
DC:  
V56 = 0, RS = 0 , VCC  
=
15V, VCM = 0, VO = 1.4V WRT −VCC The pin assignments are based on the 8 pin package  
configuration. (Note 7)  
Sub-  
groups  
1
Symbol  
IIO  
Parameter  
Conditions  
Notes  
Min  
Max Unit  
Input Offset Current  
VCM = 13.5V, RS = 50KΩ  
-10  
-20  
10  
20  
nA  
nA  
2, 3  
VCM = 13.5V, V85 = V86 = 0V,  
RS = 50KΩ  
(Note 7)  
-30  
30  
nA  
1
VCM = -14.5V, RS= 50KΩ  
-10  
-20  
10  
20  
nA  
nA  
1
2, 3  
VCM = -14.5V, V85 = V86 = 0V,  
RS= 50KΩ  
(Note 7)  
(Note 7)  
-30  
30  
nA  
1
RS = 50KΩ  
-10  
-20  
-30  
10  
20  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
nA  
V
1
2, 3  
1
V85 = V86 = 0V, RS = 50KΩ  
VCM = 13.5V, RS = 50KΩ  
30  
IIB  
Input Bias Current  
100  
150  
100  
150  
100  
150  
10  
1
2, 3  
1
VCM = -14.5V, RS = 50KΩ  
RS = 50KΩ  
2, 3  
1
2, 3  
1
IOL  
Output Leakage Current  
Ground Leakage Current  
Saturation Voltage  
VCC  
VO = 35V WRT -VCC  
VCC 18V, I5 + I6 = 5mA,  
=
18V, I5 + I6 = 5mA,  
(Note 7)  
(Note 7)  
(Note 7)  
(Note 7)  
(Note 7)  
(Note 7)  
500  
25  
2, 3  
1
IGL  
=
VO = 50V WRT -VCC  
VI = -5mV, I7 = 50mA  
VI = -6mV, I7 = 8mA  
500  
1.5  
0.4  
5.0  
15  
2
VSat  
-ICC  
+ICC  
IL1  
1, 2, 3  
1, 2, 3  
1, 2  
3
V
Negative Supply Current  
Positive Supply Current  
Input Leakage Current  
mA  
mA  
mA  
mA  
6.0  
15  
1, 2  
3
VCC  
=
18V, V28 = 1V,  
(Note 7)  
(Note 7)  
(Note 7)  
(Note 7)  
10  
30  
10  
30  
nA  
nA  
nA  
nA  
1
2
1
2
V38 = 30V, I5 + I6 = 5mA  
VO = 50V WRT -VCC  
IL2  
Input Leakage Current  
VCC  
=
18V, V38 = 1V,  
V28 = 30V, I5 + I6 = 5mA  
VO = 50V WRT -VCC  
VOSt  
Collector Output Voltage  
(Strobe)  
14  
14  
V
V
1
1
ISt = 3mA  
www.national.com  
6
LM111  
883 Electrical Characteristics (Continued)  
DC Parameters (Continued)  
The following conditions apply, unless otherwise specified.  
DC:  
V56 = 0, RS = 0 , VCC  
=
15V, VCM = 0, VO = 1.4V WRT −VCC The pin assignments are based on the 8 pin package  
configuration. (Note 7)  
Sub-  
groups  
Symbol  
Parameter  
Conditions  
Notes  
Min  
Max Unit  
mV  
VIO  
Input Offset Voltage  
VCM = 13.5V  
-3.0  
-4.0  
-3.0  
-3.0  
-4.0  
-3.0  
-3.0  
-4.0  
-3.0  
-5.0  
-6.0  
-3.0  
-4.0  
-5.0  
-6.0  
-3.0  
-4.0  
40  
3.0  
4.0  
3.0  
3.0  
4.0  
3.0  
3.0  
4.0  
3.0  
5.0  
6.0  
3.0  
4.0  
5.0  
6.0  
3.0  
4.0  
1
2, 3  
1
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
V/mV  
V/mV  
VCM = 13.5V, V85 = V86= 0V  
VCM = -14.5V  
(Note 7)  
(Note 7)  
(Note 7)  
1
2, 3  
1
VCM = -14.5V, V85 = V86 = 0V  
1
2, 3  
1
V85 = V86 = 0V  
VO = 0.4V, +VCC = 4.5V,  
-VCC = 0V, VCM = 3V  
1
2, 3  
1
VO = 4.5V, +VCC = 4.5V,  
-VCC = 0V, VCM = 3V  
2, 3  
1
VO = 0.4V, +VCC = 4.5V,  
-VCC = 0V, VCM = 0.5V  
2, 3  
1
VO = 4.5V, +VCC = 4.5V,  
-VCC = 0V, VCM = 0.5V  
2, 3  
4
AVS  
Large Signal Gain  
-12V VO 35V, RL = 1KΩ  
(Note 6)  
(Note 6)  
30  
5, 6  
AC Parameters  
The following conditions apply, unless otherwise specified.  
AC:  
V56 = 0, RS = 0 , VCC  
=
15V, VCM = 0, VO = 1.4V WRT −VCC The pin assignments are based on the 8 pin package  
configuration. (Note 7)  
Sub-  
groups  
Symbol  
tR  
Parameter  
Response Time  
Conditions  
Notes  
Min  
Max Unit  
400 nS  
7
7
www.national.com  
LM111  
SMD Electrical Characteristics  
DC Parameters  
The following conditions apply, unless otherwise specified.  
DC:  
VCC  
=
15V, VCM = 0  
Sub-  
groups  
1
Symbol  
Parameter  
Conditions  
VI = 0V, RS = 50Ω  
Notes  
Min  
-3.0  
-4.0  
Max Unit  
+3.0 mV  
+4.0 mV  
2, 3  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50Ω  
-3.0  
-4.0  
-3.0  
-4.0  
-3.0  
-4.0  
+3.0 mV  
+4.0 mV  
+3.0 mV  
+4.0 mV  
+3.0 mV  
+4.0 mV  
1
2, 3  
1
VIO  
Input Offset Voltage  
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50Ω  
2, 3  
1
+VCC = +2.5V, -VCC = -2.5V,  
VI = 0V,  
2, 3  
RS = 50Ω  
VIO  
R
Raised Input Offset Voltage  
VI = 0V, RS = 50Ω  
-3.0  
-4.5  
+3.0 mV  
+4.5 mV  
1
2, 3  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50Ω  
-3  
+3  
mV  
1
-4.5  
+4.5 mV  
2, 3  
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V, RS = 50Ω  
-3.0  
-4.5  
-10  
-20  
+3.0 mV  
+4.5 mV  
1
2, 3  
1, 2  
3
IIO  
Input Offset Current  
VI = 0V, RS = 50KΩ  
+10  
+20  
nA  
nA  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50KΩ  
-10  
-20  
-10  
-20  
+10  
+20  
+10  
+20  
nA  
nA  
nA  
nA  
1, 2  
3
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50KΩ  
1, 2  
3
IIO  
R
Raised Input Offset Current  
Input Bias Current  
VI = 0V, RS = 50KΩ  
-25  
-50  
+25  
+50  
nA  
nA  
nA  
nA  
1, 2  
3
IIB  
VI = 0V, RS = 50KΩ  
-100 0.1  
-150 0.1  
1, 2  
3
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50KΩ  
-150 0.1  
-200 0.1  
-150 0.1  
-200 0.1  
nA  
nA  
nA  
nA  
1, 2  
3
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50KΩ  
1, 2  
3
VOSt  
Collector Output Voltage  
(Strobe)  
+VI = Gnd, -VI = 15V,  
ISt = -3mA, RS = 50Ω  
(Note 8)  
14  
80  
V
1, 2, 3  
1, 2, 3  
CMRR  
Common Mode Rejection Ratio -28V -VCC -0.5V, RS = 50,  
2V +VCC 29.5V, RS = 50,  
dB  
-14.5V VCM 13V, RS = 50Ω  
www.national.com  
8
LM111  
SMD Electrical Characteristics (Continued)  
DC Parameters (Continued)  
The following conditions apply, unless otherwise specified.  
DC:  
VCC  
=
15V, VCM = 0  
Sub-  
Symbol  
Parameter  
Conditions  
+VCC = 4.5V, -VCC = Gnd,  
IO = 8mA, VI = 0.71V,  
VID = -6mV  
Notes  
Min  
Max Unit  
groups  
VOL  
Low Level Output Voltage  
0.4  
0.4  
V
V
1, 2, 3  
1, 2, 3  
+VCC = 4.5V, -VCC = Gnd,  
IO = 8mA, VI = −1.75V,  
VID = -6mV  
IO = 50mA, VI = 13V,  
VID = -5mV  
1.5  
1.5  
V
V
1, 2, 3  
1, 2, 3  
IO = 50mA, Vl= -14V,  
VID = -5mV  
ICEX  
IL  
Output Leakage Current  
Input Leakage Current  
+VCC = 18V, -VCC = -18V,  
VO = 32V  
-1.0  
-1.0  
10  
nA  
nA  
1
2
500  
+VCC = 18V, -VCC = -18V,  
+VI = +12V, -VI = -17V  
+VCC = 18V, -VCC = -18V,  
+VI = -17V, -VI = +12V  
(Note 11) -5.0  
(Note 11) -5.0  
500  
500  
nA  
nA  
1, 2, 3  
1, 2, 3  
+ICC  
-ICC  
Power Supply Current  
Power Supply Current  
6.0  
7.0  
mA  
mA  
mA  
mA  
1, 2  
3
-5.0  
-6.0  
1, 2  
3
VIO / T Temperature Coefficient Input  
25˚C T 125˚C  
-55˚C T 25˚C  
25˚C T 125˚C  
-55˚C T 25˚C  
(Notes 11,  
-25  
25  
25  
µV/˚C  
µV/˚C  
pA/˚C  
pA/˚C  
2
3
2
3
Offset Voltage  
13)  
(Notes 11,  
-25  
13)  
IIO / T  
Temperature Coefficient Input  
Offset Current  
(Notes 11,  
-100 100  
-200 200  
13)  
(Notes 11,  
13)  
IOS  
Short Circuit Current  
VO = 5V, t 10mS, -VI = 0.1V, (Note 10)  
200  
150  
250  
mA  
mA  
mA  
1
2
3
+VI = 0V  
(Note 10)  
(Note 10)  
+VIO adj.  
-VIO adj.  
AVE  
Input Offset Voltage  
(Adjustment)  
VO = 0V, VI = 0V, RS = 50Ω  
VO = 0V, VI = 0V, RS = 50Ω  
RL = 600Ω  
5.0  
mV  
mV  
1
1
Input Offset Voltage  
(Adjustment)  
-5.0  
Voltage Gain (Emitter)  
(Note 6)  
(Note 6)  
10  
V/mV  
V/mV  
4
8.0  
5, 6  
AC Parameters  
The following conditions apply, unless otherwise specified.  
AC:  
VCC  
=
15V, VCM = 0  
Sub-  
groups  
7, 8B  
8A  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
300  
Unit  
(Note 13)  
(Note 13)  
nS  
nS  
Response Time (Collector  
Output)  
VOD(Overdrive) = -5mV,  
CL = 50pF, VI = -100mV  
tRLHC  
640  
9
www.national.com  
LM111  
SMD Electrical Characteristics (Continued)  
AC Parameters (Continued)  
The following conditions apply, unless otherwise specified.  
AC:  
VCC  
=
15V, VCM = 0  
Sub-  
groups  
7, 8B  
8A  
Symbol  
Parameter  
Conditions  
VOD(Overdrive) = 5mV,  
CL = 50pF, VI = 100mV  
Notes  
Min Max  
300  
Unit  
nS  
tRHLC  
Response Time (Collector  
Output)  
(Note 13)  
(Note 13)  
500  
nS  
www.national.com  
10  
LM111  
RH Electrical Characteristics  
DC Parameters (Note 12)  
The following conditions apply, unless otherwise specified.  
DC:  
VCC  
=
15V, VCM = 0  
Sub-  
groups  
1
Symbol  
Parameter  
Conditions  
VI = 0V, RS = 50Ω  
Notes  
Min  
-3.0  
-4.0  
Max Unit  
+3.0 mV  
+4.0 mV  
2, 3  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50Ω  
-3.0  
-4.0  
-3.0  
-4.0  
+3.0 mV  
+4.0 mV  
+3.0 mV  
+4.0 mV  
1
2, 3  
1
VIO  
Input Offset Voltage  
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50Ω  
2, 3  
+VCC = +2.5V, -VCC = -2.5V,  
VI = 0V, RS = 50Ω  
-3.0  
-4.0  
-3.0  
-4.5  
+3.0 mV  
+4.0 mV  
+3.0 mV  
+4.5 mV  
1
2, 3  
1
VIO  
R
Raised Input Offset Voltage  
VI = 0V, RS = 50Ω  
2, 3  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50Ω  
-3.0  
-4.5  
-3.0  
-4.5  
+3.0 mV  
+4.5 mV  
+3.0 mV  
+4.5 mV  
1
2, 3  
1
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50Ω  
2, 3  
IIO  
Input Offset Current  
VI = 0V, RS = 50KΩ  
-10  
-20  
+10  
+20  
nA  
nA  
1, 2  
3
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50KΩ  
-10  
-20  
-10  
-20  
+10  
+20  
+10  
+20  
nA  
nA  
nA  
nA  
1, 2  
3
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50KΩ  
1, 2  
3
IIO  
R
Raised Input Offset Current  
Input Bias Current  
VI = 0V, RS = 50KΩ  
-25  
-50  
+25  
+50  
nA  
nA  
nA  
nA  
1, 2  
3
IIB  
VI = 0V, RS = 50KΩ  
-100 0.1  
-150 0.1  
1, 2  
3
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50KΩ  
-150 0.1  
-200 0.1  
-150 0.1  
-200 0.1  
nA  
nA  
nA  
nA  
1, 2  
3
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50KΩ  
1, 2  
3
VOSt  
Collector Output Voltage  
(Strobe)  
+VI = Gnd, -VI = 15V,  
ISt = -3mA, RS = 50Ω  
(Note 13) 14  
80  
V
1, 2, 3  
1, 2, 3  
CMRR  
Common Mode Rejection Ratio -28V -VCC -0.5V, RS = 50,  
2V +VCC 29.5V, RS = 50,  
dB  
-14.5V VCM 13V, RS = 50Ω  
11  
www.national.com  
LM111  
RH Electrical Characteristics (Continued)  
DC Parameters (Note 12) (Continued)  
The following conditions apply, unless otherwise specified.  
DC:  
VCC  
=
15V, VCM = 0  
Sub-  
Symbol  
Parameter  
Conditions  
+VCC = 4.5V, -VCC = Gnd,  
IO = 8mA, VI = 0.5V,  
VID = -6mV  
Notes  
Min  
Max Unit  
groups  
VOL  
Low Level Output Voltage  
0.4  
0.4  
V
V
1, 2, 3  
1, 2, 3  
+VCC = 4.5V, -VCC = Gnd,  
IO = 8mA, VI = 3V,  
VID = -6mV  
IO = 50mA, VI = 13V,  
VID = -5mV  
1.5  
1.5  
V
V
1, 2, 3  
1, 2, 3  
IO = 50mA, VI = -14V,  
VID = -5mV  
ICEX  
IL  
Output Leakage Current  
Input Leakage Current  
+VCC = 18V, -VCC = -18V,  
VO = 32V  
-1.0  
-1.0  
10  
nA  
nA  
1
2
500  
+VCC = 18V, -VCC = -18V,  
+VI = +12V, -VI = -17V  
+VCC = 18V, -VCC = -18V,  
+VI = -17V, -VI = +12V  
(Note 11) -5.0  
(Note 11) -5.0  
500  
500  
nA  
nA  
1, 2, 3  
1, 2, 3  
+ICC  
Power Supply Current  
Power Supply Current  
6.0  
7.0  
mA  
1, 2  
3
mA  
-ICC  
-5.0  
-6.0  
-25  
-25  
mA  
1, 2  
3
mA  
VIO / T  
IIO / T  
IOS  
Temperature Coefficient Input  
Offset Voltage  
25˚C T 125˚C  
25  
25  
µV/˚C  
µV/˚C  
pA/˚C  
pA/˚C  
mA  
2
-55˚C T 25˚C  
3
Temperature Coefficient Input  
Offset Current  
25˚C T 125˚C  
-100 100  
-200 200  
200  
2
-55˚C T 25˚C  
3
Short Circuit Current  
VO = 5V, t 10mS, -VI = 0.1V, (Note 10)  
1
+VI = 0V  
(Note 10)  
(Note 10)  
150  
mA  
2
250  
mA  
3
+VIO adj.  
-VIO adj.  
AVE  
Input Offset Voltage  
(Adjustment)  
VO = 0V, VI = 0V, RS = 50Ω  
VO = 0V, VI = 0V, RS = 50Ω  
RL = 600Ω  
5.0  
mV  
mV  
1
1
Input Offset Voltage  
(Adjustment)  
-5.0  
Voltage Gain (Emitter)  
(Note 6)  
(Note 6)  
10  
V/mV  
V/mV  
4
8.0  
5, 6  
AC Parameters  
(Note 12)  
The following conditions apply, unless otherwise specified.  
AC:  
VCC  
=
15V, VCM = 0  
Sub-  
groups  
7, 8B  
8A  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
300  
Unit  
nS  
nS  
nS  
nS  
Response Time (Collector  
Output)  
VOD(Overdrive) = -5mV,  
CL = 50pF, VI = -100mV  
tRLHC  
(Note 13)  
640  
tRHLC  
Response Time (Collector  
Output)  
VOD(Overdrive) = 5mV,  
CL = 50pF, VI = 100mV  
300  
7, 8B  
8A  
(Note 13)  
500  
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12  
LM111  
RH Electrical Characteristics (Continued)  
DC Drift Parameters  
(Note 12)  
The following conditions apply, unless otherwise specified.  
DC: VCC 15V, VCM = 0  
Delta calculations performed on QMLV devices at group B , subgroup 5.  
=
Sub-  
groups  
1
Symbol  
Parameter  
Input Offset Voltage  
Input Bias Current  
Conditions  
VI = 0V, RS = 50Ω  
Notes  
Min Max  
Unit  
-0.5  
0.5  
mV  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50Ω  
-0.5  
0.5  
mV  
1
VIO  
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50Ω  
-0.5  
0.5  
mV  
nA  
nA  
1
1
1
IIB  
VI = 0V, RS = 50KΩ  
+VCC = 29.5V, -VCC = -0.5V,  
VI = 0V, VCM = -14.5V,  
RS = 50KΩ  
-12.5 12.5  
-12.5 12.5  
+VCC = 2V, -VCC = -28V,  
VI = 0V, VCM = +13V,  
RS = 50KΩ  
-12.5 12.5  
nA  
nA  
1
1
ICEX  
Output Leakage Current  
+VCC = 18V, -VCC = -18V,  
VO = 32V  
-5.0  
5.0  
Electrical Characteristics  
Post Radiation Limits  
The following conditions apply, unless otherwise specified  
Sub-  
groups  
1
Symbol  
IIO  
Parameter  
Conditions  
Notes  
Min Max  
Unit  
Input Offset Current  
+VCC = 29.5V, −VCC = −0.5V,  
VI = 0V, VCM = −14.5V,  
RS = 50KΩ  
−50  
+50  
nA  
+VCC = 2V, −VCC = −28V,  
−50  
+50  
nA  
1
VI = 0V, VCM = +13V, RS  
50KΩ  
=
IIB  
Input Bias Current  
VI = 0V, RS = 50KΩ  
−150 0.1  
−175 0.1  
nA  
nA  
1
1
+VCC = 29.5V, −VCC = −0.5V,  
VI = 0V, VCM = −14.5V,  
RS = 50KΩ  
ICEX  
Output Leakage Current  
+VCC = 18V, −VCC = −18V,  
VO = 32V  
−25  
+25  
nA  
1
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed  
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test  
conditions.  
Note 3: This rating applies for 15V supplies. The positive input voltage limits is 30 V above the negative supply. The negative input voltage limits is equal to the  
negative supply voltage or 30V below the positive supply, whichever is less.  
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T  
(maximum junction temperature), θ (package junction  
JA  
Jmax  
to ambient thermal resistance), and T (ambient temperature). The maximum allowable power dissipation at any temperature is P  
= (T  
- T )/θ or the  
A
Dmax  
Jmax A JA  
number given in the Absolute Maximum Ratings, whichever is lower.  
Note 5: Human body model, 1.5 kin series with 100 pF.  
Note 6: Datalog reading in K=V/mV.  
Note 7: Pin names based on an 8 pin package configuration. When using higher pin count packages then:  
Pin 2 & 3 are Inputs, Pin 5 is Balance, Pin 6 is  
V is the Voltage between the Balance and Balance / Strobe pins  
56  
+
Balance / Strobe, Pin 7 is Output, and Pin 8 is V . For example:  
Note 8: I = −2mA at −55˚C  
ST  
Note 9: Calculated parameter.  
Note 10: Actual min. limit used is 5mA due to test setup.  
13  
www.national.com  
Note 11: V is voltage difference between inputs.  
ID  
Note 12: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.  
These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters  
are guaranteed only for the conditions as specified in Mil-Std-883, Method 1019.5, Condition A.  
Note 13: Group A sample ONLY  
LM111 Typical Performance Characteristics  
Input Bias Current  
Input Bias Current  
20128543  
20128544  
Input Bias Current  
Input Bias Current  
20128546  
20128545  
Input Bias Current  
Input Bias Current  
20128547  
20128548  
www.national.com  
14  
LM111 Typical Performance Characteristics (Continued)  
Input Bias Current  
Input Overdrives  
Input Bias Current  
Input Overdrives  
20128550  
20128549  
Response Time for Various  
Input Overdrives  
Input Bias Current  
20128551  
20128552  
Response Time for Various  
Input Overdrives  
Output Limiting Characteristics  
20128554  
20128553  
15  
www.national.com  
LM111 Typical Performance Characteristics (Continued)  
Supply Current  
Supply Current  
20128555  
20128556  
Leakage Currents  
20128557  
2. Certain sources will produce a cleaner comparator out-  
put waveform if a 100 pF to 1000 pF capacitor C2 is  
connected directly across the input pins.  
Application Hints  
CIRCUIT TECHNIQUES FOR AVOIDING  
3. When the signal source is applied through a resistive  
network, RS, it is usually advantageous to choose an RS'  
of substantially the same value, both for DC and for  
dynamic (AC) considerations. Carbon, tin-oxide, and  
metal-film resistors have all been used successfully in  
comparator input circuitry. Inductive wire wound resis-  
tors are not suitable.  
OSCILLATIONS IN COMPARATOR APPLICATIONS  
When a high-speed comparator such as the LM111 is used  
with fast input signals and low source impedances, the out-  
put response will normally be fast and stable, assuming that  
the power supplies have been bypassed (with 0.1 µF disc  
capacitors), and that the output signal is routed well away  
from the inputs (pins 2 and 3) and also away from pins 5 and  
6.  
4. When comparator circuits use input resistors (e.g. sum-  
ming resistors), their value and placement are particu-  
larly important. In all cases the body of the resistor  
should be close to the device or socket. In other words  
there should be very little lead length or printed-circuit  
foil run between comparator and resistor to radiate or  
pick up signals. The same applies to capacitors, pots,  
etc. For example, if RS=10 k, as little as 5 inches of  
lead between the resistors and the input pins can result  
in oscillations that are very hard to damp. Twisting these  
input leads tightly is the only (second best) alternative to  
placing resistors close to the comparator.  
However, when the input signal is a voltage ramp or a slow  
sine wave, or if the signal source impedance is high (1 kto  
100 k), the comparator may burst into oscillation near the  
crossing-point. This is due to the high gain and wide band-  
width of comparators like the LM111. To avoid oscillation or  
instability in such a usage, several precautions are recom-  
mended, as shown in Figure 1 below.  
1. The trim pins (pins 5 and 6) act as unwanted auxiliary  
inputs. If these pins are not connected to a trim-pot, they  
should be shorted together. If they are connected to a  
trim-pot, a 0.01 µF capacitor C1 between pins 5 and 6  
will minimize the susceptibility to AC coupling. A smaller  
capacitor is used if pin 5 is used for positive feedback as  
in Figure 1.  
www.national.com  
16  
circuit of Figure 2, the feedback from the output to the  
positive input will cause about 3 mV of hysteresis. How-  
ever, if RS is larger than 100, such as 50 k, it would  
not be reasonable to simply increase the value of the  
positive feedback resistor above 510 k. The circuit of  
Figure 3 could be used, but it is rather awkward. See the  
notes in paragraph 7 below.  
Application Hints (Continued)  
5. Since feedback to almost any pin of a comparator can  
result in oscillation, the printed-circuit layout should be  
engineered thoughtfully. Preferably there should be a  
ground plane under the LM111 circuitry, for example,  
one side of a double-layer circuit card. Ground foil (or,  
positive supply or negative supply foil) should extend  
between the output and the inputs, to act as a guard.  
The foil connections for the inputs should be as small  
and compact as possible, and should be essentially  
surrounded by ground foil on all sides, to guard against  
capacitive coupling from any high-level signals (such as  
the output). If pins 5 and 6 are not used, they should be  
shorted together. If they are connected to a trim-pot, the  
trim-pot should be located, at most, a few inches away  
from the LM111, and the 0.01 µF capacitor should be  
installed. If this capacitor cannot be used, a shielding  
printed-circuit foil may be advisable between pins 6 and  
7. The power supply bypass capacitors should be lo-  
cated within a couple inches of the LM111. (Some other  
comparators require the power-supply bypass to be lo-  
cated immediately adjacent to the comparator.)  
7. When both inputs of the LM111 are connected to active  
signals, or if a high-impedance signal is driving the  
positive input of the LM111 so that positive feedback  
would be disruptive, the circuit of Figure 1 is ideal. The  
positive feedback is to pin 5 (one of the offset adjust-  
ment pins). It is sufficient to cause 1 to 2 mV hysteresis  
and sharp transitions with input triangle waves from a  
few Hz to hundreds of kHz. The positive-feedback signal  
across the 82resistor swings 240 mV below the posi-  
tive supply. This signal is centered around the nominal  
voltage at pin 5, so this feedback does not add to the  
VOS of the comparator. As much as 8 mV of VOS can be  
trimmed out, using the 5 kpot and 3 kresistor as  
shown.  
8. These application notes apply specifically to the LM111  
and LF111 family of comparators, and are applicable to  
all high-speed comparators in general, (with the excep-  
tion that not all comparators have trim pins).  
6. It is a standard procedure to use hysteresis (positive  
feedback) around a comparator, to prevent oscillation,  
and to avoid excessive noise on the output because the  
comparator is a good amplifier for its own noise. In the  
20128529  
Pin connections shown are for LM111H in the H08 hermetic package  
FIGURE 1. Improved Positive Feedback  
17  
www.national.com  
Application Hints (Continued)  
20128530  
Pin connections shown are for LM111H in the H08 hermetic package  
FIGURE 2. Conventional Positive Feedback  
20128531  
FIGURE 3. Positive Feedback with High Source Resistance  
www.national.com  
18  
Typical Applications (Note 16)  
Offset Balancing  
Strobing  
20128536  
20128537  
Note: Do Not Ground Strobe Pin. Output is turned off when current is pulled  
from Strobe Pin.  
Increasing Input Stage Current (Note 14)  
Detector for Magnetic Transducer  
20128538  
Note 14: Increases typical common mode slew from 7.0V/µs to 18V/µs.  
20128539  
Digital Transmission Isolator  
Relay Driver with Strobe  
20128540  
20128541  
*Absorbs inductive kickback of relay and protects IC from severe voltage  
++  
transients on V line.  
Note: Do Not Ground Strobe Pin.  
19  
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Typical Applications (Note 16) (Continued)  
Strobing off Both Input and Output Stages (Note 15)  
20128542  
Note: Do Not Ground Strobe Pin.  
Note 15: Typical input current is 50 pA with inputs strobed off.  
Note 16: Pin connections shown on schematic diagram and typical applications are for H08 metal can package.  
Positive Peak Detector  
Zero Crossing Detector Driving MOS Logic  
20128524  
20128523  
*Solid tantalum  
Typical Applications for H08  
Package (Pin numbers refer to H08 package)  
Zero Crossing Detector Driving MOS Switch  
100 kHz Free Running Multivibrator  
20128513  
20128514  
*TTL or DTL fanout of two  
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20  
Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued)  
10 Hz to 10 kHz Voltage Controlled Oscillator  
20128515  
*Adjust for symmetrical square wave time when V = 5 mV  
IN  
Minimum capacitance 20 pF Maximum frequency 50 kHz  
Driving Ground-Referred Load  
Using Clamp Diodes to Improve Response  
20128517  
20128516  
*Input polarity is reversed when using pin 1 as output.  
TTL Interface with High Level Logic  
20128518  
*Values shown are for a 0 to 30V logic swing and a 15V threshold.  
May be added to control speed and reduce susceptibility to noise spikes.  
21  
www.national.com  
Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued)  
Crystal Oscillator  
Comparator and Solenoid Driver  
20128520  
20128519  
Precision Squarer  
20128521  
*Solid tantalum  
Adjust to set clamp level  
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22  
Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued)  
Low Voltage Adjustable Reference Supply  
20128522  
*Solid tantalum  
Positive Peak Detector  
Zero Crossing Detector Driving MOS Logic  
20128524  
20128523  
*Solid tantalum  
Negative Peak Detector  
20128525  
*Solid tantalum  
23  
www.national.com  
Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued)  
Precision Photodiode Comparator  
20128526  
*R2 sets the comparison level. At comparison, the photodiode has less than 5 mV across it, decreasing leakages by an order of magnitude.  
Switching Power Amplifier  
20128527  
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24  
Typical Applications for H08 Package (Pin numbers refer to H08 package) (Continued)  
Switching Power Amplifier  
20128528  
25  
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Revision History  
Released  
Revision  
Section  
Originator  
Changes  
10/11/05  
A
New Release, Corporate format  
L. Lytle  
3 MDS data sheets converted into one Corp.  
data sheet format. MNLM111-X Rev 0A0,  
MDLM111-X Rev. 0B0, and MRLM111-X-RH  
Rev 0E1. The drift table was eliminated from  
the 883 section since it did not apply; Note  
#3 was removed from RH & QML  
datasheets with SG verification that it no  
longer applied. Added NSID’s for 50k Rad  
and Post Radiation Table. MDS data sheets  
will be archived.  
12/14/05  
B
Ordering Information Table  
R. Malone  
Removed NSID reference LM111J-8PQMLV,  
5962P0052401VPA  
30k rd(Si). Reason: NSID on LTB, Inventory  
exhausted. Added following NSID’s:  
LM111HPQMLV, LM111WPQMLV and  
LM111WGPQMLV. Reason: Still have  
Inventory. LM111QML, Revision A will be  
archived.  
www.national.com  
26  
Physical Dimensions inches (millimeters) unless otherwise noted  
Metal Can Package (H)  
NS Package Number H08C  
Cavity Dual-In-Line Package (J)  
NS Package Number J08A  
27  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Dual-In-Line Package (J)  
NS Package Number J14A  
Leadless Chip Carrier (E)  
NS Package Number E20A  
www.national.com  
28  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
NS Package Number W10A  
NS Package Number WG10A  
29  
www.national.com  
Notes  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves  
the right at any time without notice to change said circuitry and specifications.  
For the most current product information visit us at www.national.com.  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS  
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR  
CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body, or  
(b) support or sustain life, and whose failure to perform when  
properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to result  
in a significant injury to the user.  
2. A critical component is any component of a life support  
device or system whose failure to perform can be reasonably  
expected to cause the failure of the life support device or  
system, or to affect its safety or effectiveness.  
BANNED SUBSTANCE COMPLIANCE  
National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products  
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain  
no ‘‘Banned Substances’’ as defined in CSP-9-111S2.  
Leadfree products are RoHS compliant.  
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Support Center  
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Fax: +49 (0) 180-530 85 86  
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