DAC7643VFBR_技术文档

DAC7642

DAC7643

DAC7642

SBAS233 – DECEMBER 2001

16-Bit, Dual Voltage Output

DIGITAL-TO-ANALOG CONVERTER

DESCRIPTION

FEATURES

ꢀ LOW POWER: 4mW

The DAC7642 and DAC7643 are dual channel, 16-bit, volt-

age output Digital-to-Analog Converters (DACs) which pro-

vide 15-bit monotonic performance over the specified tem-

perature range. They accept 16-bit parallel input data, have

double-buffered DAC input logic (allowing simultaneous up-

date of all DACs), and provide a readback mode of the

internal input registers. Programmable asynchronous reset

clears all registers to a mid-scale code of 8000_H(DAC7642)

or to a zero-scale code of 0000_H(DAC7643). These DACs

can operate from a single +5V supply or from +5V and –5V

supplies, providing an output range of 0 to +2.5V or –2.5V to

+2.5V, respectively.

ꢀ UNIPOLAR OR BIPOLAR OPERATION

ꢀ SETTLING TIME: 10µs to 0.003% FSR

ꢀ 15-BIT LINEARITY AND MONOTONICITY:

–40°C to +85°C

ꢀ RESET TO MID-SCALE (DAC7642) OR

ZERO-SCALE (DAC7643)

ꢀ DATA READBACK

ꢀ DOUBLE-BUFFERED DATA INPUTS

APPLICATIONS

ꢀ PROCESS CONTROL

Low power and small size per DAC make the DAC7642 and

DAC7643 ideal for automatic test equipment, DAC-per-pin

programmers, data acquisition systems, and closed-loop

servo-control. The DAC7642 and DAC7643 are available in

a LQFP-32 package and specified over a –40°C to +85°C

temperature range.

ꢀ CLOSED-LOOP SERVO-CONTROL

ꢀ MOTOR CONTROL

ꢀ DATA ACQUISITION SYSTEMS

ꢀ DAC-PER-PIN PROGRAMMERS

V_REF

L

V_REF

H

Sense

V_REF

L

V_REFH

V_CC

V_SS

DAC7642

DAC7643

16

I/O

Buffer

Input

Register A

DAC

Register A

DATA I/O

DAC A

V_OUT

A

V_OUT

Sense

Input

Register B

DAC

Register B

DAC B

V_OUT

B

DACSEL

CS

V_OUT

Control

Logic

R/W

GND

RST

LOADDACS

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

www.ti.com

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru-

ments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

V_CCto V_SS............................................................................. –0.3V to 11V

V

_CCto GND .......................................................................... –0.3V to 5.5V

_REFL to V_SS............................................................. –0.3V to (V_CC– V_SS

_CCto V_REFH ............................................................ –0.3V to (V_CC– V_SS

_REFH to V_REFL ......................................................... –0.3V to (V_CC– V_SS

)

Digital Input Voltage to GND ................................... –0.3V to V_CC+ 0.3V

Digital Output Voltage to GND ................................. –0.3V to V_CC+ 0.3V

Maximum Junction Temperature ................................................... +150°C

Operating Temperature Range ........................................–40°C to +85°C

Storage Temperature Range .........................................–65°C to +125°C

Lead Temperature (soldering, 10s) ............................................... +300°C

ESD damage can range from subtle performance

degradation to complete device failure. Precision integrated

circuits may be more susceptible to damage because very

small parametric changes could cause the device not to meet

its published specifications.

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”

may cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

PACKAGE/ORDERING INFORMATION

SPECIFIED

PACKAGE

TEMPERATURE

RANGE

PACKAGE

MARKING

ORDERING

NUMBER

TRANSPORT

MEDIA, QUANTITY

PRODUCT

MONOTONICITY PACKAGE-LEAD DESIGNATOR⁽¹⁾

DAC7642VF

14 Bits

LQFP-32

VF

–40°C to +85°C

DAC7642

DAC7642VFT

DAC7642VFR

Tape and Reel, 250

Tape and Reel, 1000

"

DAC7642VFB

15 Bits

LQFP-32

VF

–40°C to +85°C

DAC7642B

DAC7642VFBT

Tape and Reel, 250

"

DAC7642VFBR Tape and Reel, 1000

DAC7643VF

14 Bits

LQFP-32

VF

–40°C to +85°C

DAC7643

DAC7643VFT

DAC7643VFR

Tape and Reel, 250

Tape and Reel, 1000

"

DAC7643VFB

15 Bits

LQFP-32

VF

–40°C to +85°C

DAC7643B

DAC7643VFBT

Tape and Reel, 250

"

DAC7643VFBR Tape and Reel, 1000

NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.

DAC7642, DAC7643

2

SBAS233

www.ti.com

ELECTRICAL CHARACTERISTICS (Dual Supply)

At T_A= T_MINto T_MAX, V_CC= +5V, V_SS= –5V, V_REFH = +2.5V, and V_REFL = –2.5V, unless otherwise noted.

DAC7642VF

DAC7643VF

DAC7642VFB

DAC7643VFB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

ACCURACY

Linearity Error

Linearity Match

±3

±4

±2

±4

±3

±2

±1

±3

±2

LSB

Bits

mV

ppm/°C

mV

ppm/°C

mV

ppm/V

Differential Linearity Error

Monotonicity, T_MINto T_MAX

Bipolar Zero Error

Bipolar Zero Error Drift

Full-Scale Error

Full-Scale Error Drift

Bipolar Zero Matching

Full-Scale Matching

Power-Supply Rejection Ratio (PSRR)

14

15

±1

5

±1

5

±1

10

±3

10

±3

10

±3

ꢀ

±1

ꢀ

±3

ꢀ

Channel-to-Channel Matching

At Full-Scale

±3

100

ANALOG OUTPUT

Voltage Output

Output Current

Maximum Load Capacitance

Short-Circuit Current

Short-Circuit Duration

R

_L= 10kΩ

V_REF

–1.25

L

V_REF

+1.25

H

ꢀ

V

mA

pF

No Oscillation

500

–10, +30

Indefinite

ꢀ

mA

GND, V_CCor V_SS

REFERENCE INPUT

Ref High Input Voltage Range

Ref Low Input Voltage Range

Ref High Input Current

V_REFL + 1.25

–2.5

+2.5

V_REFH – 1.25

ꢀ

V

µA

500

–500

ꢀ

Ref Low Input Current

DYNAMIC PERFORMANCE

Settling Time

Channel-to-Channel Crosstalk

Digital Feedthrough

Output Noise Voltage

DAC Glitch

To ±0.003%, 5V Output Step

8

0.5

2

60

40

10

ꢀ

µs

LSB

nV-s

nV/√Hz

nV-s

See Figure 5

f = 10kHz

7FFF_Hto 8000_Hor 8000_Hto 7FFF_H

DIGITAL INPUT

V_IH

V_IL

I_IH

0.7 • V_CC

ꢀ

V

µA

0.3 • V_CC

±10

ꢀ

I_IL

DIGITAL OUTPUT

V_OH

V_OL

I_OH= –0.8mA

I_OL= 1.2mA

3.6

4.5

0.3

ꢀ

V

0.4

ꢀ

POWER SUPPLY

V_CC

V_SS

I_CC

I_SS

Power

+4.75

–5.25

+5.0

–5.0

0.7

–0.8

7.5

+5.25

–4.75

1.1

ꢀ

V

mA

mW

–1.2

–40

ꢀ

11.5

+85

ꢀ

TEMPERATURE RANGE

Specified Performance

ꢀ

°C

ꢀ Specifications same as DAC7642VF and DAC7643VF.

DAC7642, DAC7643

3

SBAS233

www.ti.com

ELECTRICAL CHARACTERISTICS (Single Supply)

At T_A= T_MINto T_MAX, V_CC= +5V, V_SS= 0V, V_REFH = +2.5V, and V_REFL = 0V, unless otherwise noted.

DAC7642VF

DAC7643VF

DAC7642VFB

DAC7643VFB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

ACCURACY

Linearity Error⁽¹⁾

Linearity Match

Differential Linearity Error

Monotonicity, T_MINto T_MAX

Zero-Scale Error

Zero-Scale Error Drift

Full-Scale Error

Full-Scale Error Drift

Zero-Scale Matching

Full-Scale Matching

Power-Supply Rejection Ratio (PSRR)

±3

±4

±2

±4

±3

±2

±1

±3

±2

LSB

Bits

mV

ppm/°C

mV

ppm/°C

mV

ppm/V

14

15

±1

5

±1

5

±1

10

±3

10

±3

10

±3

ꢀ

±1

ꢀ

±3

ꢀ

Channel-to-Channel Matching

At Full-Scale

±3

100

ANALOG OUTPUT

Voltage Output

Output Current

Maximum Load Capacitance

Short-Circuit Current

Short-Circuit Duration

R_L= 10kΩ

No Oscillation

GND or V_CC

0

V_REF

+1.25

H

ꢀ

V

mA

pF

–1.25

500

–10, +30

Indefinite

ꢀ

mA

REFERENCE INPUT

Ref High Input Voltage Range

Ref Low Input Voltage Range

Ref High Input Current

V_REFL + 1.25

0

+2.5

V_REFH – 1.25

ꢀ

V

µA

250

–250

ꢀ

Ref Low Input Current

DYNAMIC PERFORMANCE

Settling Time

Channel-to-Channel Crosstalk

Digital Feedthrough

Output Noise Voltage, f = 10kHz

DAC Glitch

To ±0.003%, 2.5V Output Step

8

0.5

2

60

40

10

ꢀ

µs

LSB

nV-s

nV/√Hz

nV-s

See Figure 6

7FFF_Hto 8000_Hor 8000_Hto 7FFF_H

DIGITAL INPUT

V_IH

V_IL

I_IH

0.7 • V_CC

ꢀ

V

µA

0.3 • V_CC

±10

ꢀ

I_IL

DIGITAL OUTPUT

V_OH

V_OL

I_OH= –0.8mA

I_OL= 1.2mA

3.6

4.5

0.3

ꢀ

V

0.4

ꢀ

POWER SUPPLY

V_CC

V_SS

I_CC

+4.75

0

+5.0

0

0.5

2.5

+5.25

0

0.9

4.5

ꢀ

V

mA

mW

Power

TEMPERATURE RANGE

Specified Performance

–40

+85

ꢀ

°C

ꢀ Specifications same as DAC7642VF and DAC7643VF.

NOTE: (1) If V_SS= 0V, specification applies at Code 0040_Hand above due to possible negative zero-scale error.

DAC7642, DAC7643

4

SBAS233

www.ti.com

PIN CONFIGURATION

Top View

LQFP

V_CC

GND

1

2

3

4

5

6

7

8

24 V_SS

23 DACSEL

22 RST

DB15

DB14

DB13

DB12

DB11

DB10

21 LOADDACS

20 R/W

DAC7642

DAC7643

19 CS

18 DB0

17 DB1

PIN DESCRIPTIONS

NAME

DESCRIPTION

NAME

DESCRIPTION

1

2

V_CC

GND

DB15

DB14

DB13

DB12

DB11

DB10

DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

CS

Positive Power Supply

Ground

20

R/W

Enabled by CS, Controls Data Read from and Write

to the Input Registers.

21

LOADDACS

RST

DAC Output Registers Load Control. Rising edge

triggered.TransfersDatafromtheInputRegistersto

the DAC Registers, Updating the DAC Output.

3

Data Bit 15, MSB

Data Bit 14

Data Bit 13

Data Bit 12

Data Bit 11

Data Bit 10

Data Bit 9

4

5

22

23

Reset, Rising Edge Triggered. DAC7642 resets to

mid-scale, DAC7643 resets to zero. (Resets Both

Input Registers and DAC Registers)

6

7

DACSEL

V_SS

Enabled by CS. Selects the individual DAC Input

Registers. (LOW Selects Register A, HIGH Selects

Register B)

8

9

10

11

12

13

14

15

16

17

18

19

Data Bit 8

24

25

26

Negative Power Supply

DAC B Voltage Output

Data Bit 7

V_OUT

B

Data Bit 6

V_OUTB Sense

DAC B Output Amplifier Inverting Input. Used to

close the feedback loop at the load.

Data Bit 5

27

28

29

30

31

V

_REFH Sense

V_REF

V_OUT

DAC A and B Reference High Sense Input

DAC A and B Reference High Input

DAC A and B Reference Low Input

Data Bit 4

H

Data Bit 3

L

Data Bit 2

V_REFL Sense

V_OUTA Sense

DAC A and B Reference Low Sense Input

Data Bit 1

DAC A Output Amplifier Inverting Input. Used to

close the feedback loop at the load.

Data Bit 0, LSB

Chip Select, Active LOW

32

V_OUTA

DAC A Output Voltage

DAC7642, DAC7643

5

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= 0V

At T_A= +25°C, V_CC= +5V, V_SS= 0V, V_REFH = +2.5V, V_REFL = 0V, representative unit, unless otherwise specified.

+25°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

(DAC B, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

+85°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +85°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +85°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

–40°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, –40°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

DAC7642, DAC7643

6

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= 0V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= 0V, V_REFH = +2.5V, V_REFL = 0V, representative unit, unless otherwise specified.

POSITIVE FULL-SCALE ERROR vs TEMPERATURE

NEGATIVE FULL-SCALE ERROR vs TEMPERATURE

3

2

3

2

Code (FFFF_H)

Code (0040_H)

DAC A

1

0

DAC B

–1

–2

–3

–1

–2

–3

–40

–15

10

35

60

85

–40

–15

10

35

60

85

Temperature (°C)

V

_REFH CURRENT vs CODE

V_REFL CURRENT vs CODE

(all DACs sent to indicated code)

0.30

0.25

0.20

0.15

0.10

0.05

0.00

–0.05

–0.10

–0.15

–0.20

–0.25

–0.30

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

SUPPLY CURRENT vs TEMPERATURE

SUPPLY CURRENT vs DIGITAL INPUT CODE

1

1.0

Data = FFFF_H(all DACs)

No Load

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0.0

All DACs

–40

–15

10

35

60

85

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Temperature (°C)

Digital Input Code

DAC7642, DAC7643

7

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= 0V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= 0V, V_REFH = +2.5V, V_REFL = 0V, representative unit, unless otherwise specified.

OUTPUT VOLTAGE vs SETTLING TIME

(0V to +2.5V)

OUTPUT VOLTAGE vs SETTLING TIME

(+2.5V to 2mV)

+5V

LDAC

0

Large-Signal Settling Time: 1V/div

Small-Signal Settling

Time: 500µV/div

Small-Signal Settling Time: 500µV/div

Large-Signal Settling Time: 1V/div

+5V

LDAC

0

Time (2µs/div)

OUTPUT VOLTAGE

vs MIDSCALE GLITCH PERFORMANCE

+5V

LDAC

0

+5V

LDAC

0

8000_Hto 7FFF_H

7FFF_Hto 8000_H

Time (1µs/div)

BROADBAND NOISE

OUTPUT NOISE VOLTAGE vs FREQUENCY

1000

100

10

100

1000

10000

100000

1000000

Time (10µs/div)

Frequency (Hz)

DAC7642, DAC7643

8

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= 0V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= 0V, V_REFH = +2.5V, V_REFL = 0V, representative unit, unless otherwise specified.

LOGIC SUPPLY CURRENT

V_OUTvs R_LOAD

vs LOGIC INPUT LEVEL FOR DIGITAL INPUTS

5

4

3

2

1

0

0.50

0.40

0.30

0.20

0.10

0.00

Typical of One

Digital Input

Source

Sink

0.01

0.1

1

10

100

0

1

2

3

4

5

R_LOAD(kΩ)

Logic Input Level for Digital Inputs (V)

V_SS= –5V

At T_A= +25°C, V_CC= +5V, V_SS= –5V, V_REFH = +2.5V, V_REFL = –2.5V, representative unit, unless otherwise specified.

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

+25°C

(DAC B, +25°C)

1.0

0.5

0

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

+85°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +85°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +85°C)

1.0

0.5

0

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

DAC7642, DAC7643

9

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= –5V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= –5V, V_REFH = +2.5V, V_REFL = –2.5V, representative unit, unless otherwise specified.

–40°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, –40°C)

1.0

0.5

0

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

V

_REFH CURRENT vs CODE

V_REFL CURRENT vs CODE

(all DACs sent to indicated code)

0.6

0.5

0.4

0.3

0.2

0.1

0.0

–0.1

–0.2

–0.3

–0.4

–0.5

–0.6

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

POSITIVE FULL-SCALE ERROR vs TEMPERATURE

BIPOLAR ZERO ERROR vs TEMPERATURE

3

Code (FFFF_H)

Code (8000_H)

2

1

2

1

DAC A

0

–1

–2

–3

–1

–2

–3

DAC B

–40

–15

10

35

60

85

–40

–15

10

35

60

85

Temperature (°C)

DAC7642, DAC7643

10

SBAS233

www.ti.com

TYPICAL CHARACTERISTICS: V_SS= –5V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= –5V, V_REFH = +2.5V, V_REFL = –2.5V, representative unit, unless otherwise specified.

NEGATIVE FULL-SCALE ERROR vs TEMPERATURE

SUPPLY CURRENT vs DIGITAL INPUT CODE

3

2

1.00

0.75

No Load

Code (0000_H)

DAC A

I_CC

0.50

1

0.25

0

0.00

–0.25

–0.50

–0.75

–1.00

DAC B

–1

–2

–3

I_SS

–40

–15

10

35

60

85

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Temperature (°C)

Digital Input Code

V_OUTvs R_LOAD

SUPPLY CURRENT vs TEMPERATURE

5

4

1

I_CC

Source

3

0.5

0

2

1

0

–1

–2

–3

–4

–5

–0.5

–1

Sink

I_SS

Data = FFFF_H(all DACs)

No Load

–1.5

0.01

0.1

1

10

100

–40

–15

10

35

60

85

R_LOAD(kΩ)

Temperature (°C)

OUTPUT VOLTAGE vs SETTLING TIME

(–2.5V to +2.5V)

(+2.5V to –2.5V)

+5V

LDAC

0

Large-Signal Settling Time: 2V/div

Small-Signal Settling Time:

500µV/div

Small-Signal Settling Time: 500µV/div

Large-Signal Settling Time: 2V/div

+5V

LDAC

0

Time (2µs/div)

DAC7642, DAC7643

11

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TYPICAL CHARACTERISTICS: V_SS= –5V (Cont.)

At T_A= +25°C, V_CC= +5V, V_SS= –5V, V_REFH = +2.5V, V_REFL = –2.5V, representative unit, unless otherwise specified.

OUTPUT VOLTAGE

vs MIDSCALE GLITCH PERFORMANCE

7FFF_Hto 8000_H

8000_Hto 7FFF_H

+5V

LDAC

0

+5V

LDAC

0

Time (1µs/div)

by the external voltage references V_REFL and V_REFH, respec-

tively. The digital input is a 16-bit parallel word and the DAC

input registers offer a readback capability. The converters

can be powered from either a single +5V supply or a dual

±5V supply. Each device offers a reset function which imme-

diately sets all DAC output voltages, DAC registers and Input

registers to mid-scale, code 8000_H(DAC7642), or to zero-

scale, code 0000_H(DAC7643). See Figures 2 and 3 for the

basic configurations of the DAC7642 and DAC7643.

THEORY OF OPERATION

The DAC7642 and DAC7643 are dual channel, voltage

output, 16-bit DACs. The architecture is an R-2R ladder

configuration with the three MSB’s segmented followed by an

operational amplifier that serves as a buffer. Each DAC has

its own R-2R ladder network, segmented MSBs, and output

op amp, as shown in Figure 1. The minimum voltage output

(zero-scale) and maximum voltage output (full-scale) are set

R_F

V_OUTSense

V_OUT

R

2R

V_REF

V_REFH Sense

V_REF

H

L

V_REFL Sense

FIGURE 1. DAC7642 and DAC7643 Architecture.

DAC7642, DAC7643

12

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0V to +2.5V

+2.5V

0V to +2.5V

32 31 30 29 28 27 26 25

V_OUTA

V_REFL

Sense

V_REFH

V_OUTB

Sense

V_OUTA

Sense

V_REFH

Sense

V_OUTB

V_REFL

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

V_CC

V_SS

+5V

1µF

0.1µF

GND

DACSEL

RST

SELECT DAC CHANNEL

RESET DAC REGISTERS

LOAD DAC REGISTERS

READ/WRITE

DB15

DB14

DB13

DB12

DB11

DB10

DAC7642

DAC7643

LDAC

R/W

DATA BUS

CS

CHIP SELECT

DB0

DATA BUS

DB1

DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2

10 11 12 13 14 15 16

9

FIGURE 2. Basic Single-Supply Operation of the DAC7642 and DAC7643.

–2.5V to

–2.5V

+2.5V

32 31 30 29 28 27 26 25

V_OUTA

V_REFL

Sense

V_REFH

V_OUTB

Sense

V_OUTA

Sense

V_REFH

Sense

V_OUTB

V_REFL

1µF

0.1µF

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

V_CC

V_SS

+5V

–5V

1µF

0.1µF

GND

DACSEL

RST

SELECT DAC CHANNEL

RESET DAC REGISTERS

LOAD DAC REGISTERS

READ/WRITE

DB15

DB14

DB13

DB12

DB11

DB10

DAC7642

DAC7643

LDAC

R/W

DATA BUS

CS

CHIP SELECT

DB0

DATA BUS

DB1

DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2

10 11 12 13 14 15 16

9

FIGURE 3. Basic Dual-Supply Operation of the DAC7642 and DAC7643.

DAC7642, DAC7643

13

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ANALOG OUTPUTS

When V_SS= –5V (dual-supply operation), the output amplifier

can swing to within 2.25V of the supply rails over the –40°C

to +85°C temperature range. When V_SS= 0V (single-supply

operation), and with R_LOADalso connected to ground, the

output can swing to ground. Care must also be taken when

measuring the zero-scale error when V_SS= 0V. Since the

DAC output cannot swing below ground, the output voltage

may not change for the first few digital input codes (0000_H,

0001_H, 0002_H, etc.) if the output amplifier has a negative

offset. At the negative limit of –2mV, the first specified output

starts at code 0040_H.

R_W2

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

_REFH 28

A

32

R_W1

V_OUT

V

+V

DAC7642

DAC7643

V

+2.5V

V_OUT

V

_REFH Sense 27

_OUTB Sense 26

R_W1

V

V_OUT

B

25

R_W2

Due to the high accuracy of these DACs, system design

problems such as grounding and contact resistance become

very important. A 16-bit converter with a 2.5V full-scale range

has a 1LSB value of 38µV. With a load current of 1mA, a series

wiring and connector resistance of only 40mΩ (R_W2) will cause

a voltage drop of 40µV, as shown in Figure 4. To understand

what this means in terms of a system layout, the resistivity of

a typical 1 ounce copper-clad printed circuit board is 1/2 mΩ

per square. For a 1mA load, a 10 milli-inch wide printed circuit

conductor 600 milli-inches long will result in a voltage drop of

30µV.

FIGURE 4. Analog Output Closed-Loop Configuration. R_W

represents wiring resistances.

that V_SS(the negative power supply) must either be con-

nected to ground or must be in the range of –4.75V to

–5.25V. The voltage on V_SSsets several bias points within

the converter. If V_SSis not in one of these two configurations,

the bias values may be in error and proper operation of the

device may be affected.

The DAC7642 and DAC7643 offer a force and sense output

configuration for the high open-loop gain output amplifiers.

This feature allows the loop around the output amplifier to be

closed at the load (shown in Figure 4), thus ensuring an

accurate output voltage.

The current into the V_REFH input and out of V_REFL depends

on the DAC output voltages and can vary from a few

microamps to approximately 0.5mA. The reference input

appears as a varying load to the reference. If the references

applied can sink or source the required current, a reference

buffer is not required. The DAC7642 and DAC7643 feature

reference drive and sense connections such that the internal

errors caused by the changing reference current and the

circuit impedances can be minimized. Figures 5 through 13

show different reference configurations and the effect on the

linearity and differential linearity.

REFERENCE INPUTS

The reference inputs, V_REFL and V_REFH, can be any voltage

between V_SS+ 2.5V and V_CC– 2.5V provided that V_REFH is

at least 1.25V greater than V_REFL. The minimum output of

each DAC is equal to V_REFL plus a small offset voltage

(essentially, the offset of the output op amp). The maximum

output is equal to V_REFH plus a similar offset voltage. Note

+V

OPA2234

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

_REFH 28

A

32

V

–2.5V

2200pF

100Ω

V

1000pF

–V

V

DAC7642

DAC7643

+V

V

100Ω

V

_REFH Sense 27

_OUTB Sense 26

+2.5V

2200pF

V

V_OUTB 25

V_OUT

–V

FIGURE 5. Dual Supply Configuration-Buffered References, Used for Dual-Supply Characteristic Curves.

DAC7642, DAC7643

14

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+V

OPA2350

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

_REFH 28

A

32

V

2200pF

100Ω

2kΩ

V

1000pF

+0.050V

V

DAC7642

DAC7643

98kΩ

+V

V

100Ω

V

_REFH Sense 27

_OUTB Sense 26

+2.5V

2200pF

V

V_OUTB 25

V_OUT

FIGURE 6. Single-Supply Buffered Reference with V_REFL of 50mV.

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

FIGURE 8. Integral Linearity and Differential Linearity Error

Curves for Figure 9.

FIGURE 7. Integral Linearity and Differential Linearity Error

Curves for Figure 6.

+V

OPA2350

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

_REFH 28

A

32

V

+1.25V

2200pF

100Ω

V

1000pF

V

DAC7642

DAC7643

+V

V

100Ω

V

_REFH Sense 27

_OUTB Sense 26

+2.5V

2200pF

V

_OUTB 25

V_OUT

FIGURE 9. Single-Supply Buffered Reference with V_REFL = +1.25V and V_REFH = +2.5V.

DAC7642, DAC7643

15

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V_OUT

V_OUTA Sense 31

_REFL Sense 30

V_REF

29

_REFH 28

V_REFH Sense 27

_OUTB Sense 26

V_OUT

25

A

32

+V

V

OPA2350

L

DAC7642

DAC7643

+V

V

100Ω

1000pF

+2.5V

2200pF

V

B

V_OUT

FIGURE 10. Single-Supply Buffered V_REFH.

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

FIGURE 11. Linearity and Differential Linearity Error Curves

for Figure 10.

FIGURE 13. Linearity and Differential Linearity Error Curves

for Figure 12.

DIGITAL INTERFACE

See Table I for the basic control logic of the DAC7642 and

DAC7643. Note that each internal register is edge triggered

and not level triggered. When the LOADDACS signal is

transitioned from LOW to HIGH, the digital word existing in

the input register is latched into the DAC register. The first

set of registers (the input registers) are triggered via the

DACSEL, R/W, and CS inputs. Only one of these registers

can be transparent at any given time.

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

V_REF

28

A

32

V

+V

DAC7642

DAC7643

V

H

+2.5V

V

_REFH Sense 27

_OUTB Sense 26

The double-buffered architecture is designed mainly so each

DAC input register can be written to at any time without

affecting the DAC outputs. All DAC voltages are updated

simultaneously by the rising edge of LOADDACS. It also

allows multiple devices to be updated simultaneously by

sharing the LOADDACS control from the host with each

device.

V

_OUTB 25

V_OUT

FIGURE 12. Low-Cost Single-Supply Configuration.

DAC7642, DAC7643

16

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INPUT

DAC

DACSEL

R/W

CS

RST

LOADDACS

REGISTER

MODE

DAC

L

H

L

H

X

L

L, H

↑

X

↑

Write

Read

Hold

Write

Hold

Reset

Write Input

Read Input

Update

A

B

A

H

X

L

B

H

X

All

L, H

Hold

Reset

Hold

Reset

TABLE I. DAC7642 and DAC7643 Logic Truth Table.

DIGITAL TIMING

Figure 14 and Table II provide detailed timing for the digital

interface of the DAC7642 and DAC7643.

V

_REFH – V_REFL •N

(

)

V_OUT= V_REFL +

65,536

(1)

where N is the digital input code. This equation does not

include the effects of offset (zero-scale) or gain (full-scale)

errors.

DIGITAL INPUT CODING

The DAC7642 and DAC7643 input data is in Straight Binary

format. The output voltage is given by Equation 1:

t_WCS

CS

t_WS

t_WH

R/W

t_RCS

t_AH

CS

t_AS

t_RDH

t_RDS

DACSEL

t_LH

R/W

t_LS

t_LWD

t_LX

t_AS

t_AH

±0.003% of FSR

Error Band

LOADDACS

Data In

DACSEL

Data Out

t_DH

t_DS

t_DZ

t_S

Data Valid

t_CSD

V_OUT

Data Read Timing

Data Write Timing

±0.003% of FSR

Error Band

t_RSH

t_RSS

RST

t_S

+FS

(DAC7643)

(DAC7642)

V_OUT

Zero-Scale

Midscale

–FS

+FS

V_OUT

–FS

FIGURE 14. Digital Input and Output Timing.

DAC7642, DAC7643

17

SBAS233

www.ti.com

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

t_RCS

t_RDS

t_RDH

t_DZ

t_CSD

t_WCS

t_WS

t_WH

t_AS

t_AH

t_LS

t_LH

t_LX

t_DS

t_DH

t_LWD

t_RSS

t_RSH

t_S

CS LOW for Read

R/W HIGH to CS LOW

R/W HIGH after CS HIGH

CS HIGH to Data Bus in High Impedance

CS LOW to Data Bus Valid

CS LOW for Write

150

10

ns

µs

10

100

150

100

40

0

10

0

10

30

100

0

10

100

10

R/W LOW to CS LOW

R/W LOW after CS HIGH

DACSEL Valid to CS LOW

DACSEL Valid after CS HIGH

CS LOW to LOADDACS HIGH

CS LOW after LOADDACS HIGH

LOADDACS HIGH

Data Valid to CS LOW

Data Valid after CS HIGH

LOADDACS LOW

RESET LOW

RESET HIGH

Settling Time

10

TABLE II. Timing Specifications (T_A= –40°C to +85°C).

DIGITALLY-PROGRAMMABLE

CURRENT SOURCE

Figure 15 shows a DAC7642 and DAC7643 in a 4-20mA

current output configuration. The output current can be

determined by Equation 3:

The DAC7642 and DAC7643 offer a unique set of features

that allows a wide range of flexibility in designing applications

circuits, such as programmable current sources. The

DAC7642 and DAC7643 offer both a differential reference

input, as well as an open-loop configuration around the

output amplifier. The open-loop configuration around the

output amplifier allows a transistor to be placed within the

loop to implement a digitally-programmable, unidirectional

current source. The availability of a differential reference also

allows programmability for both the full-scale and zero-scale

currents. The output current is calculated as:

(3)

2.5V – 0.5V

125Ω

N Value

65,536

0.5V

I_OUT

=

•

+

125Ω

At full-scale, the output current is 16mA plus the 4mA for the

zero current. At zero scale the output current is the offset

current of 4mA (0.5V/125Ω).

V_REFH – V_REF

L

N Value

65,536

I_OUT

=

•

R_SENSE

(2)

+ V_REFL /R_SENSE

(

)

I_OUT

+V

V_PROGRAMMED

125Ω

OPA2350

V_OUT

_OUTA Sense 31

_REFL Sense 30

_REFL 29

_REFH 28

A

32

V

2200pF

100Ω

20kΩ

V

1000pF

V

DAC7642

DAC7643

80kΩ

+V

V

100Ω

V_REFH Sense 27

V_OUTB Sense 26

+2.5V

2200pF

V

_OUTB 25

I_OUT

V_PROGRAMMED

125Ω

FIGURE 15. 4-20mA Digitally Controlled Current Source.

18

DAC7642, DAC7643

SBAS233

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PACKAGE DRAWING

VF (S-PQFP-G32)

MTQF002B – JANUARY 1995 – REVISED MAY 2000

PLASTIC QUAD FLATPACK

0,45

0,25

0,20

M

0,80

24

17

25

16

32

9

0,13 NOM

1

8

5,60 TYP

7,20

SQ

6,80

Gage Plane

9,20

8,80

SQ

0,25

0,05 MIN

0°–7°

1,45

1,35

0,75

0,45

Seating Plane

0,10

1,60 MAX

4040172/D 04/00

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

DAC7642, DAC7643

19

SBAS233

www.ti.com

IMPORTANT NOTICE

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enhancements, improvements, and other changes to its products and services at any time and to discontinue

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for

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型号：	DAC7643VFBR
厂家：	TEXAS INSTRUMENTS
描述：	16-Bit, Dual Voltage Output DIGITAL-TO-ANALOG CONVERTER 16位，双电压输出数位类比转换器转换器数模转换器
文件：	总20页 (文件大小：769K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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