CY74FCT16501ATPVC [TI]
18-Bit Registered Transceivers; 18位寄存收发器型号: | CY74FCT16501ATPVC |
厂家: | TEXAS INSTRUMENTS |
描述: | 18-Bit Registered Transceivers |
文件: | 总8页 (文件大小:68K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
1CY74FCT162H501
T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
SCCS057 - August 1994 - Revised March 2000
18-Bit Registered Transceivers
Features
Functional Description
• FCT-E speed at 3.8 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6 mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
These 18-bit universal bus transceivers can be operated in
transparent, latched or clock modes by combining D-type
latches and D-type flip-flops. Data flow in each direction is
controlled by output enable (OEAB and OEBA), latch enable
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For
A-to-B data flow, the device operates in transparent mode
when LEAB is HIGH. When LEAB is LOW, the A data is latched
if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW,
the A bus data is stored in the latch/flip-flop on the
LOW-to-HIGH transition of CLKAB. OEAB performs the output
enable function on the B port. Data flow from B-to-A is similar
to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA.
The output buffers are designed with a power-off disable
feature to allow live insertion of boards.
CY74FCT16501T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
The CY74FCT16501T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
THE CY74FCT162501T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for minimal
CY74FCT162501T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
undershoot
and
reduced
ground
bounce.
The
CY74FCT162501T is ideal for driving transmission lines.
The CY74FCT162H501T is a 24-mA balanced output part, that
has “bus hold” on the data inputs. The device retains the input’s
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating inputs.
CY74FCT162H501T Features:
• Bus hold retains last active state
• Eliminates the need for external pull-up or pull-down
resistors
Pin Configuration
SSOP/TSSOP
Functional Block Diagram
Top View
OEAB
LEAB
1
2
56
55
GND
CLKAB
A
1
B
1
GND
3
4
54
53
GND
A
2
B
2
5
6
7
8
9
52
51
50
49
48
OEAB
CLKBA
LEBA
A
B
3
3
V
CC
V
CC
A
4
B
4
A
A
B
5
5
6
B
6
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OEBA
CLKAB
LEAB
GND
GND
A
7
B
7
A
A
B
8
8
9
B
9
A
A
A
B
10
10
C
D
C
D
B
11
B
1
11
12
A
1
B
12
GND
GND
B
13
A
13
C
D
C
D
A
B
14
14
A
B
15
15
V
CC
V
CC
A
A
B
16
16
17
B
17
GND
GND
B
18
FCT16501-1
TO 17 OTHER CHANNELS
A
18
CLKBA
GND
OEBA
LEBA
FCT16501-2
Copyright © 2000, Texas Instruments Incorporated
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Maximum Ratings[6, 7]
Pin Description
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Name
Description
OEAB
OEBA
LEAB
LEBA
A-to-B Output Enable Input
Storage Temperature .................................... −55°C to +125°C
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
Ambient Temperature with
Power Applied.................................................. −55°C to +125°C
B-to-A Latch Enable Input
DC Input Voltage................................................. −0.5V to +7.0V
DC Output Voltage.............................................. −0.5V to +7.0V
CLKAB A-to-B Clock Input
CLKBA B-to-A Clock Input
DC Output Current
(Maximum Sink Current/Pin)........................... −60 to +120 mA
A
A-to-B Data Inputs or B-to-A Three-State
Outputs[1]
Power Dissipation.......................................................... 1.0W
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
B
B-to-A Data Inputs or A-to-B Three-State
Outputs[1]
Operating Range
Function Table[2, 3]
Ambient
Range
Industrial
Temperature
VCC
Inputs
Outputs
B
−40°C to +85°C
5V ± 10%
OEAB
LEAB
CLKAB
A
L
H
H
H
X
H
H
L
X
X
X
X
L
Z
L
H
L
H
L
H
L
H
H
H
H
L
L
L
X
X
B[4]
B[5]
H
Notes:
1. On the 74FCT162H501T these pins have bus hold.
2. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, and CLKBA.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-impedance
= LOW-to-HIGH Transition
4. Output level before the indicated steady-state input conditions were established.
5. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.
6. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
7. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
2
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Electrical Characteristics Over the Operating Range
Parameter
Description
Input HIGH Voltage
Test Conditions
Min.
Typ.[8]
Max.
Unit
V
VIH
VIL
VH
VIK
IIH
2.0
Input LOW Voltage
Input Hysteresis[9]
0.8
V
100
mV
V
Input Clamp Diode Voltage
Input HIGH Current
VCC=Min., IIN=−18 mA
Standard VCC=Max., VI=VCC
Bus Hold
−0.7
−1.2
±1
µA
±100
±1
IIL
Input LOW Current
Standard VCC=Max., VI=GND
Bus Hold
µA
µA
µA
µA
mA
±100
IBBH
IBBL
Bus Hold Sustain Current on Bus Hold Input[10] VCC=Min.,
VI=2.0V
VI=0.8V
−50
+50
IBHHO
IBHLO
Bus Hold Overdrive Current on Bus Hold In-
put[10]
VCC=Max., VI=1.5V
TBD
±1
IOZH
High Impedance Output Current
(Three-State Output pins)
VCC=Max., VOUT=2.7V
µA
µA
IOZL
High Impedance Output Current
(Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
IOS
IO
Short Circuit Current[11]
Output Drive Current[11]
Power-Off Disable
VCC=Max., VOUT=GND
VCC=Max., VOUT=2.5V
VCC=0V, VOUT≤4.5V[12]
−80
−50
−140
−200
−180
±1
mA
mA
µA
IOFF
Output Drive Characteristics for CY74FCT16501T
Parameter
Description
Test Conditions
VCC=Min., IOH=−3 mA
Min.
2.5
Typ.[8]
3.5
Max.
Unit
VOH
Output HIGH Voltage
V
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−32 mA
VCC=Min., IOL=64 mA
2.4
3.5
2.0
3.0
VOL
Output LOW Voltage
0.2
0.55
V
Output Drive Characteristics for CY74FCT162501T, CY74FCT162H501T
Parameter
IODL
Description
Output LOW Current[11]
Output HIGH Current[11]
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
VCC=Min., IOH=−24 mA
Min.
60
Typ.[8]
115
Max.
150
Unit
mA
mA
V
IODH
−60
2.4
−115
3.3
−150
VOH
VOL
VCC=Min., IOL=24 mA
0.3
0.55
V
Notes:
8. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
9. This parameter is specified but not tested.
10. Pins with bus hold are described in Pin Description.
11. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
12. Tested at +25˚C.
3
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Capacitance[9] (TA = +25˚C, f = 1.0 MHz)
Parameter
CIN
Description
Input Capacitance
Output Capacitance
Test Conditions
Typ.[8] Max.
Unit
pF
VIN = 0V
4.5
5.5
6.0
8.0
COUT
VOUT = 0V
pF
Power Supply Characteristics
Sym.
Parameter
Test Conditions[13]
Min. Typ.[8]
Max.
Unit
ICC
Quiescent Power Supply
Current
VCC=Max.
VIN<0.2V
VIN>VCC−0.2V
—
—
—
5
500
µA
∆ICC
Quiescent Power Supply
Current TTL inputs HIGH
VCC= Max., VIN = 3.4V[14]
0.5
75
1.5
mA
ICCD
Dynamic Power Supply
Current[15]
VCC=Max., Outputs Open
OEAB=OEBA=VCC or GND
One Input Toggling,
VIN=VCC or
VIN=GND
120
µA/
MHz
50% Duty Cycle
IC
Total Power Supply
Current[16]
VCC=Max., Outputs Open
f0 =10MHz (CLKAB)
50% Duty Cycle
OEAB=OEBA=VCC
LEAB = GND, One Bit Toggling
f1 = 5MHz, 50% Duty Cycle
VIN=VCC or
VIN=GND
—
—
0.8
1.3
1.7
3.2
mA
VIN=3.4V or
VIN=GND
VCC=Max., Outputs Open
f0 = 10MHz (CLKAB)
50% Duty Cycle
OEAB=OEBA=VCC
LEAB=GND
VIN=VCC or
VIN=GND
—
—
3.8
8.5
6.5[17]
VIN=3.4V or
VIN=GND
20.8[17]
Eighteen Bits Toggling
f1=2.5MHz, 50% Duty Cycle
Notes:
13. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
14. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
15. This parameter is not directly testable, but is derived for use in Total Power Supply.
16. IC= IQUIESCENT + IINPUTS + IDYNAMIC
IC
=
=
=
=
=
=
=
=
=
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC
∆ICC
DH
NT
ICCD
f0
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
17. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
4
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Switching Characteristics Over the Operating Range[18]
CY74FCT16501AT
CY74FCT162501AT
CY74FCT162501CT
CY74FCT162H501CT CY74FCT162501ET
CY74FCT162H501ET
CY74FCT16501ET
Fig.
Unit No.[19]
Min.
Max.
Min.
Max.
Min.
Max.
Parameter
Description
fMAX
CLKAB or CLKBA
frequency[20]
—
150
—
150
—
150
MHz
—
tPLH
tPHL
Propagation Delay
A to B or B to A
1.5
1.5
1.5
5.1
5.6
5.6
1.5
1.5
1.5
4.6
5.3
5.3
1.5
1.5
1.5
3.8
4.2
4.2
ns
1,3
1,5
1,5
tPLH
tPHL
Propagation Delay
LEBA to A, LEAB to B
ns
tPLH
tPHL
Propagation Delay
CLKBA to A,
ns
CLKAB to B
tPZH
tPZL
Output Enable Time
OEBA to A, OEAB to B
1.5
1.5
3.0
6.0
5.6
—
1.5
1.5
3.0
5.6
5.2
—
1.5
1.5
2.4
4.8
5.2
—
ns
ns
ns
1,7,8
1,7,8
4
tPHZ
tPLZ
Output Disable Time
OEBA to A, OEAB to B
tSU
Set-Up Time,
HIGH or LOW
A to CLKAB,
B to CLKBA
tH
Hold Time
0
—
0
—
0
—
ns
4
HIGH or LOW
A to CLKAB,
B to CLKBA
tSU
Set-Up Time, Clock
HIGH or LOW LOW
3.0
1.5
1.5
—
—
—
3.0
1.5
1.5
—
—
—
2.0
1.5
0.5
—
—
—
ns
ns
ns
4
4
4
A to LEAB,
B to LEBA
HIGH
Clock
tH
Hold Time, HIGH or
LOW, A to LEAB,
B to LEBA
tW
tW
LEAB or LEBA Pulse
Width HIGH[20]
3.0
3.0
—
—
3.0
3.0
—
—
3.0
3.0
—
—
ns
ns
5
5
CLKAB or CLKBA
Pulse Width HIGH or
LOW[20]
tSK(O)
Output Skew[21]
—
0.5
—
0.5
—
0.5
ns
—
Notes:
18. Minimum limits are specified, but not tested, on propagation delays.
19. See “Parameter Measurement Information” in the General Information section.
20. This parameter is guaranteed but not tested.
21. Skew between any two outputs of the same package switching in the same direction. This parameter ensured by design.
5
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Ordering Information CY74FCT16501T
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
Package Type
56-Lead (240-Mil) TSSOP
3.8
CY74FCT16501ETPACT
Z56
O56
O56
Industrial
CY74FCT16501ETPVC/PVCT
CY74FCT16501ATPVC/PVCT
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
5.1
Industrial
Ordering Information CY74FCT162501T
Speed
(ns)
Package
Operating
Range
Ordering Code
74FCT162501ETPACT
CY74FCT162501ETPVC
74FCT162501ETPVCT
74FCT162501CTPACT
CY74FCT162501CTPVC
74FCT162501CTPVCT
74FCT162501ATPACT
CY74FCT162501ATPVC
74FCT162501ATPVCT
Name
Package Type
3.8
4.6
5.1
Z56
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (300-Mil) SSOP
Industrial
Industrial
Industrial
O56
O56
Z56
O56
O56
Z56
O56
O56
Ordering Information CY74FCT162H501T
Speed
(ns)
Package
Operating
Range
Ordering Code
74FCT162H501ETPACT
74FCT162H501ETPVC/PVCT
74FCT162H501CTPACT
74FCT162H501CTPVC/PVCT
Name
Package Type
3.8
Z56
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
56-Lead (240-Mil) TSSOP
56-Lead (300-Mil) SSOP
Industrial
O56
Z56
4.6
Industrial
O56
6
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Package Diagrams
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package Z56
7
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
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