CSD17305Q5A_10 [TI]
The NexFET power MOSFET has been designed to minimize losses in power conversion applications, and optimized for 5V gate drive applications.; 该NexFET功率MOSFET的设计是为了尽量减少电源转换应用的损失,并为5V栅极驱动应用进行了优化。型号: | CSD17305Q5A_10 |
厂家: | TEXAS INSTRUMENTS |
描述: | The NexFET power MOSFET has been designed to minimize losses in power conversion applications, and optimized for 5V gate drive applications. |
文件: | 总11页 (文件大小:510K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CSD17305Q5A
www.ti.com
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
30V, N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD17305Q5A
1
FEATURES
PRODUCT SUMMARY
2
•
•
•
•
•
•
•
•
Optimized for 5V Gate Drive
VDS
Qg
Drain to Source Voltage
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
30
14.1
3
V
Ultralow Qg and Qgd
nC
nC
mΩ
mΩ
mΩ
V
Low Thermal Resistance
Avalanche Rated
Qgd
VGS = 3V
3.9
2.8
2.4
RDS(on) Drain to Source On Resistance
VGS = 4.5V
VGS = 8V
Pb Free Terminal Plating
RoHS Compliant
VGS(th)
Threshold Voltage
1.1
Halogen Free
SON 5-mm × 6-mm Plastic Package
ORDERING INFORMATION
Device
CSD17305Q5A
Package
Media
Qty
Ship
APPLICATIONS
SON 5-mm × 6-mm
Plastic Package
13-Inch
Reel
Tape and
Reel
2500
•
Notebook Point of Load
•
Point-of-Load Synchronous Buck in
Networking, Telecom and Computing Systems
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise stated
VALUE
UNIT
V
DESCRIPTION
VDS
VGS
Drain to Source Voltage
30
Gate to Source Voltage
+10 / –8
100
V
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications,
and optimized for 5V gate drive applications.
Continuous Drain Current, TC = 25°C
Continuous Drain Current(1)
Pulsed Drain Current, TA = 25°C(2)
Power Dissipation(1)
A
ID
29
A
IDM
PD
TJ,
181
A
Top View
3.1
W
Operating Junction and Storage
–55 to 150
304
°C
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
TSTG Temperature Range
Avalanche Energy, single pulse
ID = 78A, L = 0.1mH, RG = 25Ω
EAS
mJ
(1) Typical RqJA
=
40°C/W on
a
1-inch2 (6.45-cm2),
2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick
FR4 PCB.
D
(2) Pulse duration ≤300ms, duty cycle ≤2%
D
P0093-01
RDS(on) vs VGS
GATE CHARGE
10
9
8
7
6
5
4
3
2
1
0
8
ID = 30A
ID = 30A
VDS = 15V
7
6
5
4
3
2
1
0
TC = 125°C
TC = 25°C
0
1
2
3
4
5
6
7
8
9
10
0
5
10
15
20
25
VGS - Gate-to-Source Voltage - V
Qg - Gate Charge - nC
G006
G003
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
CSD17305Q5A
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Static Characteristics
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BVDSS
IDSS
Drain to Source Voltage
VGS = 0V, ID = 250mA
30
V
mA
nA
V
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
VGS = 0V, VDS = 24V
VDS = 0V, VGS = +10/-8V
VDS = VGS, ID = 250mA
VGS = 3V, ID = 30A
1
100
1.6
5.4
3.6
3.4
IGSS
VGS(th)
0.9
1.1
3.9
2.8
2.4
139
mΩ
mΩ
mΩ
S
RDS(on)
Drain to Source On Resistance
Transconductance
VGS = 4.5V, ID = 30A
VGS = 8V, ID = 30A
gfs
VDS = 15V, ID = 30A
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
2000
1100
79
2600
1430
103
2
pF
pF
pF
Ω
VGS = 0V, VDS = 15V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
1
Qg
14.1
3
18.3
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 15V,
ID = 30A
4.5
2.2
27
VDS = 13.5V, VGS = 0V
Turn On Delay Time
Rise Time
8.9
16.5
20
VDS = 15V, VGS = 4.5V, ID = 30A
RG = 2Ω
td(off)
tf
Turn Off Delay Time
Fall Time
7.9
Diode Characteristics
VSD
Qrr
trr
Diode Forward Voltage
ISD = 30A, VGS = 0V
0.85
34
1
V
Reverse Recovery Charge
Reverse Recovery Time
nC
ns
VDD= 13.5V, IF = 30A,
di/dt = 300A/ms
27
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Thermal Resistance Junction to Case(1)
Thermal Resistance Junction to Ambient(1) (2)
MIN
TYP
MAX
UNIT
°C/W
°C/W
RqJC
RqJA
1.3
50
(1)
R
qJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
2
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CSD17305Q5A
CSD17305Q5A
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SLPS254A –FEBRUARY 2010–REVISED JULY 2010
GATE
Source
GATE
Source
Max RqJA = 50°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Max RqJA = 120°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
DRAIN
DRAIN
M0137-02
M0137-01
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
10
1
0.5
0.3
Duty Cycle = t1/t2
0.1
0.1
0.05
P
0.02
0.01
t1
0.01
t2
Typical RqJA = 96°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
Single Pulse
0.001
0.001
0.01
0.1
1
10
100
1k
tp - Pulse Duration - s
G012
Figure 1. Transient Thermal Impedance
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): CSD17305Q5A
CSD17305Q5A
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
VDS = 5V
TC = 125°C
VGS = 8V
VGS = 4.5V
TC = 25°C
TC = -55°C
VGS = 3.5V
VGS = 3V
VGS = 2.5V
0
0.1
0.2
0.3
0.4
0.5
0.6
0
0.5
1
1.5
2
2.5
3
VDS - Drain-to-Source Voltage - V
VGS - Gate-to-Source Voltage - V
G001
G002
Figure 2. Saturation Characteristics
TEXT ADDED FOR SPACING
Figure 3. Transfer Characteristics
TEXT ADDED FOR SPACING
8
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
ID = 30A
VDS = 15V
f = 1MHz
VGS = 0V
Coss = Cds + Cgd
Ciss = Cgd + Cgs
Crss = Cgd
0
5
10
15
20
25
0
5
10
15
20
25
30
Qg - Gate Charge - nC
VDS - Drain-to-Source Voltage - V
G003
G004
Figure 4. Gate Charge
Figure 5. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.6
1.4
1.2
1
10
9
8
7
6
5
4
3
2
1
0
ID = 250µA
ID = 30A
TC = 125°C
0.8
0.6
0.4
0.2
0
TC = 25°C
-75
-25
25
75
125
175
0
1
2
3
4
5
6
7
8
9
10
TC - Case Temperature - °C
VGS - Gate-to-Source Voltage - V
G005
G006
Figure 6. Threshold Voltage vs. Temperature
Figure 7. On-State Resistance vs. Gate to Source Voltage
4
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CSD17305Q5A
CSD17305Q5A
www.ti.com
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.8
1.6
1.4
1.2
1
100
10
ID = 30A
VGS = 8V
TC = 125°C
1
0.1
0.8
0.6
0.4
0.2
TC = 25°C
0.01
0.001
0.0001
-75
-25
25
75
125
175
0
0.2
0.4
0.6
0.8
1
TC - Case Temperature - °C
VSD - Source-to-Drain Voltage - V
G007
G008
Figure 8. Normalized On-State Resistance vs. Temperature
Figure 9. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1k
1k
100
10
100
1ms
TC = 25°C
10
10ms
110000m1s
1
TC = 125°C
Area Limited
by RDS(on)
1s
0.1
Single Pulse
DC
Typical RθJA = 96°C/W (min Cu)
0.01
1
0.01
0.1
1
10
100
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage - V
t(AV) - Time in Avalanche - ms
G009
G010
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
120
100
80
60
40
20
0
-50
-25
0
25
50
75
100 125 150 175
TC - Case Temperature - °C
G011
Figure 12. Maximum Drain Current vs. Temperature
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): CSD17305Q5A
CSD17305Q5A
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
www.ti.com
MECHANICAL DATA
Q5A Package Dimensions
E2
L
H
K
q
L1
Top View
Side View
Bottom View
q
E1
E
Front View
M0135-01
MILLIMETERS
NOM
1.00
DIM
MIN
0.90
0.33
0.20
4.80
3.61
5.90
5.70
3.38
1.17
0.41
1.10
0.51
0.06
0°
MAX
1.10
0.51
0.34
5.00
4.02
6.10
5.80
3.78
1.37
0.71
A
b
0.41
c
0.25
D1
D2
E
4.90
3.81
6.00
E1
E2
e
5.75
3.58
1.27
H
0.56
K
L
0.61
0.13
0.71
0.20
12°
L1
q
6
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CSD17305Q5A
CSD17305Q5A
www.ti.com
SLPS254A –FEBRUARY 2010–REVISED JULY 2010
MILLIMETERS
INCHES
DIM
Recommended PCB Pattern
MIN
MAX
6.305
4.56
4.56
0.7
MIN
MAX
0.248
0.18
F1
F1
F2
6.205
4.46
4.46
0.65
0.62
0.63
0.7
0.244
0.176
0.176
0.026
0.024
0.025
0.028
0.026
0.024
0.193
0.176
F7
F6
F3
0.18
F4
0.028
0.026
0.027
0.031
0.028
0.026
0.197
0.18
F5
0.67
0.68
0.8
F6
F7
F8
0.65
0.62
4.9
0.7
F9
0.67
5
F10
F11
4.46
4.56
F10
M0139-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
Q5A Tape and Reel Information
K0
4.00 0.10 ꢀ(SS ꢁNoS 1ꢂ
0.30 0.05
2.00 0.05
+0.10
–0.00
Ø 1.50
B0
A0
8.00 0.10
R 0.30 MAX
Ø 1.50 MIꢁ
R 0.30 TYP
A0 = 6.50 0.10
B0 = 5.30 0.10
K0 = 1.40 0.10
M0138-01
Notes:
1. 10-sprocket hole-pitch cumulative tolerance ±0.2
2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm
3. Material: black static-dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified)
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket
Copyright © 2010, Texas Instruments Incorporated
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SLPS254A –FEBRUARY 2010–REVISED JULY 2010
www.ti.com
REVISION HISTORY
Changes from Original (February 2010) to Revision A
Page
•
•
•
Updated the Q5A Package Dimensions table. DIM c MAX was 0.30, DIM D2 MAX was 3.96, DIM e MIN was blank
MAX was blank, DIM H NOM was 0.51 MAX was 0.61 ....................................................................................................... 6
Deleted Note 6 from the Q5A Tape and Reel Information - "MSL1 260°C (IR and convection) PbF reflow
compatible" ........................................................................................................................................................................... 7
Deleted the Package Marking Information section ............................................................................................................... 7
8
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PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD17305Q5A
SON
DQJ
8
2500
330.2
12.4
6.5
5.3
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SON DQJ
SPQ
Length (mm) Width (mm) Height (mm)
347.0 342.0 55.0
CSD17305Q5A
8
2500
Pack Materials-Page 2
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