CSD17313Q2 [TI]
30V N-Channel NexFET™ Power MOSFET; 30V N通道NexFET™功率MOSFET
| 型号： | CSD17313Q2 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 30V N-Channel NexFET™ Power MOSFET |
| 文件： | 总9页 (文件大小：318K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSD17313Q2
www.ti.com
SLPS260A –MARCH 2010–REVISED MARCH 2010
30V N-Channel NexFET™ Power MOSFET
PRODUCT SUMMARY
Drain to Source Voltage
1
FEATURES
VDS
Qg
30
2.1
0.4
V
•
•
•
•
•
•
•
Optimized for 5V Gate Drive
Ultra Low Qg and Qgd
Low Thermal Resistance
Pb Free
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
nC
nC
mΩ
mΩ
mΩ
V
Qgd
VGS = 3V
31
26
24
RDS(on) Drain to Source On Resistance
VGS = 4.5V
VGS = 8V
RoHS Compliant
VGS(th)
Threshold Voltage
1.3
Halogen Free
SON 2-mm × 2-mm Plastic Package
Text Added For Spacing
ORDERING INFORMATION
APPLICATIONS
•
•
Device
CSD17313Q2
Package
Media
Qty
Ship
DC-DC Converters
Battery and Load Management Applications
SON 2-mm × 2-mm
Plastic Package
13-Inch
Reel
Tape and
Reel
3000
DESCRIPTION
Text Added For Spacing
ABSOLUTE MAXIMUM RATINGS
The NexFET power MOSFET has been designed to
minimize losses in power conversion applications and
optimized for 5V gate drive applications. The 2-mm ×
2-mm SON offers excellent thermal performance for
the size of the package.
TA = 25°C unless otherwise stated
VALUE
UNIT
V
VDS
VGS
Drain to Source Voltage
30
Gate to Source Voltage
+10 / –8
V
Continuous Drain Current, TC = 25°C
Continuous Drain Current(1)
Pulsed Drain Current, TA = 25°C(2)
Power Dissipation
5
5
A
ID
A
Top View
IDM
PD
20
2.3
A
W
D
D
G
1
2
3
6
5
4
D
D
S
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
18
°C
D
Avalanche Energy, Single Pulse,
ID = 19A, L = 0.1mH, RG = 25Ω
EAS
mJ
(1) Package Limited
(2) Pulse duration ≤300ms, duty cycle ≤2%
S
P0108-01
Text For Spacing
RDS(on) vs VGS
Text For Spacing
GATE CHARGE
80
70
60
50
40
30
20
10
0
8
ID = 4A
ID = 4A
VDS = 15V
7
6
5
4
3
2
1
0
TC = 125°C
TC = 25°C
0
1
2
3
4
5
6
7
8
9
10
0
0.5
1
1.5
2
2.5
3
3.5
4
VGS - Gate-to-Source Voltage - V
Qg - Gate Charge - nC
G006
G003
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
SLPS260A –MARCH 2010–REVISED MARCH 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Static Characteristics
TEST CONDITIONS
MIN
TYP MAX UNIT
BVDSS
IDSS
Drain to Source Voltage
VGS = 0V, ID = 250mA
30
V
Drain to Source Leakage
Gate to Source Leakage
Gate to Source Threshold Voltage
VGS = 0V, VDS = 24V
VDS = 0V, VGS = +10 / -8V
VDS = VGS, ID = 250mA
VGS = 3V, ID = 4A
1
100
1.8
42
mA
nA
V
IGSS
VGS(th)
0.9
1.3
31
26
24
16
mΩ
mΩ
mΩ
S
RDS(on)
Drain to Source On Resistance
Transconductance
VGS = 4.5V, ID = 4A
VGS = 8V, ID = 4A
32
30
gfs
VDS = 15V, ID = 4A
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
260 340
140 180
pF
pF
pF
Ω
VGS = 0V, VDS = 15V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance
Gate Charge Total (4.5V)
Gate Charge – Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
13
1.3
2.1
0.4
0.7
0.3
3.8
2.8
3.9
4.2
1.3
17
2.6
2.7
Qg
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 15V,
ID = 4A
VDS = 13.5V, VGS = 0V
Turn On Delay Time
Rise Time
VDS = 15V, VGS = 4.5V,
ID = 4A, RG = 2Ω
td(off)
tf
Turn Off Delay Time
Fall Time
Diode Characteristics
VSD
Qrr
trr
Diode Forward Voltage
ISD = 4A, VGS = 0V
0.85
6.4
1
V
Reverse Recovery Charge
Reverse Recovery Time
nC
ns
VDD= 13.5V, IF = 4A,
di/dt = 300A/ms
12.9
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
MIN
TYP MAX UNIT
7.4 °C/W
RqJC
RqJA
Thermal Resistance Junction to Case(1)
Thermal Resistance Junction to Ambient(1)(2)
67 °C/W
(1)
R
qJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
2
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Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A –MARCH 2010–REVISED MARCH 2010
Max RqJA = 67°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
Max RqJA = 228°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
G1 D1 S1
G1 S1 D1
M0179-01
M0180-01
Text Added For Spacing
Text Added For Spacing
Text Added For Spacing
Text Added For Spacing
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
10
1
0.5
0.3
Duty Cycle = t1/t2
0.1
0.1
0.01
0.05
P
0.02
0.01
t1
t2
Typical RqJA = 182°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
Single Pulse
0.001
0.0001
0.001
0.01
0.1
1
10
100
1k
tp - Pulse Duration - s
G012
Figure 1. Transient Thermal Impedance
Copyright © 2010, Texas Instruments Incorporated
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3
CSD17313Q2
SLPS260A –MARCH 2010–REVISED MARCH 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
VDS = 5V
VGS = 8V
TC = 125°C
TC = 25°C
VGS = 4.5V
VGS = 3.5V
VGS = 3V
VGS = 2.5V
TC = -55°C
0
0.2
0.4
0.6
0.8
1
1
0
0
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6 2.8
3
VDS - Drain-to-Source Voltage - V
VGS - Gate-to-Source Voltage - V
G001
G002
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
8
7
6
5
4
3
2
1
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
ID = 4A
VDS = 15V
f = 1MHz
VGS = 0V
Coss = Cds + Cgd
Ciss = Cgd + Cgs
Crss = Cgd
0
0.5
1
1.5
2
2.5
3
3.5
4
5
10
15
20
25
30
Qg - Gate Charge - nC
VDS - Drain-to-Source Voltage - V
G003
G004
Figure 4. Gate Charge
Figure 5. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
80
70
60
50
40
30
20
10
0
1.6
1.4
1.2
1
ID = 4A
ID = 250µA
TC = 125°C
0.8
0.6
0.4
0.2
0
TC = 25°C
-75
-25
25
75
125
175
1
2
3
4
5
6
7
8
9
10
TC - Case Temperature - °C
VGS - Gate-to-Source Voltage - V
G005
G006
Figure 6. Threshold Voltage vs. Temperature
Figure 7. On-State Resistance vs. Gate-to-Source Voltage
4
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Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A –MARCH 2010–REVISED MARCH 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.6
1.4
1.2
1
10
1
ID = 4A
VGS = 8V
TC = 125°C
0.1
TC = 25°C
0.8
0.6
0.4
0.2
0.01
0.001
0.0001
-75
-25
25
75
125
175
0
0.2
0.4
0.6
0.8
1
TC - Case Temperature - °C
VSD - Source-to-Drain Voltage - V
G007
G008
Figure 8. Normalized On-State Resistance vs. Temperature
Figure 9. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
100
100
10
1
10
1
1ms
10ms
TC = 25°C
10101m10s
1s
Area Limited
by RDS(on)
0.1
0.01
DC
TC = 125°C
Single Pulse
Typical RθJA = 182°C/W (min Cu)
0.01
0.1
1
10
100
0.01
0.1
1
10
VDS - Drain-to-Source Voltage - V
t(AV) - Time in Avalanche - ms
G009
G010
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100 125 150 175
TC - Case Temperature - °C
G011
Figure 12. Maximum Drain Current vs. Temperature
Copyright © 2010, Texas Instruments Incorporated
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CSD17313Q2
SLPS260A –MARCH 2010–REVISED MARCH 2010
www.ti.com
MECHANICAL DATA
Q2 Package Dimensions
D2
D
K2
K1
K3
6
5
4
4
7
5
6
8
1
2
3
3
2
1
Pin 1 ID
b
e
Pin 1 Dot
Top View
D1
Bottom View
Pinout
Source
Gate
4, 7
3
Drain
1, 2, 5, 6, 8
Front View
M0175-02
MILLIMETERS
NOM
INCHES
NOM
DIM
MIN
MAX
0.800
0.050
0.350
MIN
MAX
0.032
0.002
0.014
A
A1
b
0.700
0.000
0.250
0.750
0.028
0.000
0.010
0.030
0.300
0.012
C
0.203 TYP
2.000 TYP
0.950
0.008 TYP
0.080 TYP
0.038
D
D1
D2
E
0.900
0.900
1.000
1.100
0.036
0.036
0.040
0.044
0.300 TYP
2.000 TYP
1.000
0.012 TYP
0.080 TYP
0.040
E1
E2
E3
e
0.280 TYP
0.470 TYP
0.650 BSC
0.280 TYP
0.350 TYP
0.200 TYP
0.200 TYP
0.470 TYP
0.25
0.0112 TYP
0.0188 TYP
0.026 TYP
0.0112 TYP
0.014 TYP
0.008 TYP
0.008 TYP
0.0188 TYP
0.010
K
K1
K2
K3
K4
L
0.200
0.300
0.008
0.012
6
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Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A –MARCH 2010–REVISED MARCH 2010
Recommended PCB Pattern
0.65 TYP
1.05
1
0.46
0.40 TYP
0.25
M0167-01
Note: All dimensions are in mm, unless otherwise specified.
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing
through PCB Layout Techniques.
Q2 Tape and Reel Information
4.00 0.10
2.00 0.0ꢀ
Ø 1.ꢀ0 0.10
10° Max
4.00 0.10
Ø 1.00 0.2ꢀ
1.00 0.0ꢀ
0.2ꢀ4 0.02
10° Max
2.30 0.0ꢀ
M0168-01
Notes: 1. Measured from centerline of sprocket hole to centerline of pocket
2. Cumulative tolerance of 10 sprocket holes is ±0.20
3. Other material available
4. Typical SR of form tape Max 108 OHM/SQ
5. All dimensions are in mm, unless otherwise specified.
Copyright © 2010, Texas Instruments Incorporated
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CSD17313Q2
SLPS260A –MARCH 2010–REVISED MARCH 2010
www.ti.com
Package Marking Information
Location
1st Line
Top View
Bottom View
6
4
4
6
NNNN
1731
= 4-Digit Product Code
CSD1731
2nd Line
Y
= Last digit of the Year
= 2-digit Work Week
= Country of Origin
> Philippines = P
> Taiwan = T
NNNN
WW
C
YWWC
> China = C
> Malaysia = M
1
3
3
1
Pin 1
Identifier
M0166-01
Spacer
REVISION HISTORY
Changes from Original (March 2010) to Revision A
Page
•
Changed Qrr - Reverse Recovery Charge From: 10.2 nC To: 6.4 nC .................................................................................. 2
8
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Copyright © 2010, Texas Instruments Incorporated
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