CSD17304Q3 [TI]

30V N-Channel NexFET™ Power MOSFETs; 30V N通道NexFET ™功率MOSFET
CSD17304Q3
型号: CSD17304Q3
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

30V N-Channel NexFET™ Power MOSFETs
30V N通道NexFET ™功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 光电二极管 PC 局域网
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CSD17304Q3  
www.ti.com  
SLPS258 FEBRUARY 2010  
30V N-Channel NexFET™ Power MOSFETs  
Check for Samples: CSD17304Q3  
PRODUCT SUMMARY  
Drain to Source Voltage  
1
FEATURES  
VDS  
Qg  
30  
5.1  
1.1  
V
2
Optimized for 5V Gate Drive  
Gate Charge Total (4.5V)  
Gate Charge Gate to Drain  
nC  
nC  
m  
mΩ  
mΩ  
V
Ultralow Qg and Qgd  
Qgd  
Low Thermal Resistance  
Avalanche Rated  
VGS = 3V  
9.8  
6.9  
5.9  
RDS(on) Drain to Source On Resistance  
VGS = 4.5V  
VGS = 8V  
Pb Free Terminal Plating  
RoHS Compliant  
VGS(th)  
Threshold Voltage  
1.3  
Halogen Free  
SON 3.3-mm × 3.3-mm Plastic Package  
ORDERING INFORMATION  
Device  
CSD17304Q3  
Package  
Media  
Qty  
Ship  
APPLICATIONS  
SON 3.3-mm × 3.3-mm 13-Inch  
Tape and  
Reel  
2500  
Plastic Package Reel  
Notebook Point of Load  
Point-of-Load Synchronous Buck in  
Networking, Telecom, and Computing Systems  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C unless otherwise stated  
VALUE  
UNIT  
V
DESCRIPTION  
VDS  
VGS  
Drain to Source Voltage  
30  
The NexFET™ power MOSFET has been designed  
to minimize losses in power conversion applications  
and optimized for 5V gate drive applications.  
Gate to Source Voltage  
+10 / –8  
56  
V
Continuous Drain Current, TC = 25°C  
Continuous Drain Current(1)  
Pulsed Drain Current, TA = 25°C(2)  
Power Dissipation(1)  
A
ID  
15  
A
Top View  
IDM  
PD  
TJ,  
88  
A
2.7  
W
S
S
S
G
1
2
3
4
8
7
6
5
D
D
D
Operating Junction and Storage  
–55 to 150  
88  
°C  
TSTG Temperature Range  
Avalanche Energy, Single Pulse  
ID = 42, L = 0.1mH, RG = 25Ω  
EAS  
mJ  
(1) Typical RqJA = 46°C/W on a 1-inch2 (6.45-cm2),  
2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick  
FR4 PCB.  
D
D
(2) Pulse duration 300ms, duty cycle 2%  
P0095-01  
Text 4 Spacing  
RDS(on) vs VGS  
Text 4 Spacing  
GATE CHARGE  
20  
18  
16  
14  
12  
10  
8
8
ID = 17A  
ID = 17A  
VDS = 15V  
7
6
5
4
3
2
1
0
TC = 125°C  
6
4
TC = 25°C  
2
0
0
1
2
3
4
5
6
7
8
9
10  
0
2
4
6
8
10  
VGS - Gate-to-Source Voltage - V  
Qg - Gate Charge - nC  
G006  
G003  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NexFET is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2010, Texas Instruments Incorporated  
 
 
CSD17304Q3  
SLPS258 FEBRUARY 2010  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ELECTRICAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
Static Characteristics  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
BVDSS  
IDSS  
Drain to Source Voltage  
VGS = 0V, ID = 250mA  
30  
V
mA  
nA  
V
Drain to Source Leakage Current  
Gate to Source Leakage Current  
Gate to Source Threshold Voltage  
VGS = 0V, VDS = 24V  
VDS = 0V, VGS = +10 / –8  
VDS = VGS, ID = 250mA  
VGS = 3V, ID = 17A  
1
100  
1.8  
IGSS  
VGS(th)  
0.9  
1.3  
9.8  
6.9  
5.9  
48  
12.6  
8.8  
mΩ  
mΩ  
mΩ  
S
RDS(on)  
Drain to Source On Resistance  
Transconductance  
VGS = 4.5V, ID = 17A  
VGS = 8V, ID = 17A  
7.5  
gfs  
VDS = 15V, ID = 17A  
Dynamic Characteristics  
CISS  
COSS  
CRSS  
Rg  
Input Capacitance  
735  
390  
29  
955  
505  
38  
pF  
pF  
pF  
VGS = 0V, VDS = 15V,  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Series Gate Resistance  
Gate Charge Total (4.5V)  
Gate Charge Gate to Drain  
Gate Charge Gate to Source  
Gate Charge at Vth  
Output Charge  
1.1  
5.1  
1.1  
1.8  
0.9  
9.9  
5.1  
9.1  
10.4  
3.1  
2.2  
6.6  
Qg  
nC  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qgd  
Qgs  
Qg(th)  
QOSS  
td(on)  
tr  
VDS = 15V, ID = 17A  
VDS = 13V, VGS = 0V  
Turn On Delay Time  
Rise Time  
VDS = 15V, VGS = 4.5V,  
ID = 17A , RG = 2Ω  
td(off)  
tf  
Turn Off Delay Time  
Fall Time  
Diode Characteristics  
VSD  
Qrr  
trr  
Diode Forward Voltage  
IDS = 17A, VGS = 0V  
0.85  
14.5  
17.3  
1
V
Reverse Recovery Charge  
Reverse Recovery Time  
nC  
ns  
VDD = 13V, IF = 17A,  
di/dt = 300A/ms  
THERMAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
Thermal Resistance Junction to Case(1)  
Thermal Resistance Junction to Ambient(1)(2)  
MIN  
TYP  
MAX  
UNIT  
°C/W  
°C/W  
RqJC  
RqJA  
3.9  
57  
(1)  
R
qJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×  
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design.  
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.  
2
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD17304Q3  
CSD17304Q3  
www.ti.com  
SLPS258 FEBRUARY 2010  
GATE  
Source  
GATE  
Source  
Max RqJA = 57°C/W  
when mounted on  
1 inch2 (6.45 cm2) of  
2-oz. (0.071-mm thick)  
Cu.  
Max RqJA = 158°C/W  
when mounted on a  
minimum pad area of  
2-oz. (0.071-mm thick)  
Cu.  
DRAIN  
DRAIN  
M0161-02  
M0161-01  
TYPICAL MOSFET CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
10  
1
0.5  
0.3  
Duty Cycle = t1/t2  
0.1  
0.1  
0.05  
P
0.02  
0.01  
t1  
0.01  
t2  
Single Pulse  
Typical RqJA = 126°C/W (min Cu)  
TJ = P ´ ZqJA ´ RqJA  
0.001  
0.001  
0.01  
0.1  
1
10  
100  
1k  
tp - Pulse Duration - s  
G012  
Figure 1. Transient Thermal Impedance  
Copyright © 2010, Texas Instruments Incorporated  
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3
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CSD17304Q3  
SLPS258 FEBRUARY 2010  
www.ti.com  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
50  
45  
VDS = 5V  
VGS = 2.5V  
40  
35  
30  
25  
20  
15  
10  
5
VGS = 8V  
TC = 125°C  
VGS = 4.5V  
TC = 25°C  
TC = -55°C  
VGS = 3.5V  
VGS = 3V  
0
0
0
0.5  
1
1.5  
2
0
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
VDS - Drain-to-Source Voltage - V  
VGS - Gate-to-Source Voltage - V  
G001  
G002  
Figure 2. Saturation Characteristics  
Figure 3. Transfer Characteristics  
8
7
6
5
4
3
2
1
0
2
1.8  
1.6  
1.4  
1.2  
1
ID = 17A  
VDS = 15V  
f = 1MHz  
VGS = 0V  
Coss = Cds + Cgd  
Ciss = Cgd + Cgs  
0.8  
0.6  
0.4  
0.2  
0
Crss = Cgd  
0
2
4
6
8
10  
5
10  
15  
20  
25  
30  
Qg - Gate Charge - nC  
VDS - Drain-to-Source Voltage - V  
G003  
G004  
Figure 4. Gate Charge  
Figure 5. Capacitance  
20  
18  
16  
14  
12  
10  
8
1.6  
1.4  
1.2  
1
ID = 17A  
ID = 250µA  
TC = 125°C  
0.8  
0.6  
0.4  
0.2  
0
6
4
TC = 25°C  
2
0
-75  
-25  
25  
75  
125  
175  
1
2
3
4
5
6
7
8
9
10  
TC - Case Temperature - °C  
VGS - Gate-to-Source Voltage - V  
G005  
G006  
Figure 6. Threshold Voltage vs. Temperature  
Figure 7. On-State Resistance vs. Gate-to-Source Voltage  
4
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD17304Q3  
CSD17304Q3  
www.ti.com  
SLPS258 FEBRUARY 2010  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
1.6  
100  
10  
ID = 17A  
VGS = 8V  
1.4  
1.2  
1
1
TC = 125°C  
0.1  
0.8  
0.6  
0.4  
0.2  
TC = 25°C  
0.01  
0.001  
0.0001  
-75  
-25  
25  
75  
125  
175  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
TC - Case Temperature - °C  
VSD - Source-to-Drain Voltage - V  
G007  
G008  
Figure 8. Normalized On-State Resistance vs. Temperature  
Figure 9. Typical Diode Forward Voltage  
1k  
1k  
100  
10  
100  
1ms  
10  
10ms  
TC = 25°C  
1
10101m10s  
Area Limited  
by RDS(on)  
1s  
DC  
TC = 125°C  
0.1  
Single Pulse  
Typical RθJA = 126°C/W (min Cu)  
0.01  
0.01  
1
0.01  
0.1  
1
10  
100  
0.1  
1
10  
100  
VDS - Drain-to-Source Voltage - V  
t(AV) - Time in Avalanche - ms  
G009  
G010  
Figure 10. Maximum Safe Operating Area  
Figure 11. Single Pulse Unclamped Inductive Switching  
80  
70  
60  
50  
40  
30  
20  
10  
0
-50  
-25  
0
25  
50  
75  
100 125 150 175  
TC - Case Temperature - °C  
G011  
Figure 12. Maximum Drain Current vs. Temperature  
Copyright © 2010, Texas Instruments Incorporated  
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5
Product Folder Link(s): CSD17304Q3  
CSD17304Q3  
SLPS258 FEBRUARY 2010  
www.ti.com  
MECHANICAL DATA  
Q3 Package Dimensions  
D2  
D
H
L
q
L1  
A1  
Top View  
Side View  
Bottom View  
D
Front View  
M0142-01  
MILLIMETERS  
NOM  
1.000  
0.000  
0.340  
0.200  
3.300  
INCHES  
NOM  
0.039  
0.000  
0.013  
0.008  
0.130  
DIM  
MIN  
0.950  
0.000  
0.280  
0.150  
3.200  
MAX  
1.100  
0.050  
0.400  
0.250  
3.400  
MIN  
MAX  
0.043  
0.002  
0.016  
0.010  
0.134  
A
A1  
b
0.037  
0.000  
0.011  
0.006  
0.126  
c
D
D1  
D2  
E
1.650  
3.200  
1.750  
3.300  
1.800  
3.400  
0.065  
0.126  
0.069  
0.130  
0.071  
0.134  
E1  
E2  
e
2.350  
2.450  
0.650 TYP  
0.450  
0.450  
2.550  
0.093  
0.096  
0.026  
0.018  
0.018  
0.100  
H
0.35  
0.35  
0.550  
0.550  
0.014  
0.014  
0.022  
0.022  
L
L1  
q
6
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Copyright © 2010, Texas Instruments Incorporated  
Product Folder Link(s): CSD17304Q3  
CSD17304Q3  
www.ti.com  
SLPS258 FEBRUARY 2010  
Recommended PCB Pattern  
3.50  
0.56  
0.41  
2.31  
0.63  
M0143-01  
For recommended circuit layout for PCB designs, see application note SLPA005 Reducing Ringing Through  
PCB Layout Techniques.  
Q3 Tape and Reel Information  
4.00 0.ꢀ0 ꢁ(SS ꢂNoS ꢀ1  
8.00 0.ꢀ0  
2.00 0.0ꢃ  
Ø ꢀ.ꢃ0  
+0.ꢀ0  
–0.00  
3.60  
M0ꢀ44-0ꢀ  
Notes:  
1. 10-sprocket hole-pitch cumulative tolerance ±0.2  
2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm  
3. Material: black static-dissipative polystyrene  
4. All dimensions are in mm (unless otherwise specified)  
5. Thickness: 0.30 ±0.05mm  
6. MSL1 260°C (IR and convection) PbF reflow compatible  
Copyright © 2010, Texas Instruments Incorporated  
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7
Product Folder Link(s): CSD17304Q3  
CSD17304Q3  
SLPS258 FEBRUARY 2010  
www.ti.com  
Package Marking Information  
Location  
1st Line  
8
5
5
8
CSD  
= Fixed Characters  
NNNNN = Product Code  
2nd Line (Date Code)  
CSDNNNNN  
YYWWC  
LLLLL  
YY  
WW  
C
= Last 2 digits of the Year  
= 2-digit Work Week  
= Country of Origin  
> Philippines = P  
> Taiwan = T  
> China = C  
1
4
4
1
3rd Line  
Pin 1  
Identifier  
LLLLL  
= Last 5 digits of the Wafer Lot #  
M0145-01  
8
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Product Folder Link(s): CSD17304Q3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
27-May-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
CSD17304Q3  
ACTIVE  
SON  
DQG  
8
2500  
Pb-Free (RoHS  
Exempt)  
Call TI  
Level-1-260C-UNLIM  
Request Free Samples  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
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Addendum-Page 1  
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TI

CSD17305Q5A

30V, N-Channel NexFET™ Power MOSFETs
TI

CSD17305Q5A_10

The NexFET power MOSFET has been designed to minimize losses in power conversion applications, and optimized for 5V gate drive applications.
TI

CSD17306Q5A

30V, N-Channel NexFET™ Power MOSFETs
TI

CSD17307Q5A

30V, N-Channel NexFET™ Power MOSFETs
TI

CSD17308Q3

30V N-Channel NexFET™ Power MOSFETs
TI

CSD17308Q3T

采用 3mm x 3mm SON 封装的单路、11.8mΩ、30V、N 沟道 NexFET™ 功率 MOSFET | DQG | 8 | -55 to 150
TI

CSD17309Q3

30V N-Channel NexFET™ Power MOSFETs
TI

CSD17310Q5A

30V, N-Channel NexFET™ Power MOSFETs
TI

CSD17311Q5

30V N-Channel NexFET? Power MOSFET
TI

CSD17311Q5_1

30V N-Channel NexFET? Power MOSFET
TI

CSD17312Q5

30V N-Channel NexFET™ Power MOSFET
TI